diff options
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVMCInstLower.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVMCInstLower.cpp | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp b/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp index c167c095521a..c457a95544cf 100644 --- a/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp +++ b/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp @@ -87,7 +87,7 @@ static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym, return MCOperand::createExpr(ME); } -bool llvm::LowerRISCVMachineOperandToMCOperand(const MachineOperand &MO, +bool llvm::lowerRISCVMachineOperandToMCOperand(const MachineOperand &MO, MCOperand &MCOp, const AsmPrinter &AP) { switch (MO.getType()) { @@ -145,6 +145,7 @@ static bool lowerRISCVVMachineInstrToMCInst(const MachineInstr *MI, const TargetRegisterInfo *TRI = MF->getSubtarget<RISCVSubtarget>().getRegisterInfo(); + assert(TRI && "TargetRegisterInfo expected"); uint64_t TSFlags = MI->getDesc().TSFlags; @@ -158,12 +159,16 @@ static bool lowerRISCVVMachineInstrToMCInst(const MachineInstr *MI, if (RISCVII::hasSEWOp(TSFlags)) --NumOps; + bool hasVLOutput = RISCV::isFaultFirstLoad(*MI); for (unsigned OpNo = 0; OpNo != NumOps; ++OpNo) { const MachineOperand &MO = MI->getOperand(OpNo); + // Skip vl ouput. It should be the second output. + if (hasVLOutput && OpNo == 1) + continue; // Skip merge op. It should be the first operand after the result. - if (RISCVII::hasMergeOp(TSFlags) && OpNo == 1) { - assert(MI->getNumExplicitDefs() == 1); + if (RISCVII::hasMergeOp(TSFlags) && OpNo == 1U + hasVLOutput) { + assert(MI->getNumExplicitDefs() == 1U + hasVLOutput); continue; } @@ -214,7 +219,7 @@ bool llvm::lowerRISCVMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, for (const MachineOperand &MO : MI->operands()) { MCOperand MCOp; - if (LowerRISCVMachineOperandToMCOperand(MO, MCOp, AP)) + if (lowerRISCVMachineOperandToMCOperand(MO, MCOp, AP)) OutMI.addOperand(MCOp); } |