aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZScheduleZ14.td')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZScheduleZ14.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZScheduleZ14.td b/llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
index 3f406736a71f..d5eab33dbb4a 100644
--- a/llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
+++ b/llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
@@ -92,7 +92,7 @@ let NumMicroOps = 0 in {
def : WriteRes<VecMul, [Z14_VecUnit]>;
def : WriteRes<VecStr, [Z14_VecUnit]>;
def : WriteRes<VecXsPm, [Z14_VecUnit]>;
- foreach Num = 2-5 in { let ResourceCycles = [Num] in {
+ foreach Num = 2-5 in { let ReleaseAtCycles = [Num] in {
def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z14_FXaUnit]>;
def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z14_FXbUnit]>;
def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z14_LSUnit]>;
@@ -104,7 +104,7 @@ let NumMicroOps = 0 in {
def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z14_VecUnit]>;
}}
- def : WriteRes<VecFPd, [Z14_VecFPdUnit]> { let ResourceCycles = [30]; }
+ def : WriteRes<VecFPd, [Z14_VecFPdUnit]> { let ReleaseAtCycles = [30]; }
def : WriteRes<VBU, [Z14_VBUnit]>; // Virtual Branching Unit
}