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-rw-r--r--sys/dev/qat/include/adf_cfg_device.h4
-rw-r--r--sys/dev/qat/include/adf_dbgfs.h11
-rw-r--r--sys/dev/qat/include/adf_gen4vf_hw_csr_data.h4
-rw-r--r--sys/dev/qat/include/adf_heartbeat.h6
-rw-r--r--sys/dev/qat/include/adf_pfvf_vf_msg.h3
-rw-r--r--sys/dev/qat/include/common/adf_accel_devices.h14
-rw-r--r--sys/dev/qat/include/common/adf_cfg_common.h4
-rw-r--r--sys/dev/qat/include/common/adf_common_drv.h3
-rw-r--r--sys/dev/qat/include/common/adf_gen4_hw_data.h6
-rw-r--r--sys/dev/qat/include/common/adf_pfvf_msg.h8
-rw-r--r--sys/dev/qat/include/common/adf_uio_cleanup.h3
-rw-r--r--sys/dev/qat/include/common/adf_uio_control.h3
-rw-r--r--sys/dev/qat/include/icp_qat_fw_init_admin.h9
13 files changed, 55 insertions, 23 deletions
diff --git a/sys/dev/qat/include/adf_cfg_device.h b/sys/dev/qat/include/adf_cfg_device.h
index f2891e4eb805..1419292a262f 100644
--- a/sys/dev/qat/include/adf_cfg_device.h
+++ b/sys/dev/qat/include/adf_cfg_device.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2022 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_CFG_DEVICE_H_
#define ADF_CFG_DEVICE_H_
@@ -79,4 +79,6 @@ int adf_cfg_device_init(struct adf_cfg_device *device,
void adf_cfg_device_clear(struct adf_cfg_device *device,
struct adf_accel_dev *accel_dev);
+void adf_cfg_device_clear_all(struct adf_accel_dev *accel_dev);
+
#endif
diff --git a/sys/dev/qat/include/adf_dbgfs.h b/sys/dev/qat/include/adf_dbgfs.h
new file mode 100644
index 000000000000..a07933c0f02d
--- /dev/null
+++ b/sys/dev/qat/include/adf_dbgfs.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2025 Intel Corporation */
+
+#ifndef ADF_DBGFS_H
+#define ADF_DBGFS_H
+
+void adf_dbgfs_init(struct adf_accel_dev *accel_dev);
+void adf_dbgfs_add(struct adf_accel_dev *accel_dev);
+void adf_dbgfs_rm(struct adf_accel_dev *accel_dev);
+void adf_dbgfs_exit(struct adf_accel_dev *accel_dev);
+#endif
diff --git a/sys/dev/qat/include/adf_gen4vf_hw_csr_data.h b/sys/dev/qat/include/adf_gen4vf_hw_csr_data.h
index ed78ab54ec4e..5143b88907ba 100644
--- a/sys/dev/qat/include/adf_gen4vf_hw_csr_data.h
+++ b/sys/dev/qat/include/adf_gen4vf_hw_csr_data.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2022 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_GEN4VF_HW_CSR_DATA_H_
#define ADF_GEN4VF_HW_CSR_DATA_H_
@@ -51,7 +51,7 @@
struct resource *_csr_base_addr = csr_base_addr; \
u32 _bank = bank; \
u32 _ring = ring; \
- dma_addr_t _value = value; \
+ bus_addr_t _value = value; \
u32 l_base = 0, u_base = 0; \
l_base = (u32)((_value)&0xFFFFFFFF); \
u_base = (u32)(((_value)&0xFFFFFFFF00000000ULL) >> 32); \
diff --git a/sys/dev/qat/include/adf_heartbeat.h b/sys/dev/qat/include/adf_heartbeat.h
index b2eab7139c1f..7a72678e77de 100644
--- a/sys/dev/qat/include/adf_heartbeat.h
+++ b/sys/dev/qat/include/adf_heartbeat.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2022 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_HEARTBEAT_H_
#define ADF_HEARTBEAT_H_
@@ -18,8 +18,8 @@ struct adf_heartbeat {
u64 last_hb_check_time;
enum adf_device_heartbeat_status last_hb_status;
struct qat_sysctl heartbeat;
- struct qat_sysctl *heartbeat_sent;
- struct qat_sysctl *heartbeat_failed;
+ struct qat_sysctl heartbeat_sent;
+ struct qat_sysctl heartbeat_failed;
};
int adf_heartbeat_init(struct adf_accel_dev *accel_dev);
diff --git a/sys/dev/qat/include/adf_pfvf_vf_msg.h b/sys/dev/qat/include/adf_pfvf_vf_msg.h
index 3cf6d5ed0815..44066ca1fe85 100644
--- a/sys/dev/qat/include/adf_pfvf_vf_msg.h
+++ b/sys/dev/qat/include/adf_pfvf_vf_msg.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2022 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_PFVF_VF_MSG_H
#define ADF_PFVF_VF_MSG_H
@@ -8,5 +8,6 @@ void adf_vf2pf_notify_shutdown(struct adf_accel_dev *accel_dev);
int adf_vf2pf_request_version(struct adf_accel_dev *accel_dev);
int adf_vf2pf_get_capabilities(struct adf_accel_dev *accel_dev);
int adf_vf2pf_get_ring_to_svc(struct adf_accel_dev *accel_dev);
+void adf_vf2pf_restarting_complete(struct adf_accel_dev *accel_dev);
#endif /* ADF_PFVF_VF_MSG_H */
diff --git a/sys/dev/qat/include/common/adf_accel_devices.h b/sys/dev/qat/include/common/adf_accel_devices.h
index 0a1248b9a68e..c09aee8ea4bd 100644
--- a/sys/dev/qat/include/common/adf_accel_devices.h
+++ b/sys/dev/qat/include/common/adf_accel_devices.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2022 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_ACCEL_DEVICES_H_
#define ADF_ACCEL_DEVICES_H_
@@ -7,6 +7,8 @@
#include "adf_cfg_common.h"
#include "adf_pfvf_msg.h"
+#include "opt_qat.h"
+
#define ADF_CFG_NUM_SERVICES 4
#define ADF_DH895XCC_DEVICE_NAME "dh895xcc"
@@ -446,6 +448,7 @@ struct adf_hw_device_data {
uint8_t num_accel;
uint8_t num_logical_accel;
uint8_t num_engines;
+ bool get_ring_to_svc_done;
int (*get_storage_enabled)(struct adf_accel_dev *accel_dev,
uint32_t *storage_enabled);
u8 query_storage_cap;
@@ -683,10 +686,18 @@ struct adf_accel_dev {
struct sysctl_oid *ras_reset;
struct sysctl_oid *pke_replay_dbgfile;
struct sysctl_oid *misc_error_dbgfile;
+ struct sysctl_oid *fw_version_oid;
+ struct sysctl_oid *mmp_version_oid;
+ struct sysctl_oid *hw_version_oid;
+ struct sysctl_oid *cnv_error_oid;
struct list_head list;
struct adf_accel_pci accel_pci_dev;
struct adf_accel_compat_manager *cm;
u8 compat_ver;
+#ifdef QAT_DISABLE_SAFE_DC_MODE
+ struct sysctl_oid *safe_dc_mode;
+ u8 disable_safe_dc_mode;
+#endif /* QAT_DISABLE_SAFE_DC_MODE */
union {
struct {
/* vf_info is non-zero when SR-IOV is init'ed */
@@ -711,5 +722,6 @@ struct adf_accel_dev {
bool is_vf;
u32 accel_id;
void *lac_dev;
+ struct mutex lock; /* protect accel_dev during start/stop e.t.c */
};
#endif
diff --git a/sys/dev/qat/include/common/adf_cfg_common.h b/sys/dev/qat/include/common/adf_cfg_common.h
index 4a85e021aeb7..eb3edec41742 100644
--- a/sys/dev/qat/include/common/adf_cfg_common.h
+++ b/sys/dev/qat/include/common/adf_cfg_common.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2022 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_CFG_COMMON_H_
#define ADF_CFG_COMMON_H_
@@ -62,7 +62,7 @@ struct adf_pci_address {
unsigned char bus;
unsigned char dev;
unsigned char func;
-} __packed;
+};
#define ADF_CFG_SERV_RING_PAIR_0_SHIFT 0
#define ADF_CFG_SERV_RING_PAIR_1_SHIFT 3
diff --git a/sys/dev/qat/include/common/adf_common_drv.h b/sys/dev/qat/include/common/adf_common_drv.h
index b6bc2511bfba..f9f4463f69c3 100644
--- a/sys/dev/qat/include/common/adf_common_drv.h
+++ b/sys/dev/qat/include/common/adf_common_drv.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2022 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_DRV_H
#define ADF_DRV_H
@@ -304,6 +304,7 @@ void adf_flush_vf_wq(struct adf_accel_dev *accel_dev);
int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev);
int adf_pf2vf_handle_pf_rp_reset(struct adf_accel_dev *accel_dev,
struct pfvf_message msg);
+int adf_pf2vf_handle_pf_error(struct adf_accel_dev *accel_dev);
bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev);
static inline int
adf_sriov_configure(device_t *pdev, int numvfs)
diff --git a/sys/dev/qat/include/common/adf_gen4_hw_data.h b/sys/dev/qat/include/common/adf_gen4_hw_data.h
index d0423eaa17cf..cde5ae1f4e10 100644
--- a/sys/dev/qat/include/common/adf_gen4_hw_data.h
+++ b/sys/dev/qat/include/common/adf_gen4_hw_data.h
@@ -1,5 +1,5 @@
-/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2021 Intel Corporation */
+/* SPDX-License-Identifier: BSD-3-Clause */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_GEN4_HW_CSR_DATA_H_
#define ADF_GEN4_HW_CSR_DATA_H_
@@ -62,7 +62,7 @@
struct resource *_csr_base_addr = csr_base_addr; \
u32 _bank = bank; \
u32 _ring = ring; \
- dma_addr_t _value = value; \
+ bus_addr_t _value = value; \
u32 l_base = 0, u_base = 0; \
l_base = lower_32_bits(_value); \
u_base = upper_32_bits(_value); \
diff --git a/sys/dev/qat/include/common/adf_pfvf_msg.h b/sys/dev/qat/include/common/adf_pfvf_msg.h
index 349db9a13b22..abd9cd46014f 100644
--- a/sys/dev/qat/include/common/adf_pfvf_msg.h
+++ b/sys/dev/qat/include/common/adf_pfvf_msg.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2022 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_PFVF_MSG_H
#define ADF_PFVF_MSG_H
@@ -97,6 +97,7 @@ enum pf2vf_msgtype {
ADF_PF2VF_MSGTYPE_RESTARTING = 0x01,
ADF_PF2VF_MSGTYPE_VERSION_RESP = 0x02,
ADF_PF2VF_MSGTYPE_BLKMSG_RESP = 0x03,
+ ADF_PF2VF_MSGTYPE_FATAL_ERROR = 0x04,
/* Values from 0x10 are Gen4 specific, message type is only 4 bits in
Gen2 devices. */
ADF_PF2VF_MSGTYPE_RP_RESET_RESP = 0x10,
@@ -111,6 +112,7 @@ enum vf2pf_msgtype {
ADF_VF2PF_MSGTYPE_LARGE_BLOCK_REQ = 0x07,
ADF_VF2PF_MSGTYPE_MEDIUM_BLOCK_REQ = 0x08,
ADF_VF2PF_MSGTYPE_SMALL_BLOCK_REQ = 0x09,
+ ADF_VF2PF_MSGTYPE_RESTARTING_COMPLETE = 0x0a,
/* Values from 0x10 are Gen4 specific, message type is only 4 bits in
Gen2 devices. */
ADF_VF2PF_MSGTYPE_RP_RESET = 0x10,
@@ -124,8 +126,10 @@ enum pfvf_compatibility_version {
ADF_PFVF_COMPAT_FAST_ACK = 0x03,
/* Ring to service mapping support for non-standard mappings */
ADF_PFVF_COMPAT_RING_TO_SVC_MAP = 0x04,
+ /* Fallback compat */
+ ADF_PFVF_COMPAT_FALLBACK = 0x05,
/* Reference to the latest version */
- ADF_PFVF_COMPAT_THIS_VERSION = 0x04,
+ ADF_PFVF_COMPAT_THIS_VERSION = 0x05,
};
/* PF->VF Version Response */
diff --git a/sys/dev/qat/include/common/adf_uio_cleanup.h b/sys/dev/qat/include/common/adf_uio_cleanup.h
index 8f1132181355..876843cd9aa8 100644
--- a/sys/dev/qat/include/common/adf_uio_cleanup.h
+++ b/sys/dev/qat/include/common/adf_uio_cleanup.h
@@ -1,10 +1,9 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2023 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_UIO_CLEANUP_H
#define ADF_UIO_CLEANUP_H
void adf_uio_do_cleanup_orphan(int bank,
struct adf_uio_control_accel *accel);
-
#endif
diff --git a/sys/dev/qat/include/common/adf_uio_control.h b/sys/dev/qat/include/common/adf_uio_control.h
index 4662c02233b6..032baa9b54c2 100644
--- a/sys/dev/qat/include/common/adf_uio_control.h
+++ b/sys/dev/qat/include/common/adf_uio_control.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2023 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef QAT_UIO_CONTROL_H
#define QAT_UIO_CONTROL_H
#include <sys/condvar.h>
@@ -38,5 +38,4 @@ struct adf_uio_control_accel {
};
-
#endif /* end of include guard: QAT_UIO_CONTROL_H */
diff --git a/sys/dev/qat/include/icp_qat_fw_init_admin.h b/sys/dev/qat/include/icp_qat_fw_init_admin.h
index 3537fb3f8cfd..f3e0ff9d0064 100644
--- a/sys/dev/qat/include/icp_qat_fw_init_admin.h
+++ b/sys/dev/qat/include/icp_qat_fw_init_admin.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* Copyright(c) 2007-2022 Intel Corporation */
+/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef _ICP_QAT_FW_INIT_ADMIN_H_
#define _ICP_QAT_FW_INIT_ADMIN_H_
@@ -43,6 +43,8 @@ enum icp_qat_fw_cnv_error_type {
CNV_ERR_TYPE_UNKNOWN_ERROR
};
+#define ICP_QAT_FW_INIT_DISABLE_SAFE_DC_MODE_FLAG 0x02
+
#define CNV_ERROR_TYPE_GET(latest_error) \
({ \
__typeof__(latest_error) _lerror = latest_error; \
@@ -69,7 +71,8 @@ struct icp_qat_fw_init_admin_req {
struct {
u64 resrvd2;
u16 ibuf_size_in_kb;
- u16 resrvd3;
+ u8 fw_flags;
+ u8 resrvd3;
u32 resrvd4;
};
/* ICP_QAT_FW_CONSTANTS_CFG */
@@ -195,8 +198,8 @@ struct icp_qat_fw_init_admin_resp {
enum icp_qat_fw_init_admin_init_flag { ICP_QAT_FW_INIT_FLAG_PKE_DISABLED = 0 };
struct icp_qat_fw_init_admin_hb_cnt {
- u16 resp_heartbeat_cnt;
u16 req_heartbeat_cnt;
+ u16 resp_heartbeat_cnt;
};
#define ICP_QAT_FW_COMN_HEARTBEAT_OK 0
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-30 17:13:51 +0000