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-rw-r--r--sys/dev/acpi_support/acpi_ibm.c2
-rw-r--r--sys/dev/acpica/acpi.c16
-rw-r--r--sys/dev/cxgbe/common/t4_regs.h51
-rw-r--r--sys/dev/cxgbe/firmware/t4fw_interface.h107
-rw-r--r--sys/dev/cxgbe/firmware/t7fw_cfg.txt19
-rw-r--r--sys/dev/cxgbe/firmware/t7fw_cfg_uwire.txt19
-rw-r--r--sys/dev/cxgbe/t4_main.c15
-rw-r--r--sys/dev/pci/pci.c2
-rw-r--r--sys/dev/rge/if_rge.c1
-rw-r--r--sys/dev/rge/if_rge_vendor.h1
-rw-r--r--sys/dev/smartpqi/smartpqi_cam.c4
-rw-r--r--sys/dev/smartpqi/smartpqi_defines.h8
-rw-r--r--sys/dev/smartpqi/smartpqi_discovery.c21
-rw-r--r--sys/dev/smartpqi/smartpqi_event.c17
-rw-r--r--sys/dev/smartpqi/smartpqi_main.c12
-rw-r--r--sys/dev/smartpqi/smartpqi_misc.c4
-rw-r--r--sys/dev/smartpqi/smartpqi_queue.c4
-rw-r--r--sys/dev/smartpqi/smartpqi_request.c4
-rw-r--r--sys/dev/smartpqi/smartpqi_response.c4
-rw-r--r--sys/dev/smartpqi/smartpqi_sis.c6
-rw-r--r--sys/dev/smartpqi/smartpqi_structures.h4
-rw-r--r--sys/dev/syscons/syscons.c4
-rw-r--r--sys/dev/thunderbolt/tbcfg_reg.h2
-rw-r--r--sys/dev/ufshci/ufshci_private.h4
-rw-r--r--sys/dev/vt/vt_core.c4
-rw-r--r--sys/dev/xen/control/control.c6
26 files changed, 238 insertions, 103 deletions
diff --git a/sys/dev/acpi_support/acpi_ibm.c b/sys/dev/acpi_support/acpi_ibm.c
index 1221384e7d8a..2967832a0878 100644
--- a/sys/dev/acpi_support/acpi_ibm.c
+++ b/sys/dev/acpi_support/acpi_ibm.c
@@ -1453,7 +1453,7 @@ acpi_ibm_eventhandler(struct acpi_ibm_softc *sc, int arg)
* instead of suspend-to-RAM.
*/
case IBM_EVENT_SUSPEND_TO_RAM:
- power_pm_suspend(POWER_SSTATE_TRANSITION_SUSPEND);
+ power_pm_suspend(POWER_TRANSITION_SUSPEND);
break;
case IBM_EVENT_BLUETOOTH:
diff --git a/sys/dev/acpica/acpi.c b/sys/dev/acpica/acpi.c
index bdc197a4fb59..ec1f002150c1 100644
--- a/sys/dev/acpica/acpi.c
+++ b/sys/dev/acpica/acpi.c
@@ -672,12 +672,12 @@ acpi_attach(device_t dev)
* s2idle when ACPI_FADT_LOW_POWER_S0 is set.
*/
sc->acpi_sleep_button_stype = POWER_STYPE_UNKNOWN;
- for (stype = POWER_STYPE_STANDBY; stype <= POWER_STYPE_HIBERNATE; stype++)
+ for (stype = POWER_STYPE_STANDBY; stype <= POWER_STYPE_FW_HIBERNATE; stype++)
if (acpi_supported_stypes[stype]) {
sc->acpi_sleep_button_stype = stype;
break;
}
- if (sc->acpi_sleep_button_stype == POWER_STYPE_HIBERNATE ||
+ if (sc->acpi_sleep_button_stype == POWER_STYPE_FW_HIBERNATE ||
sc->acpi_sleep_button_stype == POWER_STYPE_UNKNOWN) {
if (acpi_supported_stypes[POWER_STYPE_SUSPEND_TO_IDLE])
sc->acpi_sleep_button_stype = POWER_STYPE_SUSPEND_TO_IDLE;
@@ -816,9 +816,9 @@ acpi_stype_to_sstate(struct acpi_softc *sc, enum power_stype stype)
return (ACPI_STATE_S0);
case POWER_STYPE_STANDBY:
return (sc->acpi_standby_sx);
- case POWER_STYPE_SUSPEND_TO_MEM:
+ case POWER_STYPE_FW_SUSPEND:
return (ACPI_STATE_S3);
- case POWER_STYPE_HIBERNATE:
+ case POWER_STYPE_FW_HIBERNATE:
return (ACPI_STATE_S4);
case POWER_STYPE_POWEROFF:
return (ACPI_STATE_S5);
@@ -851,9 +851,9 @@ acpi_sstate_to_stype(int sstate)
case ACPI_STATE_S2:
return (POWER_STYPE_STANDBY);
case ACPI_STATE_S3:
- return (POWER_STYPE_SUSPEND_TO_MEM);
+ return (POWER_STYPE_FW_SUSPEND);
case ACPI_STATE_S4:
- return (POWER_STYPE_HIBERNATE);
+ return (POWER_STYPE_FW_HIBERNATE);
case ACPI_STATE_S5:
return (POWER_STYPE_POWEROFF);
}
@@ -3723,8 +3723,8 @@ acpi_EnterSleepState(struct acpi_softc *sc, enum power_stype stype)
case POWER_STYPE_STANDBY:
do_standby(sc, &slp_state, intr);
break;
- case POWER_STYPE_SUSPEND_TO_MEM:
- case POWER_STYPE_HIBERNATE:
+ case POWER_STYPE_FW_SUSPEND:
+ case POWER_STYPE_FW_HIBERNATE:
do_sleep(sc, &slp_state, intr, acpi_sstate);
break;
case POWER_STYPE_SUSPEND_TO_IDLE:
diff --git a/sys/dev/cxgbe/common/t4_regs.h b/sys/dev/cxgbe/common/t4_regs.h
index 09d0d4aa2c08..9984461352d0 100644
--- a/sys/dev/cxgbe/common/t4_regs.h
+++ b/sys/dev/cxgbe/common/t4_regs.h
@@ -1465,10 +1465,10 @@
#define A_SGE_INT_ENABLE3 0x1040
#define A_SGE_FL_BUFFER_SIZE0 0x1044
-#define S_SIZE 4
+#define CXGBE_S_SIZE 4
#define CXGBE_M_SIZE 0xfffffffU
-#define V_SIZE(x) ((x) << S_SIZE)
-#define G_SIZE(x) (((x) >> S_SIZE) & CXGBE_M_SIZE)
+#define CXGBE_V_SIZE(x) ((x) << S_SIZE)
+#define CXGBE_G_SIZE(x) (((x) >> S_SIZE) & CXGBE_M_SIZE)
#define S_T6_SIZE 4
#define M_T6_SIZE 0xfffffU
@@ -26578,15 +26578,10 @@
#define V_CIM_ULP_TX_PKT_ERR_CODE(x) ((x) << S_CIM_ULP_TX_PKT_ERR_CODE)
#define G_CIM_ULP_TX_PKT_ERR_CODE(x) (((x) >> S_CIM_ULP_TX_PKT_ERR_CODE) & M_CIM_ULP_TX_PKT_ERR_CODE)
-#define S_CIM_SGE1_PKT_ERR_CODE 8
-#define M_CIM_SGE1_PKT_ERR_CODE 0xffU
-#define V_CIM_SGE1_PKT_ERR_CODE(x) ((x) << S_CIM_SGE1_PKT_ERR_CODE)
-#define G_CIM_SGE1_PKT_ERR_CODE(x) (((x) >> S_CIM_SGE1_PKT_ERR_CODE) & M_CIM_SGE1_PKT_ERR_CODE)
-
-#define S_CIM_SGE0_PKT_ERR_CODE 0
-#define M_CIM_SGE0_PKT_ERR_CODE 0xffU
-#define V_CIM_SGE0_PKT_ERR_CODE(x) ((x) << S_CIM_SGE0_PKT_ERR_CODE)
-#define G_CIM_SGE0_PKT_ERR_CODE(x) (((x) >> S_CIM_SGE0_PKT_ERR_CODE) & M_CIM_SGE0_PKT_ERR_CODE)
+#define S_CIM_SGE_PKT_ERR_CODE 0
+#define M_CIM_SGE_PKT_ERR_CODE 0xffU
+#define V_CIM_SGE_PKT_ERR_CODE(x) ((x) << S_CIM_SGE_PKT_ERR_CODE)
+#define G_CIM_SGE_PKT_ERR_CODE(x) (((x) >> S_CIM_SGE_PKT_ERR_CODE) & M_CIM_SGE_PKT_ERR_CODE)
#define S_CIM_PCIE_PKT_ERR_CODE 8
#define M_CIM_PCIE_PKT_ERR_CODE 0xffU
@@ -60550,17 +60545,15 @@
#define A_MAC_PORT_PTP_DRIFT_ADJUST_COUNT 0x9a0
#define A_MAC_PORT_PTP_OFFSET_ADJUST_FINE 0x9a4
-#if 0
-#define S_B 16
-#define M_B 0xffffU
-#define V_B(x) ((x) << S_B)
-#define G_B(x) (((x) >> S_B) & M_B)
-#endif
+#define CXGBE_S_B 16
+#define CXGBE_M_B 0xffffU
+#define CXGBE_V_B(x) ((x) << CXGBE_S_B)
+#define CXGBE_G_B(x) (((x) >> CXGBE_S_B) & CXGBE_M_B)
-#define S_A 0
-#define M_A 0xffffU
-#define V_A(x) ((x) << S_A)
-#define G_A(x) (((x) >> S_A) & M_A)
+#define CXGBE_S_A 0
+#define CXGBE_M_A 0xffffU
+#define CXGBE_V_A(x) ((x) << CXGBE_S_A)
+#define CXGBE_G_A(x) (((x) >> CXGBE_S_A) & CXGBE_M_A)
#define A_MAC_PORT_PTP_OFFSET_ADJUST_TOTAL 0x9a8
#define A_MAC_PORT_PTP_CFG 0x9ac
@@ -62257,10 +62250,10 @@
#define A_MAC_PORT_MTIP_VLAN_TPID_0 0x1a00
-#define S_VLANTAG 0
+#define CXGBE_S_VLANTAG 0
#define CXGBE_M_VLANTAG 0xffffU
-#define V_VLANTAG(x) ((x) << S_VLANTAG)
-#define G_VLANTAG(x) (((x) >> S_VLANTAG) & M_VLANTAG)
+#define CXGBE_V_VLANTAG(x) ((x) << CXGBE_S_VLANTAG)
+#define CXGBE_G_VLANTAG(x) (((x) >> CXGBE_S_VLANTAG) & CXGBE_M_VLANTAG)
#define A_MAC_PORT_MTIP_VLAN_TPID_1 0x1a04
#define A_MAC_PORT_MTIP_VLAN_TPID_2 0x1a08
@@ -69613,10 +69606,10 @@
#define V_INIT_ENABLE(x) ((x) << S_INIT_ENABLE)
#define F_INIT_ENABLE V_INIT_ENABLE(1U)
-#define S_WAIT 16
-#define M_WAIT 0xfffU
-#define CXGBE_V_WAIT(x) ((x) << S_WAIT)
-#define G_WAIT(x) (((x) >> S_WAIT) & M_WAIT)
+#define CXGBE_S_WAIT 16
+#define CXGBE_M_WAIT 0xfffU
+#define CXGBE_V_WAIT(x) ((x) << CXGBE_S_WAIT)
+#define CXGBE_G_WAIT(x) (((x) >> CXGBE_S_WAIT) & CXGBE_M_WAIT)
#define S_EN_MULTI_RANK_SEL 4
#define V_EN_MULTI_RANK_SEL(x) ((x) << S_EN_MULTI_RANK_SEL)
diff --git a/sys/dev/cxgbe/firmware/t4fw_interface.h b/sys/dev/cxgbe/firmware/t4fw_interface.h
index b11552dce021..6235a2c3fab4 100644
--- a/sys/dev/cxgbe/firmware/t4fw_interface.h
+++ b/sys/dev/cxgbe/firmware/t4fw_interface.h
@@ -2560,6 +2560,22 @@ struct fw_ri_wr {
__be32 tpt_offset_t10_config;
__be32 r8[2];
} nvmet_init;
+ struct fw_ri_iscsi_init {
+ __u8 type;
+ __u8 dcrc_dis_to_hcrc;
+ __u8 r4[3];
+ __u8 qp_caps;
+ __be16 r5;
+ __be32 pdid;
+ __be32 qpid;
+ __be32 sq_eqid;
+ __be32 r6;
+ __be32 scqid;
+ __be32 rcqid;
+ __be32 r7[4];
+ __be32 r8[2];
+ __be64 r9;
+ } iscsi_init;
struct fw_ri_fini {
__u8 type;
__u8 r3[7];
@@ -2634,6 +2650,37 @@ struct fw_ri_wr {
#define G_FW_RI_WR_T10_CONFIG(x) \
(((x) >> S_FW_RI_WR_T10_CONFIG) & M_FW_RI_WR_T10_CONFIG)
+#define S_FW_RI_WR_DCRC_DIS 7
+#define M_FW_RI_WR_DCRC_DIS 0x1
+#define V_FW_RI_WR_DCRC_DIS(x) ((x) << S_FW_RI_WR_DCRC_DIS)
+#define G_FW_RI_WR_DCRC_DIS(x) \
+ (((x) >> S_FW_RI_WR_DCRC_DIS) & M_FW_RI_WR_DCRC_DIS)
+#define F_FW_RI_WR_DCRC_DIS V_FW_RI_WR_DCRC_DIS(1U)
+
+#define S_FW_RI_WR_HCRC_DIS 6
+#define M_FW_RI_WR_HCRC_DIS 0x1
+#define V_FW_RI_WR_HCRC_DIS(x) ((x) << S_FW_RI_WR_HCRC_DIS)
+#define G_FW_RI_WR_HCRC_DIS(x) \
+ (((x) >> S_FW_RI_WR_HCRC_DIS) & M_FW_RI_WR_HCRC_DIS)
+#define F_FW_RI_WR_HCRC_DIS V_FW_RI_WR_HCRC_DIS(1U)
+
+#define S_FW_RI_WR_PSZ_IDX 4
+#define M_FW_RI_WR_PSZ_IDX 0x3
+#define V_FW_RI_WR_PSZ_IDX(x) ((x) << S_FW_RI_WR_PSZ_IDX)
+#define G_FW_RI_WR_PSZ_IDX(x) \
+ (((x) >> S_FW_RI_WR_PSZ_IDX) & M_FW_RI_WR_PSZ_IDX)
+
+#define S_FW_RI_WR_DCRC 1
+#define M_FW_RI_WR_DCRC 0x1
+#define V_FW_RI_WR_DCRC(x) ((x) << S_FW_RI_WR_DCRC)
+#define G_FW_RI_WR_DCRC(x) (((x) >> S_FW_RI_WR_DCRC) & M_FW_RI_WR_DCRC)
+#define F_FW_RI_WR_DCRC V_FW_RI_WR_DCRC(1U)
+
+#define S_FW_RI_WR_HCRC 0
+#define M_FW_RI_WR_HCRC 0x1
+#define V_FW_RI_WR_HCRC(x) ((x) << S_FW_RI_WR_HCRC)
+#define G_FW_RI_WR_HCRC(x) (((x) >> S_FW_RI_WR_HCRC) & M_FW_RI_WR_HCRC)
+#define F_FW_RI_WR_HCRC V_FW_RI_WR_HCRC(1U)
/******************************************************************************
* R o C E V 2 W O R K R E Q U E S T s
@@ -2951,6 +2998,24 @@ struct fw_v2_nvmet_tx_data_wr {
#endif
};
+#define S_FW_V2_NVMET_TX_DATA_WR_DACK_CHANGE 20
+#define M_FW_V2_NVMET_TX_DATA_WR_DACK_CHANGE 0x1
+#define V_FW_V2_NVMET_TX_DATA_WR_DACK_CHANGE(x) \
+ ((x) << S_FW_V2_NVMET_TX_DATA_WR_DACK_CHANGE)
+#define G_FW_V2_NVMET_TX_DATA_WR_DACK_CHANGE(x) \
+ (((x) >> S_FW_V2_NVMET_TX_DATA_WR_DACK_CHANGE) & \
+ M_FW_V2_NVMET_TX_DATA_WR_DACK_CHANGE)
+#define F_FW_V2_NVMET_TX_DATA_WR_DACK_CHANGE \
+ V_FW_V2_NVMET_TX_DATA_WR_DACK_CHANGE(1U)
+
+#define S_FW_V2_NVMET_TX_DATA_WR_DACK_MODE 18
+#define M_FW_V2_NVMET_TX_DATA_WR_DACK_MODE 0x3
+#define V_FW_V2_NVMET_TX_DATA_WR_DACK_MODE(x) \
+ ((x) << S_FW_V2_NVMET_TX_DATA_WR_DACK_MODE)
+#define G_FW_V2_NVMET_TX_DATA_WR_DACK_MODE(x) \
+ (((x) >> S_FW_V2_NVMET_TX_DATA_WR_DACK_MODE) & \
+ M_FW_V2_NVMET_TX_DATA_WR_DACK_MODE)
+
#define S_FW_V2_NVMET_TX_DATA_WR_FLAGS_HI 10
#define M_FW_V2_NVMET_TX_DATA_WR_FLAGS_HI 0x3fffff
#define V_FW_V2_NVMET_TX_DATA_WR_FLAGS_HI(x) \
@@ -4990,6 +5055,16 @@ struct fw_crypto_update_sa_wr {
} key;
};
+#define S_FW_CRYPTO_UPDATE_SA_WR_EG_IPVER 3
+#define M_FW_CRYPTO_UPDATE_SA_WR_EG_IPVER 0x1
+#define V_FW_CRYPTO_UPDATE_SA_WR_EG_IPVER(x) \
+ ((x) << S_FW_CRYPTO_UPDATE_SA_WR_EG_IPVER)
+#define G_FW_CRYPTO_UPDATE_SA_WR_EG_IPVER(x) \
+ (((x) >> S_FW_CRYPTO_UPDATE_SA_WR_EG_IPVER) & \
+ M_FW_CRYPTO_UPDATE_SA_WR_EG_IPVER)
+#define F_FW_CRYPTO_UPDATE_SA_WR_EG_IPVER \
+ V_FW_CRYPTO_UPDATE_SA_WR_EG_IPVER(1U)
+
#define S_FW_CRYPTO_UPDATE_SA_WR_SAOP 2
#define M_FW_CRYPTO_UPDATE_SA_WR_SAOP 0x1
#define V_FW_CRYPTO_UPDATE_SA_WR_SAOP(x) \
@@ -8952,24 +9027,40 @@ enum fw_port_type {
FW_PORT_TYPE_KX4 = 5, /* No, 4, No, No, Yes, Yes, 10G */
FW_PORT_TYPE_CX4 = 6, /* No, 4, No, No, No, No, 10G */
FW_PORT_TYPE_KX = 7, /* No, 1, No, No, Yes, No, 1G */
- FW_PORT_TYPE_KR = 8, /* No, 1, No, No, Yes, Yes, 10G */
+ FW_PORT_TYPE_KR = 8, /* No, 1, No, No, Yes, Yes, 10G BP AN */
FW_PORT_TYPE_SFP = 9, /* No, 1, Yes, No, No, No, 10G */
- FW_PORT_TYPE_BP_AP = 10, /* No, 1, No, No, Yes, Yes, 10G, BP ANGE */
- FW_PORT_TYPE_BP4_AP = 11, /* No, 4, No, No, Yes, Yes, 10G, BP ANGE */
+ FW_PORT_TYPE_BP_AP = 10, /* No, 1, No, No, Yes, Yes, 10G, BP AN */
+ FW_PORT_TYPE_BP4_AP = 11, /* No, 4, No, No, Yes, Yes, 10G, BP AN */
FW_PORT_TYPE_QSFP_10G = 12, /* No, 1, Yes, No, No, No, 10G */
FW_PORT_TYPE_QSA = 13, /* No, 1, Yes, No, No, No, 10G */
FW_PORT_TYPE_QSFP = 14, /* No, 4, Yes, No, No, No, 40G */
- FW_PORT_TYPE_BP40_BA = 15, /* No, 4, No, No, Yes, Yes, 40G/10G/1G, BP ANGE */
- FW_PORT_TYPE_KR4_100G = 16, /* No, 4, 100G/40G/25G, Backplane */
+ FW_PORT_TYPE_BP40_BA = 15, /* No, 4, No, No, Yes, Yes, 40G/10G/1G, BP AN */
+ FW_PORT_TYPE_KR4_100G = 16, /* No, 4, 100G/40G/50G/25G/10G/1G, BP AN */
FW_PORT_TYPE_CR4_QSFP = 17, /* No, 4, 100G/40G/25G */
- FW_PORT_TYPE_CR_QSFP = 18, /* No, 1, 25G Spider cable */
- FW_PORT_TYPE_CR2_QSFP = 19, /* No, 2, 50G */
+ FW_PORT_TYPE_CR_QSFP = 18, /* No, 1, 25G, Spider cable */
+ FW_PORT_TYPE_CR2_QSFP = 19, /* No, 2, 50G, Spider cable */
FW_PORT_TYPE_SFP28 = 20, /* No, 1, 25G/10G/1G */
FW_PORT_TYPE_KR_SFP28 = 21, /* No, 1, 25G/10G/1G using Backplane */
FW_PORT_TYPE_KR_XLAUI = 22, /* No, 4, 40G/10G/1G, No AN*/
+ FW_PORT_TYPE_BARE_LINK_50G = 23, /* No, 1, 50G */
+ FW_PORT_TYPE_BARE_LINK_100G = 24, /* No, 2, 100G/50G */
+ FW_PORT_TYPE_BARE_LINK_200G = 25, /* No, 4, 200G/100G/50G */
FW_PORT_TYPE_SFP56 = 26, /* No, 1, 50G/25G */
FW_PORT_TYPE_QSFP56 = 27, /* No, 4, 200G/100G/50G/25G */
- FW_PORT_TYPE_QSFPDD = 34, /* No, 8, 400G/200G/100G/50G */
+ FW_PORT_TYPE_QSFP56_4_50G = 28, /* No, 1, 50G, Spider cable */
+ FW_PORT_TYPE_KR_50G = 29, /* No, 1, 50G/25G/10G/1G, BP AN */
+ FW_PORT_TYPE_KR2_100G = 30, /* No, 2, 100G/50G/25G/10G/1G, BP AN */
+ FW_PORT_TYPE_KR4_200G = 31, /* No, 4, 200G/100G/40G/50G/25G/10G/1G, BP AN */
+ FW_PORT_TYPE_QSFP56_2_50G = 32, /* No, 1, 50G, Spider cable */
+ FW_PORT_TYPE_OSFP = 33, /* No, 8, 400G/200G/100G/50G */
+ FW_PORT_TYPE_QSFPDD = 34, /* No, 8, 400G/200G/100G/50G */
+ FW_PORT_TYPE_OSFP_2_200G = 35, /* No, 4, 200G, Spider cable */
+ FW_PORT_TYPE_QSFPDD_2_200G = 36,/* No, 4, 200G, Spider cable */
+ FW_PORT_TYPE_KR8_400G = 37, /* No, 8, 400G/200G/100G/50G/40G/25G/10G/1G, BP AN */
+ FW_PORT_TYPE_QSFP56_2_100G = 38,/* No, 2, 100G, Spider cable */
+ FW_PORT_TYPE_QSFPDD_4_100G = 39,/* No, 2, 100G, Spider cable */
+ FW_PORT_TYPE_KR2_50G = 40, /* No, 1, 50G/25G/10G/1G, BP AN */
+ FW_PORT_TYPE_MAX,
FW_PORT_TYPE_NONE = M_FW_PORT_CMD_PORTTYPE32
};
diff --git a/sys/dev/cxgbe/firmware/t7fw_cfg.txt b/sys/dev/cxgbe/firmware/t7fw_cfg.txt
index 70b05da04a23..33c703fdc9d7 100644
--- a/sys/dev/cxgbe/firmware/t7fw_cfg.txt
+++ b/sys/dev/cxgbe/firmware/t7fw_cfg.txt
@@ -175,6 +175,11 @@
# TPT error.
# Err2uP = 0
+ # ULP_TX_ACCELERATOR_CTL
+ reg[0x8f90] = 0x00000015/0x00000015 # Compression block clock gating
+ # Dedupe clock gating
+ # Erasure Coding clock gating
+
#ULP_RX_CTL1
reg[0x19330] = 0x000000f0/0x000000f0 # RDMA_Invld_Msg_Dis = 3
# ROCE_Invld_Msg_Dis = 3
@@ -201,7 +206,7 @@
# default gc enabled.
# HMA configuration (uncomment following lines to enable HMA)
- hma_size = 128 # Size (in MBs) of host memory expected
+ hma_size = 256 # Size (in MBs) of host memory expected
hma_regions = iscsi,rrq,tls,ddp,pmrx,stag,pbl,rq # What all regions to place in host memory
#mc[0]=0
@@ -394,8 +399,7 @@
neq = 16 # niqflint + nethctrl Egress Queues
nexactf = 8 # number of exact MPSTCAM MAC filters
cmask = all # access to all channels
- #pmask = 0x4 # access to only one port
- pmask = 0x1 # access to only one port
+ pmask = 0x4 # access to only one port
[function "3"]
nvf = 16 # NVF on this function
@@ -407,7 +411,7 @@
neq = 16 # niqflint + nethctrl Egress Queues
nexactf = 8 # number of exact MPSTCAM MAC filters
cmask = all # access to all channels
- #pmask = 0x2 # access to only one port
+ pmask = 0x8 # access to only one port
# Some OS Drivers manage all application functions for all ports via PF4.
# Thus we need to provide a large number of resources here. For Egress
@@ -421,7 +425,7 @@
r_caps = all # read permissions for all commands
nvi = 28 # NVI_UNIFIED
niqflint = 170 # NFLIQ_UNIFIED + NLFIQ_WD
- nethctrl = 224 # NETHCTRL_UNIFIED + NETHCTRL_WD
+ nethctrl = 288 # NETHCTRL_UNIFIED + NETHCTRL_WD
neq = 252 # NEQ_UNIFIED + NEQ_WD
nqpcq = 12288
nexactf = 40 # NMPSTCAM_UNIFIED
@@ -435,8 +439,7 @@
nserver = 480 # number of server region entries
nhash = 12288 # number of hash region entries
nhpfilter = 64 # number of high priority filter region entries
- #protocol = nic_vm, ofld, rddp, rdmac, iscsi_initiator_pdu, iscsi_target_pdu, iscsi_t10dif, tlskeys, crypto_lookaside, ipsec_inline, rocev2, nic_hashfilter, ofld_sendpath
- protocol = nic_vm, ofld, rddp, rdmac, iscsi_initiator_pdu, iscsi_target_pdu, iscsi_t10dif, tlskeys, crypto_lookaside, ipsec_inline, rocev2, nic_hashfilter, nvme_tcp
+ protocol = nic_vm, ofld, rddp, rdmac, iscsi_initiator_pdu, iscsi_target_pdu, iscsi_t10dif, tlskeys, crypto_lookaside, ipsec_inline, rocev2, nic_hashfilter, nvme_tcp, ofld_sendpath
tp_l2t = 3072
tp_ddp = 2
tp_ddp_iscsi = 2
@@ -643,7 +646,7 @@
[fini]
version = 0x1425001d
- checksum = 0x3671da3b
+ checksum = 0x2419f987
# Total resources used by above allocations:
# Virtual Interfaces: 104
diff --git a/sys/dev/cxgbe/firmware/t7fw_cfg_uwire.txt b/sys/dev/cxgbe/firmware/t7fw_cfg_uwire.txt
index b1f5129238eb..9da841153138 100644
--- a/sys/dev/cxgbe/firmware/t7fw_cfg_uwire.txt
+++ b/sys/dev/cxgbe/firmware/t7fw_cfg_uwire.txt
@@ -175,6 +175,11 @@
# TPT error.
# Err2uP = 0
+ # ULP_TX_ACCELERATOR_CTL
+ reg[0x8f90] = 0x00000015/0x00000015 # Compression block clock gating
+ # Dedupe clock gating
+ # Erasure Coding clock gating
+
#ULP_RX_CTL1
reg[0x19330] = 0x000000f0/0x000000f0 # RDMA_Invld_Msg_Dis = 3
# ROCE_Invld_Msg_Dis = 3
@@ -201,7 +206,7 @@
# default gc enabled.
# HMA configuration (uncomment following lines to enable HMA)
- hma_size = 128 # Size (in MBs) of host memory expected
+ hma_size = 256 # Size (in MBs) of host memory expected
hma_regions = iscsi,rrq,tls,ddp,pmrx,stag,pbl,rq # What all regions to place in host memory
#mc[0]=0
@@ -394,8 +399,7 @@
neq = 16 # niqflint + nethctrl Egress Queues
nexactf = 8 # number of exact MPSTCAM MAC filters
cmask = all # access to all channels
- #pmask = 0x4 # access to only one port
- pmask = 0x1 # access to only one port
+ pmask = 0x4 # access to only one port
[function "3"]
nvf = 16 # NVF on this function
@@ -407,7 +411,7 @@
neq = 16 # niqflint + nethctrl Egress Queues
nexactf = 8 # number of exact MPSTCAM MAC filters
cmask = all # access to all channels
- #pmask = 0x2 # access to only one port
+ pmask = 0x8 # access to only one port
# Some OS Drivers manage all application functions for all ports via PF4.
# Thus we need to provide a large number of resources here. For Egress
@@ -421,7 +425,7 @@
r_caps = all # read permissions for all commands
nvi = 28 # NVI_UNIFIED
niqflint = 170 # NFLIQ_UNIFIED + NLFIQ_WD
- nethctrl = 224 # NETHCTRL_UNIFIED + NETHCTRL_WD
+ nethctrl = 288 # NETHCTRL_UNIFIED + NETHCTRL_WD
neq = 252 # NEQ_UNIFIED + NEQ_WD
nqpcq = 12288
nexactf = 40 # NMPSTCAM_UNIFIED
@@ -435,8 +439,7 @@
nserver = 480 # number of server region entries
nhash = 12288 # number of hash region entries
nhpfilter = 64 # number of high priority filter region entries
- #protocol = nic_vm, ofld, rddp, rdmac, iscsi_initiator_pdu, iscsi_target_pdu, iscsi_t10dif, tlskeys, crypto_lookaside, ipsec_inline, rocev2, nic_hashfilter, ofld_sendpath
- protocol = nic_vm, ofld, rddp, rdmac, iscsi_initiator_pdu, iscsi_target_pdu, iscsi_t10dif, tlskeys, crypto_lookaside, ipsec_inline, rocev2, nic_hashfilter, nvme_tcp
+ protocol = nic_vm, ofld, rddp, rdmac, iscsi_initiator_pdu, iscsi_target_pdu, iscsi_t10dif, tlskeys, crypto_lookaside, ipsec_inline, rocev2, nic_hashfilter, nvme_tcp, ofld_sendpath
tp_l2t = 3072
tp_ddp = 2
tp_ddp_iscsi = 2
@@ -643,7 +646,7 @@
[fini]
version = 0x1425001d
- checksum = 0x96513217
+ checksum = 0x83f95163
# Total resources used by above allocations:
# Virtual Interfaces: 104
diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c
index 69ecfce1dade..d73204eb808c 100644
--- a/sys/dev/cxgbe/t4_main.c
+++ b/sys/dev/cxgbe/t4_main.c
@@ -3760,10 +3760,17 @@ port_mword(struct port_info *pi, uint32_t speed)
return (IFM_NONE);
}
break;
- case M_FW_PORT_CMD_PTYPE: /* FW_PORT_TYPE_NONE for old firmware */
- if (chip_id(pi->adapter) >= CHELSIO_T7)
- return (IFM_UNKNOWN);
- /* fall through */
+ case FW_PORT_TYPE_KR4_200G: {
+ /*
+ * Pre-T7 firmware used M_FW_PORT_CMD_PTYPE for PORT_TYPE_NONE
+ * and driver needs to deal with both.
+ */
+ _Static_assert(M_FW_PORT_CMD_PTYPE == FW_PORT_TYPE_KR4_200G,
+ "driver/firmware mismatch");
+ if (chip_id(pi->adapter) < CHELSIO_T7)
+ return (IFM_NONE);
+ return (IFM_200G_KR4_PAM4);
+ }
case FW_PORT_TYPE_NONE:
return (IFM_NONE);
}
diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
index 0dddd2dd263f..b5a3012accd6 100644
--- a/sys/dev/pci/pci.c
+++ b/sys/dev/pci/pci.c
@@ -3756,7 +3756,7 @@ xhci_early_takeover(device_t self)
struct resource *res;
uint32_t cparams;
uint32_t eec;
- uint8_t eecp;
+ uint32_t eecp;
uint8_t bios_sem;
uint8_t offs;
int rid;
diff --git a/sys/dev/rge/if_rge.c b/sys/dev/rge/if_rge.c
index 8887e8d39ae4..06f034ebd61d 100644
--- a/sys/dev/rge/if_rge.c
+++ b/sys/dev/rge/if_rge.c
@@ -113,6 +113,7 @@ struct rge_matchid {
const struct rge_matchid rge_devices[] = {
{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_E3000, "Killer E3000" },
+ { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_E5000, "Killer E5000" },
{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8125, "RTL8125" },
{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8126, "RTL8126", },
{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8127, "RTL8127" },
diff --git a/sys/dev/rge/if_rge_vendor.h b/sys/dev/rge/if_rge_vendor.h
index eea94e39e20b..f80b99f1f8b6 100644
--- a/sys/dev/rge/if_rge_vendor.h
+++ b/sys/dev/rge/if_rge_vendor.h
@@ -21,6 +21,7 @@
#define PCI_VENDOR_REALTEK 0x10ec
#define PCI_PRODUCT_REALTEK_E3000 0x3000
+#define PCI_PRODUCT_REALTEK_E5000 0x5000
#define PCI_PRODUCT_REALTEK_RTL8125 0x8125
#define PCI_PRODUCT_REALTEK_RTL8126 0x8126
#define PCI_PRODUCT_REALTEK_RTL8127 0x8127
diff --git a/sys/dev/smartpqi/smartpqi_cam.c b/sys/dev/smartpqi/smartpqi_cam.c
index 690b38c9f855..6ded8aa97e39 100644
--- a/sys/dev/smartpqi/smartpqi_cam.c
+++ b/sys/dev/smartpqi/smartpqi_cam.c
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -1300,7 +1300,7 @@ register_sim(struct pqisrc_softstate *softs, int card_index)
csa.callback_arg = softs;
xpt_action((union ccb *)&csa);
if (csa.ccb_h.status != CAM_REQ_CMP) {
- DBG_ERR("Unable to register smartpqi_aysnc handler: %d!\n",
+ DBG_ERR("Unable to register smartpqi_async handler: %d!\n",
csa.ccb_h.status);
}
diff --git a/sys/dev/smartpqi/smartpqi_defines.h b/sys/dev/smartpqi/smartpqi_defines.h
index 0277abd3e318..c4084f069588 100644
--- a/sys/dev/smartpqi/smartpqi_defines.h
+++ b/sys/dev/smartpqi/smartpqi_defines.h
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -944,12 +944,12 @@ typedef uint8_t *passthru_buf_type_t;
#define PQISRC_DRIVER_MAJOR __FreeBSD__
#if __FreeBSD__ <= 14
-#define PQISRC_DRIVER_MINOR 4690
+#define PQISRC_DRIVER_MINOR 4691
#else
#define PQISRC_DRIVER_MINOR 2
#endif
-#define PQISRC_DRIVER_RELEASE 0
-#define PQISRC_DRIVER_REVISION 2008
+#define PQISRC_DRIVER_RELEASE 1
+#define PQISRC_DRIVER_REVISION 2000
#define STR(s) # s
#define PQISRC_VERSION(a, b, c, d) STR(a.b.c-d)
diff --git a/sys/dev/smartpqi/smartpqi_discovery.c b/sys/dev/smartpqi/smartpqi_discovery.c
index a7de5a149810..8682e6cabd7e 100644
--- a/sys/dev/smartpqi/smartpqi_discovery.c
+++ b/sys/dev/smartpqi/smartpqi_discovery.c
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -155,7 +155,7 @@ pqisrc_remove_target_bit(pqisrc_softstate_t *softs, int target)
softs->bit_map.bit_vector[target] = SLOT_AVAILABLE;
}
-/* Use bit map to find availible targets */
+/* Use bit map to find available targets */
int
pqisrc_find_avail_target(pqisrc_softstate_t *softs)
{
@@ -1423,7 +1423,11 @@ pqisrc_add_device(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device)
if(device->expose_device) {
pqisrc_init_device_active_io(softs, device);
- /* TBD: Call OS upper layer function to add the device entry */
+ device_printf(softs->os_specific.pqi_dev,
+ "device added: vendor=%s model=%s B%d:T%d:L%d type=%s\n",
+ device->vendor, device->model,
+ device->bus, device->target, device->lun,
+ device->is_physical_device ? "physical" : "logical");
os_add_device(softs,device);
}
DBG_FUNC("OUT\n");
@@ -1451,6 +1455,11 @@ pqisrc_remove_device(pqisrc_softstate_t *softs, pqi_scsi_dev_t *device)
}
/* Wait for device outstanding Io's */
pqisrc_wait_for_device_commands_to_complete(softs, device);
+ device_printf(softs->os_specific.pqi_dev,
+ "device removed: vendor=%s model=%s B%d:T%d:L%d type=%s\n",
+ device->vendor, device->model,
+ device->bus, device->target, device->lun,
+ device->is_physical_device ? "physical" : "logical");
/* Call OS upper layer function to remove the exposed device entry */
os_remove_device(softs,device);
DBG_FUNC("OUT\n");
@@ -1674,10 +1683,14 @@ pqisrc_update_device_list(pqisrc_softstate_t *softs,
case DEVICE_NOT_FOUND:
/* Device not found in existing list */
device->new_device = true;
+ DBG_DISC("new device found B%d:T%d:L%d\n",
+ device->bus, device->target, device->lun);
break;
case DEVICE_CHANGED:
/* Actual device gone need to add device to list*/
device->new_device = true;
+ DBG_DISC("device changed B%d:T%d:L%d\n",
+ device->bus, device->target, device->lun);
break;
case DEVICE_IN_REMOVE:
/*Older device with same target/lun is in removal stage*/
@@ -1686,6 +1699,8 @@ pqisrc_update_device_list(pqisrc_softstate_t *softs,
* free call*/
device->new_device = false;
same_device->schedule_rescan = true;
+ DBG_DISC("device in removal B%d:T%d:L%d, scheduling rescan\n",
+ device->bus, device->target, device->lun);
break;
default:
break;
diff --git a/sys/dev/smartpqi/smartpqi_event.c b/sys/dev/smartpqi/smartpqi_event.c
index 77a70f9fb031..c3c27c9e1c0b 100644
--- a/sys/dev/smartpqi/smartpqi_event.c
+++ b/sys/dev/smartpqi/smartpqi_event.c
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -204,6 +204,17 @@ pqisrc_process_event_intr_src(pqisrc_softstate_t *softs,int obq_id)
}
if (event_index >= 0) {
+ static const char *event_names[] = {
+ [PQI_EVENT_HOTPLUG] = "hotplug",
+ [PQI_EVENT_HARDWARE] = "hardware",
+ [PQI_EVENT_PHYSICAL_DEVICE] = "physical device",
+ [PQI_EVENT_LOGICAL_DEVICE] = "logical device",
+ [PQI_EVENT_AIO_STATE_CHANGE] = "AIO state change",
+ [PQI_EVENT_AIO_CONFIG_CHANGE] = "AIO config change",
+ };
+ device_printf(softs->os_specific.pqi_dev,
+ "event: %s (type=0x%x)\n",
+ event_names[event_index], response.event_type);
if(response.request_acknowledge) {
pending_event = &softs->pending_events[event_index];
pending_event->pending = true;
@@ -385,7 +396,7 @@ pqisrc_report_event_config(pqisrc_softstate_t *softs)
pqi_event_config_request_t request;
pqi_event_config_t *event_config_p ;
dma_mem_t buf_report_event ;
- /*bytes to be allocaed for report event config data-in buffer */
+ /*bytes to be allocated for report event config data-in buffer */
uint32_t alloc_size = sizeof(pqi_event_config_t) ;
memset(&request, 0 , sizeof(request));
@@ -446,7 +457,7 @@ pqisrc_set_event_config(pqisrc_softstate_t *softs)
pqi_event_config_request_t request;
pqi_event_config_t *event_config_p;
dma_mem_t buf_set_event;
- /*bytes to be allocaed for set event config data-out buffer */
+ /*bytes to be allocated for set event config data-out buffer */
uint32_t alloc_size = sizeof(pqi_event_config_t);
memset(&request, 0 , sizeof(request));
diff --git a/sys/dev/smartpqi/smartpqi_main.c b/sys/dev/smartpqi/smartpqi_main.c
index 1f006939bf7c..fbfbcc962f35 100644
--- a/sys/dev/smartpqi/smartpqi_main.c
+++ b/sys/dev/smartpqi/smartpqi_main.c
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -427,6 +427,16 @@ smartpqi_attach(device_t dev)
goto out;
}
+ /* Register sysctl for runtime debug_level changes */
+ {
+ struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
+ struct sysctl_oid *tree = device_get_sysctl_tree(dev);
+
+ SYSCTL_ADD_ULONG(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
+ "debug_level", CTLFLAG_RW, &logging_level,
+ "Debug logging bitmask");
+ }
+
goto out;
dma_out:
diff --git a/sys/dev/smartpqi/smartpqi_misc.c b/sys/dev/smartpqi/smartpqi_misc.c
index 6db0d80ed993..fd0b907aa252 100644
--- a/sys/dev/smartpqi/smartpqi_misc.c
+++ b/sys/dev/smartpqi/smartpqi_misc.c
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -252,7 +252,7 @@ bsd_set_hint_scatter_gather_config(struct pqisrc_softstate *softs)
DBG_FUNC("IN\n");
- /* At least > 16 sg's required to wotk hint correctly.
+ /* At least > 16 sg's required to work hint correctly.
* Default the sg count set by driver/controller. */
if ((!softs->hint.sg_segments) || (softs->hint.sg_segments >
diff --git a/sys/dev/smartpqi/smartpqi_queue.c b/sys/dev/smartpqi/smartpqi_queue.c
index e8a467531aa4..679d956f6f36 100644
--- a/sys/dev/smartpqi/smartpqi_queue.c
+++ b/sys/dev/smartpqi/smartpqi_queue.c
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -729,7 +729,7 @@ pqisrc_create_op_ibq(pqisrc_softstate_t *softs,
op_ib_q->pi_register_offset);
} else {
int i = 0;
- DBG_WARN("Error Status Decsriptors\n");
+ DBG_WARN("Error Status Descriptors\n");
for (i = 0; i < 4; i++)
DBG_WARN(" %x\n",admin_resp.resp_type.create_op_iq.status_desc[i]);
}
diff --git a/sys/dev/smartpqi/smartpqi_request.c b/sys/dev/smartpqi/smartpqi_request.c
index c5f8ac3c41ba..655660615797 100644
--- a/sys/dev/smartpqi/smartpqi_request.c
+++ b/sys/dev/smartpqi/smartpqi_request.c
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -1998,7 +1998,7 @@ pqisrc_send_raid_tmf(pqisrc_softstate_t *softs, pqi_scsi_dev_t const *devp,
if (softs->timeout_in_tmf &&
tmf_type == SOP_TASK_MANAGEMENT_LUN_RESET) {
- /* OS_TMF_TIMEOUT_SEC - 1 to accomodate driver processing */
+ /* OS_TMF_TIMEOUT_SEC - 1 to accommodate driver processing */
tmf_req.timeout_in_sec = OS_TMF_TIMEOUT_SEC - 1;
}
diff --git a/sys/dev/smartpqi/smartpqi_response.c b/sys/dev/smartpqi/smartpqi_response.c
index 38695860e520..1ae74a5b95ff 100644
--- a/sys/dev/smartpqi/smartpqi_response.c
+++ b/sys/dev/smartpqi/smartpqi_response.c
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -275,7 +275,7 @@ pqisrc_is_innocuous_error(pqisrc_softstate_t *softs, rcb_t *rcb, void *err_info)
if (raid_err->data_out_result == PQI_RAID_DATA_IN_OUT_UNDERFLOW)
return true;
- /* We get these a alot: leave a tiny breadcrumb about the error,
+ /* We get these a lot: leave a tiny breadcrumb about the error,
but don't do full spew about it */
if (raid_err->status == PQI_AIO_STATUS_CHECK_CONDITION)
{
diff --git a/sys/dev/smartpqi/smartpqi_sis.c b/sys/dev/smartpqi/smartpqi_sis.c
index 82eb999ca4b8..99aa952eb149 100644
--- a/sys/dev/smartpqi/smartpqi_sis.c
+++ b/sys/dev/smartpqi/smartpqi_sis.c
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -26,7 +26,7 @@
#include "smartpqi_includes.h"
-/* Function for disabling msix interrupots */
+/* Function for disabling msix interrupts */
void
sis_disable_msix(pqisrc_softstate_t *softs)
{
@@ -96,7 +96,7 @@ sis_disable_interrupt(pqisrc_softstate_t *softs)
sis_disable_msix(softs);
break;
default:
- DBG_ERR("Inerrupt mode none!\n");
+ DBG_ERR("Interrupt mode none!\n");
break;
}
diff --git a/sys/dev/smartpqi/smartpqi_structures.h b/sys/dev/smartpqi/smartpqi_structures.h
index 0c9ad375823d..ada6676ada8f 100644
--- a/sys/dev/smartpqi/smartpqi_structures.h
+++ b/sys/dev/smartpqi/smartpqi_structures.h
@@ -1,5 +1,5 @@
/*-
- * Copyright 2016-2025 Microchip Technology, Inc. and/or its subsidiaries.
+ * Copyright 2016-2026 Microchip Technology, Inc. and/or its subsidiaries.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -1168,7 +1168,7 @@ typedef struct bmic_sense_feature_page_header {
uint8_t page;
uint8_t sub_page;
uint16_t total_length; /** Total length of the page.
- * The length is the same wheteher the request buffer is too short or not.
+ * The length is the same whether the request buffer is too short or not.
* When printing out the page, only print the buffer length. */
} OS_ATTRIBUTE_PACKED bmic_sense_feature_page_header_t;
diff --git a/sys/dev/syscons/syscons.c b/sys/dev/syscons/syscons.c
index 1a2969d6f2d8..fe440b68f209 100644
--- a/sys/dev/syscons/syscons.c
+++ b/sys/dev/syscons/syscons.c
@@ -3987,10 +3987,10 @@ next_code:
break;
case SUSP:
- power_pm_suspend(POWER_SSTATE_TRANSITION_SUSPEND);
+ power_pm_suspend(POWER_TRANSITION_SUSPEND);
break;
case STBY:
- power_pm_suspend(POWER_SSTATE_TRANSITION_STANDBY);
+ power_pm_suspend(POWER_TRANSITION_STANDBY);
break;
case DBG:
diff --git a/sys/dev/thunderbolt/tbcfg_reg.h b/sys/dev/thunderbolt/tbcfg_reg.h
index bb68faa543b0..6ae5c6fea7fa 100644
--- a/sys/dev/thunderbolt/tbcfg_reg.h
+++ b/sys/dev/thunderbolt/tbcfg_reg.h
@@ -52,7 +52,7 @@ struct tb_cfg_read {
uint32_t crc;
};
-/* Config space read request, 6.4.2.4 */
+/* Config space read response, 6.4.2.4 */
struct tb_cfg_read_resp {
tb_route_t route;
uint32_t addr_attrs;
diff --git a/sys/dev/ufshci/ufshci_private.h b/sys/dev/ufshci/ufshci_private.h
index 067b51a419e8..8d18fab982d7 100644
--- a/sys/dev/ufshci/ufshci_private.h
+++ b/sys/dev/ufshci/ufshci_private.h
@@ -262,11 +262,11 @@ static const struct ufshci_power_entry power_map[POWER_STYPE_COUNT] = {
UFSHCI_UIC_LINK_STATE_ACTIVE },
[POWER_STYPE_STANDBY] = { UFSHCI_DEV_PWR_SLEEP, SSS_PC_IDLE,
UFSHCI_UIC_LINK_STATE_HIBERNATE },
- [POWER_STYPE_SUSPEND_TO_MEM] = { UFSHCI_DEV_PWR_POWERDOWN,
+ [POWER_STYPE_FW_SUSPEND] = { UFSHCI_DEV_PWR_POWERDOWN,
SSS_PC_STANDBY, UFSHCI_UIC_LINK_STATE_HIBERNATE },
[POWER_STYPE_SUSPEND_TO_IDLE] = { UFSHCI_DEV_PWR_SLEEP, SSS_PC_IDLE,
UFSHCI_UIC_LINK_STATE_HIBERNATE },
- [POWER_STYPE_HIBERNATE] = { UFSHCI_DEV_PWR_DEEPSLEEP, 0x40,
+ [POWER_STYPE_FW_HIBERNATE] = { UFSHCI_DEV_PWR_DEEPSLEEP, 0x40,
UFSHCI_UIC_LINK_STATE_OFF },
[POWER_STYPE_POWEROFF] = { UFSHCI_DEV_PWR_POWERDOWN, SSS_PC_STANDBY,
UFSHCI_UIC_LINK_STATE_OFF },
diff --git a/sys/dev/vt/vt_core.c b/sys/dev/vt/vt_core.c
index f7cffcea5b92..68e9f45cff56 100644
--- a/sys/dev/vt/vt_core.c
+++ b/sys/dev/vt/vt_core.c
@@ -804,11 +804,11 @@ vt_machine_kbdevent(struct vt_device *vd, int c)
return (1);
case SPCLKEY | STBY: /* XXX Not present in kbdcontrol parser. */
/* Put machine into Stand-By mode. */
- power_pm_suspend(POWER_SSTATE_TRANSITION_STANDBY);
+ power_pm_suspend(POWER_TRANSITION_STANDBY);
return (1);
case SPCLKEY | SUSP: /* kbdmap(5) keyword `susp`. */
/* Suspend machine. */
- power_pm_suspend(POWER_SSTATE_TRANSITION_SUSPEND);
+ power_pm_suspend(POWER_TRANSITION_SUSPEND);
return (1);
}
diff --git a/sys/dev/xen/control/control.c b/sys/dev/xen/control/control.c
index 2c61b48c0451..e363ea1700f6 100644
--- a/sys/dev/xen/control/control.c
+++ b/sys/dev/xen/control/control.c
@@ -176,12 +176,12 @@ xctrl_suspend(void)
cpuset_t cpu_suspend_map;
#endif
- EVENTHANDLER_INVOKE(power_suspend_early, POWER_STYPE_SUSPEND_TO_MEM);
+ EVENTHANDLER_INVOKE(power_suspend_early, POWER_STYPE_FW_SUSPEND);
xs_lock();
stop_all_proc();
xs_unlock();
suspend_all_fs();
- EVENTHANDLER_INVOKE(power_suspend, POWER_STYPE_SUSPEND_TO_MEM);
+ EVENTHANDLER_INVOKE(power_suspend, POWER_STYPE_FW_SUSPEND);
#ifdef EARLY_AP_STARTUP
MPASS(mp_ncpus == 1 || smp_started);
@@ -298,7 +298,7 @@ xctrl_suspend(void)
resume_all_fs();
resume_all_proc();
- EVENTHANDLER_INVOKE(power_resume, POWER_STYPE_SUSPEND_TO_MEM);
+ EVENTHANDLER_INVOKE(power_resume, POWER_STYPE_FW_SUSPEND);
if (bootverbose)
printf("System resumed after suspension\n");