diff options
Diffstat (limited to 'sys')
89 files changed, 0 insertions, 43428 deletions
diff --git a/sys/conf/files b/sys/conf/files index aa30c0cc64f0..91af21ab7a48 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -1541,55 +1541,6 @@ dev/dcons/dcons_crom.c optional dcons_crom dev/dcons/dcons_os.c optional dcons dev/de/if_de.c optional de pci dev/dme/if_dme.c optional dme -dev/drm/ati_pcigart.c optional drm -dev/drm/drm_agpsupport.c optional drm -dev/drm/drm_auth.c optional drm -dev/drm/drm_bufs.c optional drm -dev/drm/drm_context.c optional drm -dev/drm/drm_dma.c optional drm -dev/drm/drm_drawable.c optional drm -dev/drm/drm_drv.c optional drm -dev/drm/drm_fops.c optional drm -dev/drm/drm_hashtab.c optional drm -dev/drm/drm_ioctl.c optional drm -dev/drm/drm_irq.c optional drm -dev/drm/drm_lock.c optional drm -dev/drm/drm_memory.c optional drm -dev/drm/drm_mm.c optional drm -dev/drm/drm_pci.c optional drm -dev/drm/drm_scatter.c optional drm -dev/drm/drm_sman.c optional drm -dev/drm/drm_sysctl.c optional drm -dev/drm/drm_vm.c optional drm -dev/drm/mach64_dma.c optional mach64drm -dev/drm/mach64_drv.c optional mach64drm -dev/drm/mach64_irq.c optional mach64drm -dev/drm/mach64_state.c optional mach64drm -dev/drm/mga_dma.c optional mgadrm -dev/drm/mga_drv.c optional mgadrm -dev/drm/mga_irq.c optional mgadrm -dev/drm/mga_state.c optional mgadrm -dev/drm/mga_warp.c optional mgadrm -dev/drm/r128_cce.c optional r128drm \ - compile-with "${NORMAL_C} ${NO_WCONSTANT_CONVERSION}" -dev/drm/r128_drv.c optional r128drm -dev/drm/r128_irq.c optional r128drm -dev/drm/r128_state.c optional r128drm -dev/drm/savage_bci.c optional savagedrm -dev/drm/savage_drv.c optional savagedrm -dev/drm/savage_state.c optional savagedrm -dev/drm/sis_drv.c optional sisdrm -dev/drm/sis_ds.c optional sisdrm -dev/drm/sis_mm.c optional sisdrm -dev/drm/tdfx_drv.c optional tdfxdrm -dev/drm/via_dma.c optional viadrm -dev/drm/via_dmablit.c optional viadrm -dev/drm/via_drv.c optional viadrm -dev/drm/via_irq.c optional viadrm -dev/drm/via_map.c optional viadrm -dev/drm/via_mm.c optional viadrm -dev/drm/via_verifier.c optional viadrm -dev/drm/via_video.c optional viadrm dev/drm2/drm_agpsupport.c optional drm2 dev/drm2/drm_auth.c optional drm2 dev/drm2/drm_bufs.c optional drm2 diff --git a/sys/conf/kern.opts.mk b/sys/conf/kern.opts.mk index 9e7ed7429fa1..1ea097270be0 100644 --- a/sys/conf/kern.opts.mk +++ b/sys/conf/kern.opts.mk @@ -50,7 +50,6 @@ __DEFAULT_YES_OPTIONS = \ __DEFAULT_NO_OPTIONS = \ EXTRA_TCP_STACKS \ KERNEL_RETPOLINE \ - MODULE_DRM \ MODULE_DRM2 \ NAND \ OFED \ diff --git a/sys/dev/drm/ati_pcigart.c b/sys/dev/drm/ati_pcigart.c deleted file mode 100644 index 2c50e8bd3aab..000000000000 --- a/sys/dev/drm/ati_pcigart.c +++ /dev/null @@ -1,227 +0,0 @@ -/*- - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file ati_pcigart.c - * Implementation of ATI's PCIGART, which provides an aperture in card virtual - * address space with addresses remapped to system memory. - */ - -#include "dev/drm/drmP.h" - -#define ATI_PCIGART_PAGE_SIZE 4096 /* PCI GART page size */ -#define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1)) - -#define ATI_GART_NOSNOOP 0x1 -#define ATI_GART_WRITE 0x4 -#define ATI_GART_READ 0x8 - -static void -drm_ati_alloc_pcigart_table_cb(void *arg, bus_dma_segment_t *segs, - int nsegs, int error) -{ - struct drm_dma_handle *dmah = arg; - - if (error != 0) - return; - - KASSERT(nsegs == 1, - ("drm_ati_alloc_pcigart_table_cb: bad dma segment count")); - - dmah->busaddr = segs[0].ds_addr; -} - -static int -drm_ati_alloc_pcigart_table(struct drm_device *dev, - struct drm_ati_pcigart_info *gart_info) -{ - struct drm_dma_handle *dmah; - int flags, ret; - - dmah = malloc(sizeof(struct drm_dma_handle), DRM_MEM_DMA, - M_ZERO | M_NOWAIT); - if (dmah == NULL) - return ENOMEM; - - DRM_UNLOCK(); - ret = bus_dma_tag_create(NULL, PAGE_SIZE, 0, /* tag, align, boundary */ - gart_info->table_mask, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */ - NULL, NULL, /* filtfunc, filtfuncargs */ - gart_info->table_size, 1, /* maxsize, nsegs */ - gart_info->table_size, /* maxsegsize */ - 0, NULL, NULL, /* flags, lockfunc, lockfuncargs */ - &dmah->tag); - if (ret != 0) { - free(dmah, DRM_MEM_DMA); - return ENOMEM; - } - - flags = BUS_DMA_WAITOK | BUS_DMA_ZERO; - if (gart_info->gart_reg_if == DRM_ATI_GART_IGP) - flags |= BUS_DMA_NOCACHE; - - ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr, flags, &dmah->map); - if (ret != 0) { - bus_dma_tag_destroy(dmah->tag); - free(dmah, DRM_MEM_DMA); - return ENOMEM; - } - DRM_LOCK(); - - ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr, - gart_info->table_size, drm_ati_alloc_pcigart_table_cb, dmah, - BUS_DMA_NOWAIT); - if (ret != 0) { - bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map); - bus_dma_tag_destroy(dmah->tag); - free(dmah, DRM_MEM_DMA); - return ENOMEM; - } - - gart_info->dmah = dmah; - - return 0; -} - -static void -drm_ati_free_pcigart_table(struct drm_device *dev, - struct drm_ati_pcigart_info *gart_info) -{ - struct drm_dma_handle *dmah = gart_info->dmah; - - bus_dmamap_unload(dmah->tag, dmah->map); - bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map); - bus_dma_tag_destroy(dmah->tag); - free(dmah, DRM_MEM_DMA); - gart_info->dmah = NULL; -} - -int -drm_ati_pcigart_cleanup(struct drm_device *dev, - struct drm_ati_pcigart_info *gart_info) -{ - /* we need to support large memory configurations */ - if (dev->sg == NULL) { - DRM_ERROR("no scatter/gather memory!\n"); - return 0; - } - - if (gart_info->bus_addr) { - if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { - gart_info->bus_addr = 0; - if (gart_info->dmah) - drm_ati_free_pcigart_table(dev, gart_info); - } - } - - return 1; -} - -int -drm_ati_pcigart_init(struct drm_device *dev, - struct drm_ati_pcigart_info *gart_info) -{ - void *address = NULL; - unsigned long pages; - u32 *pci_gart, page_base; - dma_addr_t bus_address = 0; - dma_addr_t entry_addr; - int i, j, ret = 0; - int max_pages; - - /* we need to support large memory configurations */ - if (dev->sg == NULL) { - DRM_ERROR("no scatter/gather memory!\n"); - goto done; - } - - if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { - DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n"); - - ret = drm_ati_alloc_pcigart_table(dev, gart_info); - if (ret) { - DRM_ERROR("cannot allocate PCI GART page!\n"); - goto done; - } - - address = (void *)gart_info->dmah->vaddr; - bus_address = gart_info->dmah->busaddr; - } else { - address = gart_info->addr; - bus_address = gart_info->bus_addr; - DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n", - (unsigned int)bus_address, (unsigned long)address); - } - - pci_gart = (u32 *) address; - - max_pages = (gart_info->table_size / sizeof(u32)); - pages = (dev->sg->pages <= max_pages) - ? dev->sg->pages : max_pages; - - memset(pci_gart, 0, max_pages * sizeof(u32)); - - KASSERT(PAGE_SIZE >= ATI_PCIGART_PAGE_SIZE, ("page size too small")); - - for (i = 0; i < pages; i++) { - entry_addr = dev->sg->busaddr[i]; - for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { - page_base = (u32) entry_addr & ATI_PCIGART_PAGE_MASK; - switch(gart_info->gart_reg_if) { - case DRM_ATI_GART_IGP: - page_base |= - (upper_32_bits(entry_addr) & 0xff) << 4; - page_base |= ATI_GART_READ | ATI_GART_WRITE; - page_base |= ATI_GART_NOSNOOP; - break; - case DRM_ATI_GART_PCIE: - page_base >>= 8; - page_base |= - (upper_32_bits(entry_addr) & 0xff) << 24; - page_base |= ATI_GART_READ | ATI_GART_WRITE; - page_base |= ATI_GART_NOSNOOP; - break; - default: - case DRM_ATI_GART_PCI: - break; - } - *pci_gart = cpu_to_le32(page_base); - pci_gart++; - entry_addr += ATI_PCIGART_PAGE_SIZE; - } - } - - ret = 1; - - done: - gart_info->addr = address; - gart_info->bus_addr = bus_address; - return ret; -} diff --git a/sys/dev/drm/drm.h b/sys/dev/drm/drm.h deleted file mode 100644 index 026907f2026d..000000000000 --- a/sys/dev/drm/drm.h +++ /dev/null @@ -1,1159 +0,0 @@ -/** - * \file drm.h - * Header for the Direct Rendering Manager - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * - * \par Acknowledgments: - * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. - */ - -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** - * \mainpage - * - * The Direct Rendering Manager (DRM) is a device-independent kernel-level - * device driver that provides support for the XFree86 Direct Rendering - * Infrastructure (DRI). - * - * The DRM supports the Direct Rendering Infrastructure (DRI) in four major - * ways: - * -# The DRM provides synchronized access to the graphics hardware via - * the use of an optimized two-tiered lock. - * -# The DRM enforces the DRI security policy for access to the graphics - * hardware by only allowing authenticated X11 clients access to - * restricted regions of memory. - * -# The DRM provides a generic DMA engine, complete with multiple - * queues and the ability to detect the need for an OpenGL context - * switch. - * -# The DRM is extensible via the use of small device-specific modules - * that rely extensively on the API exported by the DRM module. - * - */ - -#ifndef _DRM_H_ -#define _DRM_H_ - -#ifndef __user -#define __user -#endif -#ifndef __iomem -#define __iomem -#endif - -#ifdef __GNUC__ -# define DEPRECATED __attribute__ ((deprecated)) -#else -# define DEPRECATED -#endif - -#if defined(__linux__) -#include <asm/ioctl.h> /* For _IO* macros */ -#define DRM_IOCTL_NR(n) _IOC_NR(n) -#define DRM_IOC_VOID _IOC_NONE -#define DRM_IOC_READ _IOC_READ -#define DRM_IOC_WRITE _IOC_WRITE -#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE -#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) -#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) -#include <sys/ioccom.h> -#define DRM_IOCTL_NR(n) ((n) & 0xff) -#define DRM_IOC_VOID IOC_VOID -#define DRM_IOC_READ IOC_OUT -#define DRM_IOC_WRITE IOC_IN -#define DRM_IOC_READWRITE IOC_INOUT -#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) -#endif - -#ifdef __OpenBSD__ -#define DRM_MAJOR 81 -#endif -#if defined(__linux__) || defined(__NetBSD__) -#define DRM_MAJOR 226 -#endif -#define DRM_MAX_MINOR 15 - -#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ -#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ -#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ -#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ - -#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ -#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ -#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) -#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) -#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) - -#if defined(__linux__) -typedef unsigned int drm_handle_t; -#else -#include <sys/types.h> -typedef unsigned long drm_handle_t; /**< To mapped regions */ -#endif -typedef unsigned int drm_context_t; /**< GLXContext handle */ -typedef unsigned int drm_drawable_t; -typedef unsigned int drm_magic_t; /**< Magic for authentication */ - -/** - * Cliprect. - * - * \warning If you change this structure, make sure you change - * XF86DRIClipRectRec in the server as well - * - * \note KW: Actually it's illegal to change either for - * backwards-compatibility reasons. - */ -struct drm_clip_rect { - unsigned short x1; - unsigned short y1; - unsigned short x2; - unsigned short y2; -}; - -/** - * Texture region, - */ -struct drm_tex_region { - unsigned char next; - unsigned char prev; - unsigned char in_use; - unsigned char padding; - unsigned int age; -}; - -/** - * Hardware lock. - * - * The lock structure is a simple cache-line aligned integer. To avoid - * processor bus contention on a multiprocessor system, there should not be any - * other data stored in the same cache line. - */ -struct drm_hw_lock { - __volatile__ unsigned int lock; /**< lock variable */ - char padding[60]; /**< Pad to cache line */ -}; - -/* This is beyond ugly, and only works on GCC. However, it allows me to use - * drm.h in places (i.e., in the X-server) where I can't use size_t. The real - * fix is to use uint32_t instead of size_t, but that fix will break existing - * LP64 (i.e., PowerPC64, SPARC64, Alpha, etc.) systems. That *will* - * eventually happen, though. I chose 'unsigned long' to be the fallback type - * because that works on all the platforms I know about. Hopefully, the - * real fix will happen before that bites us. - */ - -#ifdef __SIZE_TYPE__ -# define DRM_SIZE_T __SIZE_TYPE__ -#else -# warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!" -# define DRM_SIZE_T unsigned long -#endif - -/** - * DRM_IOCTL_VERSION ioctl argument type. - * - * \sa drmGetVersion(). - */ -struct drm_version { - int version_major; /**< Major version */ - int version_minor; /**< Minor version */ - int version_patchlevel; /**< Patch level */ - DRM_SIZE_T name_len; /**< Length of name buffer */ - char __user *name; /**< Name of driver */ - DRM_SIZE_T date_len; /**< Length of date buffer */ - char __user *date; /**< User-space buffer to hold date */ - DRM_SIZE_T desc_len; /**< Length of desc buffer */ - char __user *desc; /**< User-space buffer to hold desc */ -}; - -/** - * DRM_IOCTL_GET_UNIQUE ioctl argument type. - * - * \sa drmGetBusid() and drmSetBusId(). - */ -struct drm_unique { - DRM_SIZE_T unique_len; /**< Length of unique */ - char __user *unique; /**< Unique name for driver instantiation */ -}; - -#undef DRM_SIZE_T - -struct drm_list { - int count; /**< Length of user-space structures */ - struct drm_version __user *version; -}; - -struct drm_block { - int unused; -}; - -/** - * DRM_IOCTL_CONTROL ioctl argument type. - * - * \sa drmCtlInstHandler() and drmCtlUninstHandler(). - */ -struct drm_control { - enum { - DRM_ADD_COMMAND, - DRM_RM_COMMAND, - DRM_INST_HANDLER, - DRM_UNINST_HANDLER - } func; - int irq; -}; - -/** - * Type of memory to map. - */ -enum drm_map_type { - _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ - _DRM_REGISTERS = 1, /**< no caching, no core dump */ - _DRM_SHM = 2, /**< shared, cached */ - _DRM_AGP = 3, /**< AGP/GART */ - _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ - _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ - _DRM_TTM = 6 -}; - -/** - * Memory mapping flags. - */ -enum drm_map_flags { - _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ - _DRM_READ_ONLY = 0x02, - _DRM_LOCKED = 0x04, /**< shared, cached, locked */ - _DRM_KERNEL = 0x08, /**< kernel requires access */ - _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ - _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ - _DRM_REMOVABLE = 0x40, /**< Removable mapping */ - _DRM_DRIVER = 0x80 /**< Managed by driver */ -}; - -struct drm_ctx_priv_map { - unsigned int ctx_id; /**< Context requesting private mapping */ - void *handle; /**< Handle of map */ -}; - -/** - * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls - * argument type. - * - * \sa drmAddMap(). - */ -struct drm_map { - unsigned long offset; /**< Requested physical address (0 for SAREA)*/ - unsigned long size; /**< Requested physical size (bytes) */ - enum drm_map_type type; /**< Type of memory to map */ - enum drm_map_flags flags; /**< Flags */ - void *handle; /**< User-space: "Handle" to pass to mmap() */ - /**< Kernel-space: kernel-virtual address */ - int mtrr; /**< MTRR slot used */ - /* Private data */ -}; - -/** - * DRM_IOCTL_GET_CLIENT ioctl argument type. - */ -struct drm_client { - int idx; /**< Which client desired? */ - int auth; /**< Is client authenticated? */ - unsigned long pid; /**< Process ID */ - unsigned long uid; /**< User ID */ - unsigned long magic; /**< Magic */ - unsigned long iocs; /**< Ioctl count */ -}; - -enum drm_stat_type { - _DRM_STAT_LOCK, - _DRM_STAT_OPENS, - _DRM_STAT_CLOSES, - _DRM_STAT_IOCTLS, - _DRM_STAT_LOCKS, - _DRM_STAT_UNLOCKS, - _DRM_STAT_VALUE, /**< Generic value */ - _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ - _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ - - _DRM_STAT_IRQ, /**< IRQ */ - _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ - _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ - _DRM_STAT_DMA, /**< DMA */ - _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ - _DRM_STAT_MISSED /**< Missed DMA opportunity */ - /* Add to the *END* of the list */ -}; - -/** - * DRM_IOCTL_GET_STATS ioctl argument type. - */ -struct drm_stats { - unsigned long count; - struct { - unsigned long value; - enum drm_stat_type type; - } data[15]; -}; - -/** - * Hardware locking flags. - */ -enum drm_lock_flags { - _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ - _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ - _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ - _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ - /* These *HALT* flags aren't supported yet - -- they will be used to support the - full-screen DGA-like mode. */ - _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ - _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ -}; - -/** - * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. - * - * \sa drmGetLock() and drmUnlock(). - */ -struct drm_lock { - int context; - enum drm_lock_flags flags; -}; - -/** - * DMA flags - * - * \warning - * These values \e must match xf86drm.h. - * - * \sa drm_dma. - */ -enum drm_dma_flags { - /* Flags for DMA buffer dispatch */ - _DRM_DMA_BLOCK = 0x01, /**< - * Block until buffer dispatched. - * - * \note The buffer may not yet have - * been processed by the hardware -- - * getting a hardware lock with the - * hardware quiescent will ensure - * that the buffer has been - * processed. - */ - _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ - _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ - - /* Flags for DMA buffer request */ - _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ - _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ - _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ -}; - -/** - * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. - * - * \sa drmAddBufs(). - */ -struct drm_buf_desc { - int count; /**< Number of buffers of this size */ - int size; /**< Size in bytes */ - int low_mark; /**< Low water mark */ - int high_mark; /**< High water mark */ - enum { - _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ - _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ - _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ - _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */ - _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */ - } flags; - unsigned long agp_start; /**< - * Start address of where the AGP buffers are - * in the AGP aperture - */ -}; - -/** - * DRM_IOCTL_INFO_BUFS ioctl argument type. - */ -struct drm_buf_info { - int count; /**< Number of buffers described in list */ - struct drm_buf_desc __user *list; /**< List of buffer descriptions */ -}; - -/** - * DRM_IOCTL_FREE_BUFS ioctl argument type. - */ -struct drm_buf_free { - int count; - int __user *list; -}; - -/** - * Buffer information - * - * \sa drm_buf_map. - */ -struct drm_buf_pub { - int idx; /**< Index into the master buffer list */ - int total; /**< Buffer size */ - int used; /**< Amount of buffer in use (for DMA) */ - void __user *address; /**< Address of buffer */ -}; - -/** - * DRM_IOCTL_MAP_BUFS ioctl argument type. - */ -struct drm_buf_map { - int count; /**< Length of the buffer list */ -#if defined(__cplusplus) - void __user *c_virtual; -#else - void __user *virtual; /**< Mmap'd area in user-virtual */ -#endif - struct drm_buf_pub __user *list; /**< Buffer information */ -}; - -/** - * DRM_IOCTL_DMA ioctl argument type. - * - * Indices here refer to the offset into the buffer list in drm_buf_get. - * - * \sa drmDMA(). - */ -struct drm_dma { - int context; /**< Context handle */ - int send_count; /**< Number of buffers to send */ - int __user *send_indices; /**< List of handles to buffers */ - int __user *send_sizes; /**< Lengths of data to send */ - enum drm_dma_flags flags; /**< Flags */ - int request_count; /**< Number of buffers requested */ - int request_size; /**< Desired size for buffers */ - int __user *request_indices; /**< Buffer information */ - int __user *request_sizes; - int granted_count; /**< Number of buffers granted */ -}; - -enum drm_ctx_flags { - _DRM_CONTEXT_PRESERVED = 0x01, - _DRM_CONTEXT_2DONLY = 0x02 -}; - -/** - * DRM_IOCTL_ADD_CTX ioctl argument type. - * - * \sa drmCreateContext() and drmDestroyContext(). - */ -struct drm_ctx { - drm_context_t handle; - enum drm_ctx_flags flags; -}; - -/** - * DRM_IOCTL_RES_CTX ioctl argument type. - */ -struct drm_ctx_res { - int count; - struct drm_ctx __user *contexts; -}; - -/** - * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. - */ -struct drm_draw { - drm_drawable_t handle; -}; - -/** - * DRM_IOCTL_UPDATE_DRAW ioctl argument type. - */ -typedef enum { - DRM_DRAWABLE_CLIPRECTS, -} drm_drawable_info_type_t; - -struct drm_update_draw { - drm_drawable_t handle; - unsigned int type; - unsigned int num; - unsigned long long data; -}; - -/** - * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. - */ -struct drm_auth { - drm_magic_t magic; -}; - -/** - * DRM_IOCTL_IRQ_BUSID ioctl argument type. - * - * \sa drmGetInterruptFromBusID(). - */ -struct drm_irq_busid { - int irq; /**< IRQ number */ - int busnum; /**< bus number */ - int devnum; /**< device number */ - int funcnum; /**< function number */ -}; - -enum drm_vblank_seq_type { - _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ - _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ - _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ - _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ - _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ - _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */ -}; - -#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE) -#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | \ - _DRM_VBLANK_NEXTONMISS) - -struct drm_wait_vblank_request { - enum drm_vblank_seq_type type; - unsigned int sequence; - unsigned long signal; -}; - -struct drm_wait_vblank_reply { - enum drm_vblank_seq_type type; - unsigned int sequence; - long tval_sec; - long tval_usec; -}; - -/** - * DRM_IOCTL_WAIT_VBLANK ioctl argument type. - * - * \sa drmWaitVBlank(). - */ -union drm_wait_vblank { - struct drm_wait_vblank_request request; - struct drm_wait_vblank_reply reply; -}; - - -#define _DRM_PRE_MODESET 1 -#define _DRM_POST_MODESET 2 - -/** - * DRM_IOCTL_MODESET_CTL ioctl argument type - * - * \sa drmModesetCtl(). - */ -struct drm_modeset_ctl { - uint32_t crtc; - uint32_t cmd; -}; - -/** - * DRM_IOCTL_AGP_ENABLE ioctl argument type. - * - * \sa drmAgpEnable(). - */ -struct drm_agp_mode { - unsigned long mode; /**< AGP mode */ -}; - -/** - * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. - * - * \sa drmAgpAlloc() and drmAgpFree(). - */ -struct drm_agp_buffer { - unsigned long size; /**< In bytes -- will round to page boundary */ - unsigned long handle; /**< Used for binding / unbinding */ - unsigned long type; /**< Type of memory to allocate */ - unsigned long physical; /**< Physical used by i810 */ -}; - -/** - * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. - * - * \sa drmAgpBind() and drmAgpUnbind(). - */ -struct drm_agp_binding { - unsigned long handle; /**< From drm_agp_buffer */ - unsigned long offset; /**< In bytes -- will round to page boundary */ -}; - -/** - * DRM_IOCTL_AGP_INFO ioctl argument type. - * - * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), - * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), - * drmAgpVendorId() and drmAgpDeviceId(). - */ -struct drm_agp_info { - int agp_version_major; - int agp_version_minor; - unsigned long mode; - unsigned long aperture_base; /**< physical address */ - unsigned long aperture_size; /**< bytes */ - unsigned long memory_allowed; /**< bytes */ - unsigned long memory_used; - - /** \name PCI information */ - /*@{ */ - unsigned short id_vendor; - unsigned short id_device; - /*@} */ -}; - -/** - * DRM_IOCTL_SG_ALLOC ioctl argument type. - */ -struct drm_scatter_gather { - unsigned long size; /**< In bytes -- will round to page boundary */ - unsigned long handle; /**< Used for mapping / unmapping */ -}; - -/** - * DRM_IOCTL_SET_VERSION ioctl argument type. - */ -struct drm_set_version { - int drm_di_major; - int drm_di_minor; - int drm_dd_major; - int drm_dd_minor; -}; - - -#define DRM_FENCE_FLAG_EMIT 0x00000001 -#define DRM_FENCE_FLAG_SHAREABLE 0x00000002 -/** - * On hardware with no interrupt events for operation completion, - * indicates that the kernel should sleep while waiting for any blocking - * operation to complete rather than spinning. - * - * Has no effect otherwise. - */ -#define DRM_FENCE_FLAG_WAIT_LAZY 0x00000004 -#define DRM_FENCE_FLAG_NO_USER 0x00000010 - -/* Reserved for driver use */ -#define DRM_FENCE_MASK_DRIVER 0xFF000000 - -#define DRM_FENCE_TYPE_EXE 0x00000001 - -struct drm_fence_arg { - unsigned int handle; - unsigned int fence_class; - unsigned int type; - unsigned int flags; - unsigned int signaled; - unsigned int error; - unsigned int sequence; - unsigned int pad64; - uint64_t expand_pad[2]; /*Future expansion */ -}; - -/* Buffer permissions, referring to how the GPU uses the buffers. - * these translate to fence types used for the buffers. - * Typically a texture buffer is read, A destination buffer is write and - * a command (batch-) buffer is exe. Can be or-ed together. - */ - -#define DRM_BO_FLAG_READ (1ULL << 0) -#define DRM_BO_FLAG_WRITE (1ULL << 1) -#define DRM_BO_FLAG_EXE (1ULL << 2) - -/* - * All of the bits related to access mode - */ -#define DRM_BO_MASK_ACCESS (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE) -/* - * Status flags. Can be read to determine the actual state of a buffer. - * Can also be set in the buffer mask before validation. - */ - -/* - * Mask: Never evict this buffer. Not even with force. This type of buffer is only - * available to root and must be manually removed before buffer manager shutdown - * or lock. - * Flags: Acknowledge - */ -#define DRM_BO_FLAG_NO_EVICT (1ULL << 4) - -/* - * Mask: Require that the buffer is placed in mappable memory when validated. - * If not set the buffer may or may not be in mappable memory when validated. - * Flags: If set, the buffer is in mappable memory. - */ -#define DRM_BO_FLAG_MAPPABLE (1ULL << 5) - -/* Mask: The buffer should be shareable with other processes. - * Flags: The buffer is shareable with other processes. - */ -#define DRM_BO_FLAG_SHAREABLE (1ULL << 6) - -/* Mask: If set, place the buffer in cache-coherent memory if available. - * If clear, never place the buffer in cache coherent memory if validated. - * Flags: The buffer is currently in cache-coherent memory. - */ -#define DRM_BO_FLAG_CACHED (1ULL << 7) - -/* Mask: Make sure that every time this buffer is validated, - * it ends up on the same location provided that the memory mask is the same. - * The buffer will also not be evicted when claiming space for - * other buffers. Basically a pinned buffer but it may be thrown out as - * part of buffer manager shutdown or locking. - * Flags: Acknowledge. - */ -#define DRM_BO_FLAG_NO_MOVE (1ULL << 8) - -/* Mask: Make sure the buffer is in cached memory when mapped. In conjunction - * with DRM_BO_FLAG_CACHED it also allows the buffer to be bound into the GART - * with unsnooped PTEs instead of snooped, by using chipset-specific cache - * flushing at bind time. A better name might be DRM_BO_FLAG_TT_UNSNOOPED, - * as the eviction to local memory (TTM unbind) on map is just a side effect - * to prevent aggressive cache prefetch from the GPU disturbing the cache - * management that the DRM is doing. - * - * Flags: Acknowledge. - * Buffers allocated with this flag should not be used for suballocators - * This type may have issues on CPUs with over-aggressive caching - * http://marc.info/?l=linux-kernel&m=102376926732464&w=2 - */ -#define DRM_BO_FLAG_CACHED_MAPPED (1ULL << 19) - - -/* Mask: Force DRM_BO_FLAG_CACHED flag strictly also if it is set. - * Flags: Acknowledge. - */ -#define DRM_BO_FLAG_FORCE_CACHING (1ULL << 13) - -/* - * Mask: Force DRM_BO_FLAG_MAPPABLE flag strictly also if it is clear. - * Flags: Acknowledge. - */ -#define DRM_BO_FLAG_FORCE_MAPPABLE (1ULL << 14) -#define DRM_BO_FLAG_TILE (1ULL << 15) - -/* - * Memory type flags that can be or'ed together in the mask, but only - * one appears in flags. - */ - -/* System memory */ -#define DRM_BO_FLAG_MEM_LOCAL (1ULL << 24) -/* Translation table memory */ -#define DRM_BO_FLAG_MEM_TT (1ULL << 25) -/* Vram memory */ -#define DRM_BO_FLAG_MEM_VRAM (1ULL << 26) -/* Up to the driver to define. */ -#define DRM_BO_FLAG_MEM_PRIV0 (1ULL << 27) -#define DRM_BO_FLAG_MEM_PRIV1 (1ULL << 28) -#define DRM_BO_FLAG_MEM_PRIV2 (1ULL << 29) -#define DRM_BO_FLAG_MEM_PRIV3 (1ULL << 30) -#define DRM_BO_FLAG_MEM_PRIV4 (1ULL << 31) -/* We can add more of these now with a 64-bit flag type */ - -/* - * This is a mask covering all of the memory type flags; easier to just - * use a single constant than a bunch of | values. It covers - * DRM_BO_FLAG_MEM_LOCAL through DRM_BO_FLAG_MEM_PRIV4 - */ -#define DRM_BO_MASK_MEM 0x00000000FF000000ULL -/* - * This adds all of the CPU-mapping options in with the memory - * type to label all bits which change how the page gets mapped - */ -#define DRM_BO_MASK_MEMTYPE (DRM_BO_MASK_MEM | \ - DRM_BO_FLAG_CACHED_MAPPED | \ - DRM_BO_FLAG_CACHED | \ - DRM_BO_FLAG_MAPPABLE) - -/* Driver-private flags */ -#define DRM_BO_MASK_DRIVER 0xFFFF000000000000ULL - -/* - * Don't block on validate and map. Instead, return EBUSY. - */ -#define DRM_BO_HINT_DONT_BLOCK 0x00000002 -/* - * Don't place this buffer on the unfenced list. This means - * that the buffer will not end up having a fence associated - * with it as a result of this operation - */ -#define DRM_BO_HINT_DONT_FENCE 0x00000004 -/** - * On hardware with no interrupt events for operation completion, - * indicates that the kernel should sleep while waiting for any blocking - * operation to complete rather than spinning. - * - * Has no effect otherwise. - */ -#define DRM_BO_HINT_WAIT_LAZY 0x00000008 -/* - * The client has compute relocations referring to this buffer using the - * offset in the presumed_offset field. If that offset ends up matching - * where this buffer lands, the kernel is free to skip executing those - * relocations - */ -#define DRM_BO_HINT_PRESUMED_OFFSET 0x00000010 - -#define DRM_BO_INIT_MAGIC 0xfe769812 -#define DRM_BO_INIT_MAJOR 1 -#define DRM_BO_INIT_MINOR 0 -#define DRM_BO_INIT_PATCH 0 - - -struct drm_bo_info_req { - uint64_t mask; - uint64_t flags; - unsigned int handle; - unsigned int hint; - unsigned int fence_class; - unsigned int desired_tile_stride; - unsigned int tile_info; - unsigned int pad64; - uint64_t presumed_offset; -}; - -struct drm_bo_create_req { - uint64_t flags; - uint64_t size; - uint64_t buffer_start; - unsigned int hint; - unsigned int page_alignment; -}; - - -/* - * Reply flags - */ - -#define DRM_BO_REP_BUSY 0x00000001 - -struct drm_bo_info_rep { - uint64_t flags; - uint64_t proposed_flags; - uint64_t size; - uint64_t offset; - uint64_t arg_handle; - uint64_t buffer_start; - unsigned int handle; - unsigned int fence_flags; - unsigned int rep_flags; - unsigned int page_alignment; - unsigned int desired_tile_stride; - unsigned int hw_tile_stride; - unsigned int tile_info; - unsigned int pad64; - uint64_t expand_pad[4]; /*Future expansion */ -}; - -struct drm_bo_arg_rep { - struct drm_bo_info_rep bo_info; - int ret; - unsigned int pad64; -}; - -struct drm_bo_create_arg { - union { - struct drm_bo_create_req req; - struct drm_bo_info_rep rep; - } d; -}; - -struct drm_bo_handle_arg { - unsigned int handle; -}; - -struct drm_bo_reference_info_arg { - union { - struct drm_bo_handle_arg req; - struct drm_bo_info_rep rep; - } d; -}; - -struct drm_bo_map_wait_idle_arg { - union { - struct drm_bo_info_req req; - struct drm_bo_info_rep rep; - } d; -}; - -struct drm_bo_op_req { - enum { - drm_bo_validate, - drm_bo_fence, - drm_bo_ref_fence, - } op; - unsigned int arg_handle; - struct drm_bo_info_req bo_req; -}; - - -struct drm_bo_op_arg { - uint64_t next; - union { - struct drm_bo_op_req req; - struct drm_bo_arg_rep rep; - } d; - int handled; - unsigned int pad64; -}; - - -#define DRM_BO_MEM_LOCAL 0 -#define DRM_BO_MEM_TT 1 -#define DRM_BO_MEM_VRAM 2 -#define DRM_BO_MEM_PRIV0 3 -#define DRM_BO_MEM_PRIV1 4 -#define DRM_BO_MEM_PRIV2 5 -#define DRM_BO_MEM_PRIV3 6 -#define DRM_BO_MEM_PRIV4 7 - -#define DRM_BO_MEM_TYPES 8 /* For now. */ - -#define DRM_BO_LOCK_UNLOCK_BM (1 << 0) -#define DRM_BO_LOCK_IGNORE_NO_EVICT (1 << 1) - -struct drm_bo_version_arg { - uint32_t major; - uint32_t minor; - uint32_t patchlevel; -}; - -struct drm_mm_type_arg { - unsigned int mem_type; - unsigned int lock_flags; -}; - -struct drm_mm_init_arg { - unsigned int magic; - unsigned int major; - unsigned int minor; - unsigned int mem_type; - uint64_t p_offset; - uint64_t p_size; -}; - -struct drm_mm_info_arg { - unsigned int mem_type; - uint64_t p_size; -}; - -struct drm_gem_close { - /** Handle of the object to be closed. */ - uint32_t handle; - uint32_t pad; -}; - -struct drm_gem_flink { - /** Handle for the object being named */ - uint32_t handle; - - /** Returned global name */ - uint32_t name; -}; - -struct drm_gem_open { - /** Name of object being opened */ - uint32_t name; - - /** Returned handle for the object */ - uint32_t handle; - - /** Returned size of the object */ - uint64_t size; -}; - -/** - * \name Ioctls Definitions - */ -/*@{*/ - -#define DRM_IOCTL_BASE 'd' -#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) -#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) -#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) -#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) - -#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version) -#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique) -#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth) -#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid) -#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map) -#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) -#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) -#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) -#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl) - -#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close) -#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) -#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) - -#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) -#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) -#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block) -#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block) -#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control) -#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map) -#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc) -#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc) -#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info) -#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map) -#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free) - -#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map) - -#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map) -#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map) - -#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx) -#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx) -#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx) -#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx) -#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx) -#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx) -#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res) -#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw) -#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw) -#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma) -#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock) -#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock) -#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock) - -#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) -#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) -#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode) -#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info) -#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer) -#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer) -#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding) -#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding) - -#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather) -#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather) - -#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank) - -#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw) - -#define DRM_IOCTL_MM_INIT DRM_IOWR(0xc0, struct drm_mm_init_arg) -#define DRM_IOCTL_MM_TAKEDOWN DRM_IOWR(0xc1, struct drm_mm_type_arg) -#define DRM_IOCTL_MM_LOCK DRM_IOWR(0xc2, struct drm_mm_type_arg) -#define DRM_IOCTL_MM_UNLOCK DRM_IOWR(0xc3, struct drm_mm_type_arg) - -#define DRM_IOCTL_FENCE_CREATE DRM_IOWR(0xc4, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_REFERENCE DRM_IOWR(0xc6, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_UNREFERENCE DRM_IOWR(0xc7, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_SIGNALED DRM_IOWR(0xc8, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_FLUSH DRM_IOWR(0xc9, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_WAIT DRM_IOWR(0xca, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_EMIT DRM_IOWR(0xcb, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_BUFFERS DRM_IOWR(0xcc, struct drm_fence_arg) - -#define DRM_IOCTL_BO_CREATE DRM_IOWR(0xcd, struct drm_bo_create_arg) -#define DRM_IOCTL_BO_MAP DRM_IOWR(0xcf, struct drm_bo_map_wait_idle_arg) -#define DRM_IOCTL_BO_UNMAP DRM_IOWR(0xd0, struct drm_bo_handle_arg) -#define DRM_IOCTL_BO_REFERENCE DRM_IOWR(0xd1, struct drm_bo_reference_info_arg) -#define DRM_IOCTL_BO_UNREFERENCE DRM_IOWR(0xd2, struct drm_bo_handle_arg) -#define DRM_IOCTL_BO_SETSTATUS DRM_IOWR(0xd3, struct drm_bo_map_wait_idle_arg) -#define DRM_IOCTL_BO_INFO DRM_IOWR(0xd4, struct drm_bo_reference_info_arg) -#define DRM_IOCTL_BO_WAIT_IDLE DRM_IOWR(0xd5, struct drm_bo_map_wait_idle_arg) -#define DRM_IOCTL_BO_VERSION DRM_IOR(0xd6, struct drm_bo_version_arg) -#define DRM_IOCTL_MM_INFO DRM_IOWR(0xd7, struct drm_mm_info_arg) - -/*@}*/ - -/** - * Device specific ioctls should only be in their respective headers - * The device specific ioctl range is from 0x40 to 0x99. - * Generic IOCTLS restart at 0xA0. - * - * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and - * drmCommandReadWrite(). - */ -#define DRM_COMMAND_BASE 0x40 -#define DRM_COMMAND_END 0xA0 - -/* typedef area */ -#ifndef __KERNEL__ -typedef struct drm_clip_rect drm_clip_rect_t; -typedef struct drm_tex_region drm_tex_region_t; -typedef struct drm_hw_lock drm_hw_lock_t; -typedef struct drm_version drm_version_t; -typedef struct drm_unique drm_unique_t; -typedef struct drm_list drm_list_t; -typedef struct drm_block drm_block_t; -typedef struct drm_control drm_control_t; -typedef enum drm_map_type drm_map_type_t; -typedef enum drm_map_flags drm_map_flags_t; -typedef struct drm_ctx_priv_map drm_ctx_priv_map_t; -typedef struct drm_map drm_map_t; -typedef struct drm_client drm_client_t; -typedef enum drm_stat_type drm_stat_type_t; -typedef struct drm_stats drm_stats_t; -typedef enum drm_lock_flags drm_lock_flags_t; -typedef struct drm_lock drm_lock_t; -typedef enum drm_dma_flags drm_dma_flags_t; -typedef struct drm_buf_desc drm_buf_desc_t; -typedef struct drm_buf_info drm_buf_info_t; -typedef struct drm_buf_free drm_buf_free_t; -typedef struct drm_buf_pub drm_buf_pub_t; -typedef struct drm_buf_map drm_buf_map_t; -typedef struct drm_dma drm_dma_t; -typedef union drm_wait_vblank drm_wait_vblank_t; -typedef struct drm_agp_mode drm_agp_mode_t; -typedef enum drm_ctx_flags drm_ctx_flags_t; -typedef struct drm_ctx drm_ctx_t; -typedef struct drm_ctx_res drm_ctx_res_t; -typedef struct drm_draw drm_draw_t; -typedef struct drm_update_draw drm_update_draw_t; -typedef struct drm_auth drm_auth_t; -typedef struct drm_irq_busid drm_irq_busid_t; -typedef enum drm_vblank_seq_type drm_vblank_seq_type_t; -typedef struct drm_agp_buffer drm_agp_buffer_t; -typedef struct drm_agp_binding drm_agp_binding_t; -typedef struct drm_agp_info drm_agp_info_t; -typedef struct drm_scatter_gather drm_scatter_gather_t; -typedef struct drm_set_version drm_set_version_t; - -typedef struct drm_fence_arg drm_fence_arg_t; -typedef struct drm_mm_type_arg drm_mm_type_arg_t; -typedef struct drm_mm_init_arg drm_mm_init_arg_t; -typedef enum drm_bo_type drm_bo_type_t; -#endif - -#define DRM_PORT "graphics/drm-legacy-kmod" - -#define DRM_OBSOLETE(dev) \ - do { \ - device_printf(dev, "=======================================================\n"); \ - device_printf(dev, "This code is obsolete abandonware. Install the " DRM_PORT " pkg\n"); \ - device_printf(dev, "=======================================================\n"); \ - gone_in_dev(dev, 13, "drm drivers"); \ - } while (0) - - -#endif diff --git a/sys/dev/drm/drmP.h b/sys/dev/drm/drmP.h deleted file mode 100644 index b29625fc0713..000000000000 --- a/sys/dev/drm/drmP.h +++ /dev/null @@ -1,1011 +0,0 @@ -/* drmP.h -- Private header for Direct Rendering Manager -*- linux-c -*- - * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com - */ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef _DRM_P_H_ -#define _DRM_P_H_ - -#if defined(_KERNEL) || defined(__KERNEL__) - -struct drm_device; -struct drm_file; - -#include <sys/param.h> -#include <sys/queue.h> -#include <sys/malloc.h> -#include <sys/kernel.h> -#include <sys/module.h> -#include <sys/systm.h> -#include <sys/conf.h> -#include <sys/sglist.h> -#include <sys/stat.h> -#include <sys/priv.h> -#include <sys/proc.h> -#include <sys/lock.h> -#include <sys/fcntl.h> -#include <sys/uio.h> -#include <sys/filio.h> -#include <sys/rwlock.h> -#include <sys/sysctl.h> -#include <sys/bus.h> -#include <sys/queue.h> -#include <sys/signalvar.h> -#include <sys/poll.h> -#include <sys/taskqueue.h> -#include <sys/tree.h> -#include <sys/vmmeter.h> -#include <vm/vm.h> -#include <vm/pmap.h> -#include <vm/vm_extern.h> -#include <vm/vm_kern.h> -#include <vm/vm_map.h> -#include <vm/vm_object.h> -#include <vm/vm_page.h> -#include <vm/vm_pager.h> -#include <vm/vm_param.h> -#include <vm/vm_phys.h> -#include <machine/bus.h> -#include <machine/resource.h> -#if defined(__i386__) || defined(__amd64__) -#include <machine/specialreg.h> -#endif -#include <machine/sysarch.h> -#include <sys/endian.h> -#if _BYTE_ORDER == _BIG_ENDIAN -#define __BIG_ENDIAN 1 -#else -#define __LITTLE_ENDIAN 1 -#endif -#include <sys/mman.h> -#include <sys/rman.h> -#include <sys/memrange.h> -#include <dev/agp/agpvar.h> -#include <sys/agpio.h> -#include <sys/mutex.h> -#include <dev/pci/pcivar.h> -#include <dev/pci/pcireg.h> -#include <sys/selinfo.h> -#include <sys/bus.h> - -#include "dev/drm/drm.h" -#include "dev/drm/drm_atomic.h" -#include "dev/drm/drm_internal.h" -#include "dev/drm/drm_linux_list.h" - -#include "opt_drm.h" -#ifdef DRM_DEBUG -#undef DRM_DEBUG -#define DRM_DEBUG_DEFAULT_ON 1 -#endif /* DRM_DEBUG */ - -#if defined(DRM_LINUX) && DRM_LINUX && !defined(__amd64__) -#include <sys/file.h> -#include <sys/proc.h> -#include <machine/../linux/linux.h> -#include <machine/../linux/linux_proto.h> -#else -/* Either it was defined when it shouldn't be (FreeBSD amd64) or it isn't - * supported on this OS yet. - */ -#undef DRM_LINUX -#define DRM_LINUX 0 -#endif - -/* driver capabilities and requirements mask */ -#define DRIVER_USE_AGP 0x1 -#define DRIVER_REQUIRE_AGP 0x2 -#define DRIVER_USE_MTRR 0x4 -#define DRIVER_PCI_DMA 0x8 -#define DRIVER_SG 0x10 -#define DRIVER_HAVE_DMA 0x20 -#define DRIVER_HAVE_IRQ 0x40 -#define DRIVER_DMA_QUEUE 0x100 - - -#define DRM_HASH_SIZE 16 /* Size of key hash table */ -#define DRM_KERNEL_CONTEXT 0 /* Change drm_resctx if changed */ -#define DRM_RESERVED_CONTEXTS 1 /* Change drm_resctx if changed */ - -MALLOC_DECLARE(DRM_MEM_DMA); -MALLOC_DECLARE(DRM_MEM_SAREA); -MALLOC_DECLARE(DRM_MEM_DRIVER); -MALLOC_DECLARE(DRM_MEM_MAGIC); -MALLOC_DECLARE(DRM_MEM_IOCTLS); -MALLOC_DECLARE(DRM_MEM_MAPS); -MALLOC_DECLARE(DRM_MEM_BUFS); -MALLOC_DECLARE(DRM_MEM_SEGS); -MALLOC_DECLARE(DRM_MEM_PAGES); -MALLOC_DECLARE(DRM_MEM_FILES); -MALLOC_DECLARE(DRM_MEM_QUEUES); -MALLOC_DECLARE(DRM_MEM_CMDS); -MALLOC_DECLARE(DRM_MEM_MAPPINGS); -MALLOC_DECLARE(DRM_MEM_BUFLISTS); -MALLOC_DECLARE(DRM_MEM_AGPLISTS); -MALLOC_DECLARE(DRM_MEM_CTXBITMAP); -MALLOC_DECLARE(DRM_MEM_SGLISTS); -MALLOC_DECLARE(DRM_MEM_DRAWABLE); -MALLOC_DECLARE(DRM_MEM_MM); -MALLOC_DECLARE(DRM_MEM_HASHTAB); - -SYSCTL_DECL(_hw_drm); - -#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8) - - /* Internal types and structures */ -#define DRM_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) -#define DRM_MIN(a,b) ((a)<(b)?(a):(b)) -#define DRM_MAX(a,b) ((a)>(b)?(a):(b)) - -#define DRM_IF_VERSION(maj, min) (maj << 16 | min) - -#define __OS_HAS_AGP 1 - -#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) -#define DRM_DEV_UID UID_ROOT -#define DRM_DEV_GID GID_VIDEO - -#define wait_queue_head_t atomic_t -#define DRM_WAKEUP(w) wakeup((void *)w) -#define DRM_WAKEUP_INT(w) wakeup(w) -#define DRM_INIT_WAITQUEUE(queue) do {(void)(queue);} while (0) - -#define DRM_CURPROC curthread -#define DRM_STRUCTPROC struct thread -#define DRM_SPINTYPE struct mtx -#define DRM_SPININIT(l,name) mtx_init(l, name, NULL, MTX_DEF) -#define DRM_SPINUNINIT(l) mtx_destroy(l) -#define DRM_SPINLOCK(l) mtx_lock(l) -#define DRM_SPINUNLOCK(u) mtx_unlock(u) -#define DRM_SPINLOCK_IRQSAVE(l, irqflags) do { \ - mtx_lock(l); \ - (void)irqflags; \ -} while (0) -#define DRM_SPINUNLOCK_IRQRESTORE(u, irqflags) mtx_unlock(u) -#define DRM_SPINLOCK_ASSERT(l) mtx_assert(l, MA_OWNED) -#define DRM_CURRENTPID curthread->td_proc->p_pid -#define DRM_LOCK() mtx_lock(&dev->dev_lock) -#define DRM_UNLOCK() mtx_unlock(&dev->dev_lock) -#define DRM_SYSCTL_HANDLER_ARGS (SYSCTL_HANDLER_ARGS) - -#define DRM_IRQ_ARGS void *arg -typedef void irqreturn_t; -#define IRQ_HANDLED /* nothing */ -#define IRQ_NONE /* nothing */ - -#define unlikely(x) __builtin_expect(!!(x), 0) -#define container_of(ptr, type, member) ({ \ - __typeof( ((type *)0)->member ) *__mptr = (ptr); \ - (type *)( (char *)__mptr - offsetof(type,member) );}) - -enum { - DRM_IS_NOT_AGP, - DRM_IS_AGP, - DRM_MIGHT_BE_AGP -}; -#define DRM_AGP_MEM struct agp_memory_info - -#define drm_get_device_from_kdev(_kdev) (_kdev->si_drv1) - -#define PAGE_ALIGN(addr) round_page(addr) -/* DRM_SUSER returns true if the user is superuser */ -#define DRM_SUSER(p) (priv_check(p, PRIV_KMEM_WRITE) == 0) -#define DRM_AGP_FIND_DEVICE() agp_find_device() -#define DRM_MTRR_WC MDF_WRITECOMBINE -#define jiffies ticks - -typedef vm_paddr_t dma_addr_t; -typedef u_int64_t u64; -typedef u_int32_t u32; -typedef u_int16_t u16; -typedef u_int8_t u8; - -/* DRM_READMEMORYBARRIER() prevents reordering of reads. - * DRM_WRITEMEMORYBARRIER() prevents reordering of writes. - * DRM_MEMORYBARRIER() prevents reordering of reads and writes. - */ -#define DRM_READMEMORYBARRIER() rmb() -#define DRM_WRITEMEMORYBARRIER() wmb() -#define DRM_MEMORYBARRIER() mb() - -#define DRM_READ8(map, offset) \ - *(volatile u_int8_t *)(((vm_offset_t)(map)->virtual) + \ - (vm_offset_t)(offset)) -#define DRM_READ16(map, offset) \ - le16toh(*(volatile u_int16_t *)(((vm_offset_t)(map)->virtual) + \ - (vm_offset_t)(offset))) -#define DRM_READ32(map, offset) \ - le32toh(*(volatile u_int32_t *)(((vm_offset_t)(map)->virtual) + \ - (vm_offset_t)(offset))) -#define DRM_WRITE8(map, offset, val) \ - *(volatile u_int8_t *)(((vm_offset_t)(map)->virtual) + \ - (vm_offset_t)(offset)) = val -#define DRM_WRITE16(map, offset, val) \ - *(volatile u_int16_t *)(((vm_offset_t)(map)->virtual) + \ - (vm_offset_t)(offset)) = htole16(val) -#define DRM_WRITE32(map, offset, val) \ - *(volatile u_int32_t *)(((vm_offset_t)(map)->virtual) + \ - (vm_offset_t)(offset)) = htole32(val) - -#define DRM_VERIFYAREA_READ( uaddr, size ) \ - (!useracc(__DECONST(caddr_t, uaddr), size, VM_PROT_READ)) - -#define DRM_COPY_TO_USER(user, kern, size) \ - copyout(kern, user, size) -#define DRM_COPY_FROM_USER(kern, user, size) \ - copyin(user, kern, size) -#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) \ - copyin(arg2, arg1, arg3) -#define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3) \ - copyout(arg2, arg1, arg3) -#define DRM_GET_USER_UNCHECKED(val, uaddr) \ - ((val) = fuword32(uaddr), 0) - -#define cpu_to_le32(x) htole32(x) -#define le32_to_cpu(x) le32toh(x) - -#define DRM_HZ hz -#define DRM_UDELAY(udelay) DELAY(udelay) -#define DRM_TIME_SLICE (hz/20) /* Time slice for GLXContexts */ - -#define DRM_GET_PRIV_SAREA(_dev, _ctx, _map) do { \ - (_map) = (_dev)->context_sareas[_ctx]; \ -} while(0) - -#define LOCK_TEST_WITH_RETURN(dev, file_priv) \ -do { \ - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) || \ - dev->lock.file_priv != file_priv) { \ - DRM_ERROR("%s called without lock held\n", \ - __FUNCTION__); \ - return EINVAL; \ - } \ -} while (0) - -/* Returns -errno to shared code */ -#define DRM_WAIT_ON( ret, queue, timeout, condition ) \ -for ( ret = 0 ; !ret && !(condition) ; ) { \ - DRM_UNLOCK(); \ - mtx_lock(&dev->irq_lock); \ - if (!(condition)) \ - ret = -mtx_sleep(&(queue), &dev->irq_lock, \ - PCATCH, "drmwtq", (timeout)); \ - mtx_unlock(&dev->irq_lock); \ - DRM_LOCK(); \ -} - -#define DRM_ERROR(fmt, ...) \ - printf("error: [" DRM_NAME ":pid%d:%s] *ERROR* " fmt, \ - DRM_CURRENTPID, __func__ , ##__VA_ARGS__) - -#define DRM_INFO(fmt, ...) printf("info: [" DRM_NAME "] " fmt , ##__VA_ARGS__) - -#define DRM_DEBUG(fmt, ...) do { \ - if (drm_debug_flag) \ - printf("[" DRM_NAME ":pid%d:%s] " fmt, DRM_CURRENTPID, \ - __func__ , ##__VA_ARGS__); \ -} while (0) - -typedef struct drm_pci_id_list -{ - int vendor; - int device; - intptr_t driver_private; - char *name; -} drm_pci_id_list_t; - -struct drm_msi_blacklist_entry -{ - int vendor; - int device; -}; - -#define DRM_AUTH 0x1 -#define DRM_MASTER 0x2 -#define DRM_ROOT_ONLY 0x4 -typedef struct drm_ioctl_desc { - unsigned long cmd; - int (*func)(struct drm_device *dev, void *data, - struct drm_file *file_priv); - int flags; -} drm_ioctl_desc_t; -/** - * Creates a driver or general drm_ioctl_desc array entry for the given - * ioctl, for use by drm_ioctl(). - */ -#define DRM_IOCTL_DEF(ioctl, func, flags) \ - [DRM_IOCTL_NR(ioctl)] = {ioctl, func, flags} - -typedef struct drm_magic_entry { - drm_magic_t magic; - struct drm_file *priv; - struct drm_magic_entry *next; -} drm_magic_entry_t; - -typedef struct drm_magic_head { - struct drm_magic_entry *head; - struct drm_magic_entry *tail; -} drm_magic_head_t; - -typedef struct drm_buf { - int idx; /* Index into master buflist */ - int total; /* Buffer size */ - int order; /* log-base-2(total) */ - int used; /* Amount of buffer in use (for DMA) */ - unsigned long offset; /* Byte offset (used internally) */ - void *address; /* Address of buffer */ - unsigned long bus_address; /* Bus address of buffer */ - struct drm_buf *next; /* Kernel-only: used for free list */ - __volatile__ int pending; /* On hardware DMA queue */ - struct drm_file *file_priv; /* Unique identifier of holding process */ - int context; /* Kernel queue for this buffer */ - enum { - DRM_LIST_NONE = 0, - DRM_LIST_FREE = 1, - DRM_LIST_WAIT = 2, - DRM_LIST_PEND = 3, - DRM_LIST_PRIO = 4, - DRM_LIST_RECLAIM = 5 - } list; /* Which list we're on */ - - int dev_priv_size; /* Size of buffer private stoarge */ - void *dev_private; /* Per-buffer private storage */ -} drm_buf_t; - -typedef struct drm_freelist { - int initialized; /* Freelist in use */ - atomic_t count; /* Number of free buffers */ - drm_buf_t *next; /* End pointer */ - - int low_mark; /* Low water mark */ - int high_mark; /* High water mark */ -} drm_freelist_t; - -typedef struct drm_dma_handle { - void *vaddr; - bus_addr_t busaddr; - bus_dma_tag_t tag; - bus_dmamap_t map; -} drm_dma_handle_t; - -typedef struct drm_buf_entry { - int buf_size; - int buf_count; - drm_buf_t *buflist; - int seg_count; - drm_dma_handle_t **seglist; - int page_order; - - drm_freelist_t freelist; -} drm_buf_entry_t; - -typedef TAILQ_HEAD(drm_file_list, drm_file) drm_file_list_t; -struct drm_file { - TAILQ_ENTRY(drm_file) link; - struct drm_device *dev; - int authenticated; - int master; - pid_t pid; - uid_t uid; - drm_magic_t magic; - unsigned long ioctl_count; - void *driver_priv; -}; - -typedef struct drm_lock_data { - struct drm_hw_lock *hw_lock; /* Hardware lock */ - struct drm_file *file_priv; /* Unique identifier of holding process (NULL is kernel)*/ - int lock_queue; /* Queue of blocked processes */ - unsigned long lock_time; /* Time of last lock in jiffies */ -} drm_lock_data_t; - -/* This structure, in the struct drm_device, is always initialized while the - * device - * is open. dev->dma_lock protects the incrementing of dev->buf_use, which - * when set marks that no further bufs may be allocated until device teardown - * occurs (when the last open of the device has closed). The high/low - * watermarks of bufs are only touched by the X Server, and thus not - * concurrently accessed, so no locking is needed. - */ -typedef struct drm_device_dma { - drm_buf_entry_t bufs[DRM_MAX_ORDER+1]; - int buf_count; - drm_buf_t **buflist; /* Vector of pointers info bufs */ - int seg_count; - int page_count; - unsigned long *pagelist; - unsigned long byte_count; - enum { - _DRM_DMA_USE_AGP = 0x01, - _DRM_DMA_USE_SG = 0x02 - } flags; -} drm_device_dma_t; - -typedef struct drm_agp_mem { - void *handle; - unsigned long bound; /* address */ - int pages; - struct drm_agp_mem *prev; - struct drm_agp_mem *next; -} drm_agp_mem_t; - -typedef struct drm_agp_head { - device_t agpdev; - struct agp_info info; - const char *chipset; - drm_agp_mem_t *memory; - unsigned long mode; - int enabled; - int acquired; - unsigned long base; - int mtrr; - int cant_use_aperture; - unsigned long page_mask; -} drm_agp_head_t; - -typedef struct drm_sg_mem { - vm_offset_t vaddr; - vm_paddr_t *busaddr; - vm_pindex_t pages; -} drm_sg_mem_t; - -#define DRM_MAP_HANDLE_BITS (sizeof(void *) == 4 ? 4 : 24) -#define DRM_MAP_HANDLE_SHIFT (sizeof(void *) * 8 - DRM_MAP_HANDLE_BITS) -typedef TAILQ_HEAD(drm_map_list, drm_local_map) drm_map_list_t; - -typedef struct drm_local_map { - unsigned long offset; /* Physical address (0 for SAREA) */ - unsigned long size; /* Physical size (bytes) */ - enum drm_map_type type; /* Type of memory mapped */ - enum drm_map_flags flags; /* Flags */ - void *handle; /* User-space: "Handle" to pass to mmap */ - /* Kernel-space: kernel-virtual address */ - int mtrr; /* Boolean: MTRR used */ - /* Private data */ - int rid; /* PCI resource ID for bus_space */ - void *virtual; /* Kernel-space: kernel-virtual address */ - struct resource *bsr; - bus_space_tag_t bst; - bus_space_handle_t bsh; - drm_dma_handle_t *dmah; - TAILQ_ENTRY(drm_local_map) link; -} drm_local_map_t; - -struct drm_vblank_info { - wait_queue_head_t queue; /* vblank wait queue */ - atomic_t count; /* number of VBLANK interrupts */ - /* (driver must alloc the right number of counters) */ - atomic_t refcount; /* number of users of vblank interrupts */ - u32 last; /* protected by dev->vbl_lock, used */ - /* for wraparound handling */ - int enabled; /* so we don't call enable more than */ - /* once per disable */ - int inmodeset; /* Display driver is setting mode */ -}; - -/* location of GART table */ -#define DRM_ATI_GART_MAIN 1 -#define DRM_ATI_GART_FB 2 - -#define DRM_ATI_GART_PCI 1 -#define DRM_ATI_GART_PCIE 2 -#define DRM_ATI_GART_IGP 3 - -struct drm_ati_pcigart_info { - int gart_table_location; - int gart_reg_if; - void *addr; - dma_addr_t bus_addr; - dma_addr_t table_mask; - dma_addr_t member_mask; - struct drm_dma_handle *table_handle; - drm_local_map_t mapping; - int table_size; - struct drm_dma_handle *dmah; /* handle for ATI PCIGART table */ -}; - -#ifndef DMA_BIT_MASK -#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : (1ULL<<(n)) - 1) -#endif - -#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) - -struct drm_driver_info { - int (*load)(struct drm_device *, unsigned long flags); - int (*firstopen)(struct drm_device *); - int (*open)(struct drm_device *, struct drm_file *); - void (*preclose)(struct drm_device *, struct drm_file *file_priv); - void (*postclose)(struct drm_device *, struct drm_file *); - void (*lastclose)(struct drm_device *); - int (*unload)(struct drm_device *); - void (*reclaim_buffers_locked)(struct drm_device *, - struct drm_file *file_priv); - int (*dma_ioctl)(struct drm_device *dev, void *data, - struct drm_file *file_priv); - void (*dma_ready)(struct drm_device *); - int (*dma_quiescent)(struct drm_device *); - int (*dma_flush_block_and_flush)(struct drm_device *, int context, - enum drm_lock_flags flags); - int (*dma_flush_unblock)(struct drm_device *, int context, - enum drm_lock_flags flags); - int (*context_ctor)(struct drm_device *dev, int context); - int (*context_dtor)(struct drm_device *dev, int context); - int (*kernel_context_switch)(struct drm_device *dev, int old, - int new); - int (*kernel_context_switch_unlock)(struct drm_device *dev); - void (*irq_preinstall)(struct drm_device *dev); - int (*irq_postinstall)(struct drm_device *dev); - void (*irq_uninstall)(struct drm_device *dev); - void (*irq_handler)(DRM_IRQ_ARGS); - u32 (*get_vblank_counter)(struct drm_device *dev, int crtc); - int (*enable_vblank)(struct drm_device *dev, int crtc); - void (*disable_vblank)(struct drm_device *dev, int crtc); - - drm_pci_id_list_t *id_entry; /* PCI ID, name, and chipset private */ - - /** - * Called by \c drm_device_is_agp. Typically used to determine if a - * card is really attached to AGP or not. - * - * \param dev DRM device handle - * - * \returns - * One of three values is returned depending on whether or not the - * card is absolutely \b not AGP (return of 0), absolutely \b is AGP - * (return of 1), or may or may not be AGP (return of 2). - */ - int (*device_is_agp) (struct drm_device * dev); - - drm_ioctl_desc_t *ioctls; - int max_ioctl; - - int buf_priv_size; - - int major; - int minor; - int patchlevel; - const char *name; /* Simple driver name */ - const char *desc; /* Longer driver name */ - const char *date; /* Date of last major changes. */ - - u32 driver_features; -}; - -/* Length for the array of resource pointers for drm_get_resource_*. */ -#define DRM_MAX_PCI_RESOURCE 6 - -/** - * DRM device functions structure - */ -struct drm_device { - struct drm_driver_info *driver; - drm_pci_id_list_t *id_entry; /* PCI ID, name, and chipset private */ - - u_int16_t pci_device; /* PCI device id */ - u_int16_t pci_vendor; /* PCI vendor id */ - - char *unique; /* Unique identifier: e.g., busid */ - int unique_len; /* Length of unique field */ - device_t device; /* Device instance from newbus */ - struct cdev *devnode; /* Device number for mknod */ - int if_version; /* Highest interface version set */ - - int flags; /* Flags to open(2) */ - - /* Locks */ - struct mtx vbl_lock; /* protects vblank operations */ - struct mtx dma_lock; /* protects dev->dma */ - struct mtx irq_lock; /* protects irq condition checks */ - struct mtx dev_lock; /* protects everything else */ - DRM_SPINTYPE drw_lock; - - /* Usage Counters */ - int open_count; /* Outstanding files open */ - int buf_use; /* Buffers in use -- cannot alloc */ - - /* Performance counters */ - unsigned long counters; - enum drm_stat_type types[15]; - atomic_t counts[15]; - - /* Authentication */ - drm_file_list_t files; - drm_magic_head_t magiclist[DRM_HASH_SIZE]; - - /* Linked list of mappable regions. Protected by dev_lock */ - drm_map_list_t maplist; - struct unrhdr *map_unrhdr; - - drm_local_map_t **context_sareas; - int max_context; - - drm_lock_data_t lock; /* Information on hardware lock */ - - /* DMA queues (contexts) */ - drm_device_dma_t *dma; /* Optional pointer for DMA support */ - - /* Context support */ - int irq; /* Interrupt used by board */ - int irq_enabled; /* True if the irq handler is enabled */ - int msi_enabled; /* MSI enabled */ - int irqrid; /* Interrupt used by board */ - struct resource *irqr; /* Resource for interrupt used by board */ - void *irqh; /* Handle from bus_setup_intr */ - - /* Storage of resource pointers for drm_get_resource_* */ - struct resource *pcir[DRM_MAX_PCI_RESOURCE]; - int pcirid[DRM_MAX_PCI_RESOURCE]; - - int pci_domain; - int pci_bus; - int pci_slot; - int pci_func; - - atomic_t context_flag; /* Context swapping flag */ - int last_context; /* Last current context */ - - int vblank_disable_allowed; - struct callout vblank_disable_timer; - u32 max_vblank_count; /* size of vblank counter register */ - struct drm_vblank_info *vblank; /* per crtc vblank info */ - int num_crtcs; - - struct sigio *buf_sigio; /* Processes waiting for SIGIO */ - - /* Sysctl support */ - struct drm_sysctl_info *sysctl; - - drm_agp_head_t *agp; - drm_sg_mem_t *sg; /* Scatter gather memory */ - atomic_t *ctx_bitmap; - void *dev_private; - unsigned int agp_buffer_token; - drm_local_map_t *agp_buffer_map; - - struct unrhdr *drw_unrhdr; - /* RB tree of drawable infos */ - RB_HEAD(drawable_tree, bsd_drm_drawable_info) drw_head; -}; - -static __inline__ int drm_core_check_feature(struct drm_device *dev, - int feature) -{ - return ((dev->driver->driver_features & feature) ? 1 : 0); -} - -#if __OS_HAS_AGP -static inline int drm_core_has_AGP(struct drm_device *dev) -{ - return drm_core_check_feature(dev, DRIVER_USE_AGP); -} -#else -#define drm_core_has_AGP(dev) (0) -#endif - -extern int drm_debug_flag; - -/* Device setup support (drm_drv.c) */ -int drm_probe(device_t kdev, drm_pci_id_list_t *idlist); -int drm_attach(device_t kdev, drm_pci_id_list_t *idlist); -void drm_close(void *data); -int drm_detach(device_t kdev); -d_ioctl_t drm_ioctl; -d_open_t drm_open; -d_read_t drm_read; -d_poll_t drm_poll; -d_mmap_t drm_mmap; -extern drm_local_map_t *drm_getsarea(struct drm_device *dev); - -/* File operations helpers (drm_fops.c) */ -extern int drm_open_helper(struct cdev *kdev, int flags, int fmt, - DRM_STRUCTPROC *p, - struct drm_device *dev); - -/* Memory management support (drm_memory.c) */ -void drm_mem_init(void); -void drm_mem_uninit(void); -void *drm_ioremap_wc(struct drm_device *dev, drm_local_map_t *map); -void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map); -void drm_ioremapfree(drm_local_map_t *map); -int drm_mtrr_add(unsigned long offset, size_t size, int flags); -int drm_mtrr_del(int handle, unsigned long offset, size_t size, int flags); - -int drm_context_switch(struct drm_device *dev, int old, int new); -int drm_context_switch_complete(struct drm_device *dev, int new); - -int drm_ctxbitmap_init(struct drm_device *dev); -void drm_ctxbitmap_cleanup(struct drm_device *dev); -void drm_ctxbitmap_free(struct drm_device *dev, int ctx_handle); -int drm_ctxbitmap_next(struct drm_device *dev); - -/* Locking IOCTL support (drm_lock.c) */ -int drm_lock_take(struct drm_lock_data *lock_data, - unsigned int context); -int drm_lock_transfer(struct drm_lock_data *lock_data, - unsigned int context); -int drm_lock_free(struct drm_lock_data *lock_data, - unsigned int context); - -/* Buffer management support (drm_bufs.c) */ -unsigned long drm_get_resource_start(struct drm_device *dev, - unsigned int resource); -unsigned long drm_get_resource_len(struct drm_device *dev, - unsigned int resource); -void drm_rmmap(struct drm_device *dev, drm_local_map_t *map); -int drm_order(unsigned long size); -int drm_addmap(struct drm_device *dev, unsigned long offset, - unsigned long size, - enum drm_map_type type, enum drm_map_flags flags, - drm_local_map_t **map_ptr); -int drm_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *request); -int drm_addbufs_sg(struct drm_device *dev, struct drm_buf_desc *request); -int drm_addbufs_agp(struct drm_device *dev, struct drm_buf_desc *request); - -/* DMA support (drm_dma.c) */ -int drm_dma_setup(struct drm_device *dev); -void drm_dma_takedown(struct drm_device *dev); -void drm_free_buffer(struct drm_device *dev, drm_buf_t *buf); -void drm_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv); -#define drm_core_reclaim_buffers drm_reclaim_buffers - -/* IRQ support (drm_irq.c) */ -int drm_irq_install(struct drm_device *dev); -int drm_irq_uninstall(struct drm_device *dev); -irqreturn_t drm_irq_handler(DRM_IRQ_ARGS); -void drm_driver_irq_preinstall(struct drm_device *dev); -void drm_driver_irq_postinstall(struct drm_device *dev); -void drm_driver_irq_uninstall(struct drm_device *dev); -void drm_handle_vblank(struct drm_device *dev, int crtc); -u32 drm_vblank_count(struct drm_device *dev, int crtc); -int drm_vblank_get(struct drm_device *dev, int crtc); -void drm_vblank_put(struct drm_device *dev, int crtc); -void drm_vblank_cleanup(struct drm_device *dev); -int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq); -int drm_vblank_init(struct drm_device *dev, int num_crtcs); -int drm_modeset_ctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -/* AGP/PCI Express/GART support (drm_agpsupport.c) */ -int drm_device_is_agp(struct drm_device *dev); -int drm_device_is_pcie(struct drm_device *dev); -drm_agp_head_t *drm_agp_init(void); -int drm_agp_acquire(struct drm_device *dev); -int drm_agp_release(struct drm_device *dev); -int drm_agp_info(struct drm_device * dev, struct drm_agp_info *info); -int drm_agp_enable(struct drm_device *dev, struct drm_agp_mode mode); -void *drm_agp_allocate_memory(size_t pages, u32 type); -int drm_agp_free_memory(void *handle); -int drm_agp_bind_memory(void *handle, off_t start); -int drm_agp_unbind_memory(void *handle); -int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request); -int drm_agp_free(struct drm_device *dev, struct drm_agp_buffer *request); -int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request); -int drm_agp_unbind(struct drm_device *dev, struct drm_agp_binding *request); - -/* Scatter Gather Support (drm_scatter.c) */ -void drm_sg_cleanup(drm_sg_mem_t *entry); -int drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather * request); - -/* sysctl support (drm_sysctl.h) */ -extern int drm_sysctl_init(struct drm_device *dev); -extern int drm_sysctl_cleanup(struct drm_device *dev); - -/* ATI PCIGART support (ati_pcigart.c) */ -int drm_ati_pcigart_init(struct drm_device *dev, - struct drm_ati_pcigart_info *gart_info); -int drm_ati_pcigart_cleanup(struct drm_device *dev, - struct drm_ati_pcigart_info *gart_info); - -/* Locking IOCTL support (drm_drv.c) */ -int drm_lock(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_unlock(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_version(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_setversion(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -/* Misc. IOCTL support (drm_ioctl.c) */ -int drm_irq_by_busid(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_getunique(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_setunique(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_getmap(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_getclient(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_getstats(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_noop(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -/* Context IOCTL support (drm_context.c) */ -int drm_resctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_addctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_modctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_getctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_switchctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_newctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_rmctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_setsareactx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_getsareactx(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -/* Drawable IOCTL support (drm_drawable.c) */ -int drm_adddraw(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_rmdraw(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_update_draw(struct drm_device *dev, void *data, - struct drm_file *file_priv); -struct drm_drawable_info *drm_get_drawable_info(struct drm_device *dev, - int handle); - -/* Drawable support (drm_drawable.c) */ -void drm_drawable_free_all(struct drm_device *dev); - -/* Authentication IOCTL support (drm_auth.c) */ -int drm_getmagic(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_authmagic(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -/* Buffer management support (drm_bufs.c) */ -int drm_addmap_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_rmmap_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_addbufs(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_infobufs(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_markbufs(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_freebufs(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_mapbufs(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -/* DMA support (drm_dma.c) */ -int drm_dma(struct drm_device *dev, void *data, struct drm_file *file_priv); - -/* IRQ support (drm_irq.c) */ -int drm_control(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_wait_vblank(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -/* AGP/GART support (drm_agpsupport.c) */ -int drm_agp_acquire_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_agp_release_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_agp_enable_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_agp_info_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_agp_alloc_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_agp_free_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_agp_unbind_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_agp_bind_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -/* Scatter Gather Support (drm_scatter.c) */ -int drm_sg_alloc_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_sg_free(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -/* consistent PCI memory functions (drm_pci.c) */ -drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size, - size_t align, dma_addr_t maxaddr); -void drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah); - -/* Inline replacements for drm_alloc and friends */ -static __inline__ void * -drm_alloc(size_t size, struct malloc_type *area) -{ - return malloc(size, area, M_NOWAIT); -} - -static __inline__ void * -drm_calloc(size_t nmemb, size_t size, struct malloc_type *area) -{ - return malloc(size * nmemb, area, M_NOWAIT | M_ZERO); -} - -static __inline__ void * -drm_realloc(void *oldpt, size_t oldsize, size_t size, - struct malloc_type *area) -{ - return reallocf(oldpt, size, area, M_NOWAIT); -} - -static __inline__ void -drm_free(void *pt, size_t size, struct malloc_type *area) -{ - free(pt, area); -} - -/* Inline replacements for DRM_IOREMAP macros */ -static __inline__ void -drm_core_ioremap_wc(struct drm_local_map *map, struct drm_device *dev) -{ - map->virtual = drm_ioremap_wc(dev, map); -} -static __inline__ void -drm_core_ioremap(struct drm_local_map *map, struct drm_device *dev) -{ - map->virtual = drm_ioremap(dev, map); -} -static __inline__ void -drm_core_ioremapfree(struct drm_local_map *map, struct drm_device *dev) -{ - if ( map->virtual && map->size ) - drm_ioremapfree(map); -} - -static __inline__ struct drm_local_map * -drm_core_findmap(struct drm_device *dev, unsigned long offset) -{ - drm_local_map_t *map; - - DRM_SPINLOCK_ASSERT(&dev->dev_lock); - TAILQ_FOREACH(map, &dev->maplist, link) { - if (offset == (unsigned long)map->handle) - return map; - } - return NULL; -} - -static __inline__ void drm_core_dropmap(struct drm_map *map) -{ -} - -#endif /* __KERNEL__ */ -#endif /* _DRM_P_H_ */ diff --git a/sys/dev/drm/drm_agpsupport.c b/sys/dev/drm/drm_agpsupport.c deleted file mode 100644 index 4bb4e7a6ca1d..000000000000 --- a/sys/dev/drm/drm_agpsupport.c +++ /dev/null @@ -1,434 +0,0 @@ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Author: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_agpsupport.c - * Support code for tying the kernel AGP support to DRM drivers and - * the DRM's AGP ioctls. - */ - -#include "dev/drm/drmP.h" - -#include <dev/agp/agpreg.h> -#include <dev/pci/pcireg.h> - -/* Returns 1 if AGP or 0 if not. */ -static int -drm_device_find_capability(struct drm_device *dev, int cap) -{ - - return (pci_find_cap(dev->device, cap, NULL) == 0); -} - -int drm_device_is_agp(struct drm_device *dev) -{ - if (dev->driver->device_is_agp != NULL) { - int ret; - - /* device_is_agp returns a tristate, 0 = not AGP, 1 = definitely - * AGP, 2 = fall back to PCI capability - */ - ret = (*dev->driver->device_is_agp)(dev); - if (ret != DRM_MIGHT_BE_AGP) - return ret; - } - - return (drm_device_find_capability(dev, PCIY_AGP)); -} - -int drm_device_is_pcie(struct drm_device *dev) -{ - return (drm_device_find_capability(dev, PCIY_EXPRESS)); -} - -int drm_agp_info(struct drm_device * dev, struct drm_agp_info *info) -{ - struct agp_info *kern; - - if (!dev->agp || !dev->agp->acquired) - return EINVAL; - - kern = &dev->agp->info; - agp_get_info(dev->agp->agpdev, kern); - info->agp_version_major = 1; - info->agp_version_minor = 0; - info->mode = kern->ai_mode; - info->aperture_base = kern->ai_aperture_base; - info->aperture_size = kern->ai_aperture_size; - info->memory_allowed = kern->ai_memory_allowed; - info->memory_used = kern->ai_memory_used; - info->id_vendor = kern->ai_devid & 0xffff; - info->id_device = kern->ai_devid >> 16; - - return 0; -} - -int drm_agp_info_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - int err; - struct drm_agp_info info; - - err = drm_agp_info(dev, &info); - if (err != 0) - return err; - - *(struct drm_agp_info *) data = info; - return 0; -} - -int drm_agp_acquire_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - - return drm_agp_acquire(dev); -} - -int drm_agp_acquire(struct drm_device *dev) -{ - int retcode; - - if (!dev->agp || dev->agp->acquired) - return EINVAL; - - retcode = agp_acquire(dev->agp->agpdev); - if (retcode) - return retcode; - - dev->agp->acquired = 1; - return 0; -} - -int drm_agp_release_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - - return drm_agp_release(dev); -} - -int drm_agp_release(struct drm_device * dev) -{ - if (!dev->agp || !dev->agp->acquired) - return EINVAL; - agp_release(dev->agp->agpdev); - dev->agp->acquired = 0; - return 0; -} - -int drm_agp_enable(struct drm_device *dev, struct drm_agp_mode mode) -{ - - if (!dev->agp || !dev->agp->acquired) - return EINVAL; - - dev->agp->mode = mode.mode; - agp_enable(dev->agp->agpdev, mode.mode); - dev->agp->enabled = 1; - return 0; -} - -int drm_agp_enable_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_agp_mode mode; - - mode = *(struct drm_agp_mode *) data; - - return drm_agp_enable(dev, mode); -} - -int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request) -{ - drm_agp_mem_t *entry; - void *handle; - unsigned long pages; - u_int32_t type; - struct agp_memory_info info; - - if (!dev->agp || !dev->agp->acquired) - return EINVAL; - - entry = malloc(sizeof(*entry), DRM_MEM_AGPLISTS, M_NOWAIT | M_ZERO); - if (entry == NULL) - return ENOMEM; - - pages = (request->size + PAGE_SIZE - 1) / PAGE_SIZE; - type = (u_int32_t) request->type; - - DRM_UNLOCK(); - handle = drm_agp_allocate_memory(pages, type); - DRM_LOCK(); - if (handle == NULL) { - free(entry, DRM_MEM_AGPLISTS); - return ENOMEM; - } - - entry->handle = handle; - entry->bound = 0; - entry->pages = pages; - entry->prev = NULL; - entry->next = dev->agp->memory; - if (dev->agp->memory) - dev->agp->memory->prev = entry; - dev->agp->memory = entry; - - agp_memory_info(dev->agp->agpdev, entry->handle, &info); - - request->handle = (unsigned long) entry->handle; - request->physical = info.ami_physical; - - return 0; -} - -int drm_agp_alloc_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_agp_buffer request; - int retcode; - - request = *(struct drm_agp_buffer *) data; - - DRM_LOCK(); - retcode = drm_agp_alloc(dev, &request); - DRM_UNLOCK(); - - *(struct drm_agp_buffer *) data = request; - - return retcode; -} - -static drm_agp_mem_t * drm_agp_lookup_entry(struct drm_device *dev, - void *handle) -{ - drm_agp_mem_t *entry; - - for (entry = dev->agp->memory; entry; entry = entry->next) { - if (entry->handle == handle) return entry; - } - return NULL; -} - -int drm_agp_unbind(struct drm_device *dev, struct drm_agp_binding *request) -{ - drm_agp_mem_t *entry; - int retcode; - - if (!dev->agp || !dev->agp->acquired) - return EINVAL; - - entry = drm_agp_lookup_entry(dev, (void *)request->handle); - if (entry == NULL || !entry->bound) - return EINVAL; - - DRM_UNLOCK(); - retcode = drm_agp_unbind_memory(entry->handle); - DRM_LOCK(); - - if (retcode == 0) - entry->bound = 0; - - return retcode; -} - -int drm_agp_unbind_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_agp_binding request; - int retcode; - - request = *(struct drm_agp_binding *) data; - - DRM_LOCK(); - retcode = drm_agp_unbind(dev, &request); - DRM_UNLOCK(); - - return retcode; -} - -int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request) -{ - drm_agp_mem_t *entry; - int retcode; - int page; - - if (!dev->agp || !dev->agp->acquired) - return EINVAL; - - DRM_DEBUG("agp_bind, page_size=%x\n", (int)PAGE_SIZE); - - entry = drm_agp_lookup_entry(dev, (void *)request->handle); - if (entry == NULL || entry->bound) - return EINVAL; - - page = (request->offset + PAGE_SIZE - 1) / PAGE_SIZE; - - DRM_UNLOCK(); - retcode = drm_agp_bind_memory(entry->handle, page); - DRM_LOCK(); - if (retcode == 0) - entry->bound = dev->agp->base + (page << PAGE_SHIFT); - - return retcode; -} - -int drm_agp_bind_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_agp_binding request; - int retcode; - - request = *(struct drm_agp_binding *) data; - - DRM_LOCK(); - retcode = drm_agp_bind(dev, &request); - DRM_UNLOCK(); - - return retcode; -} - -int drm_agp_free(struct drm_device *dev, struct drm_agp_buffer *request) -{ - drm_agp_mem_t *entry; - - if (!dev->agp || !dev->agp->acquired) - return EINVAL; - - entry = drm_agp_lookup_entry(dev, (void*)request->handle); - if (entry == NULL) - return EINVAL; - - if (entry->prev) - entry->prev->next = entry->next; - else - dev->agp->memory = entry->next; - if (entry->next) - entry->next->prev = entry->prev; - - DRM_UNLOCK(); - if (entry->bound) - drm_agp_unbind_memory(entry->handle); - drm_agp_free_memory(entry->handle); - DRM_LOCK(); - - free(entry, DRM_MEM_AGPLISTS); - - return 0; - -} - -int drm_agp_free_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_agp_buffer request; - int retcode; - - request = *(struct drm_agp_buffer *) data; - - DRM_LOCK(); - retcode = drm_agp_free(dev, &request); - DRM_UNLOCK(); - - return retcode; -} - -drm_agp_head_t *drm_agp_init(void) -{ - device_t agpdev; - drm_agp_head_t *head = NULL; - int agp_available = 1; - - agpdev = DRM_AGP_FIND_DEVICE(); - if (!agpdev) - agp_available = 0; - - DRM_DEBUG("agp_available = %d\n", agp_available); - - if (agp_available) { - head = malloc(sizeof(*head), DRM_MEM_AGPLISTS, - M_NOWAIT | M_ZERO); - if (head == NULL) - return NULL; - head->agpdev = agpdev; - agp_get_info(agpdev, &head->info); - head->base = head->info.ai_aperture_base; - head->memory = NULL; - DRM_INFO("AGP at 0x%08lx %dMB\n", - (long)head->info.ai_aperture_base, - (int)(head->info.ai_aperture_size >> 20)); - } - return head; -} - -void *drm_agp_allocate_memory(size_t pages, u32 type) -{ - device_t agpdev; - - agpdev = DRM_AGP_FIND_DEVICE(); - if (!agpdev) - return NULL; - - return agp_alloc_memory(agpdev, type, pages << AGP_PAGE_SHIFT); -} - -int drm_agp_free_memory(void *handle) -{ - device_t agpdev; - - agpdev = DRM_AGP_FIND_DEVICE(); - if (!agpdev || !handle) - return 0; - - agp_free_memory(agpdev, handle); - return 1; -} - -int drm_agp_bind_memory(void *handle, off_t start) -{ - device_t agpdev; - - agpdev = DRM_AGP_FIND_DEVICE(); - if (!agpdev || !handle) - return EINVAL; - - return agp_bind_memory(agpdev, handle, start * PAGE_SIZE); -} - -int drm_agp_unbind_memory(void *handle) -{ - device_t agpdev; - - agpdev = DRM_AGP_FIND_DEVICE(); - if (!agpdev || !handle) - return EINVAL; - - return agp_unbind_memory(agpdev, handle); -} diff --git a/sys/dev/drm/drm_atomic.h b/sys/dev/drm/drm_atomic.h deleted file mode 100644 index e8cd81876789..000000000000 --- a/sys/dev/drm/drm_atomic.h +++ /dev/null @@ -1,91 +0,0 @@ -/** - * \file drm_atomic.h - * Atomic operations used in the DRM which may or may not be provided by the OS. - * - * \author Eric Anholt <anholt@FreeBSD.org> - */ - -/*- - * Copyright 2004 Eric Anholt - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* Many of these implementations are rather fake, but good enough. */ - -typedef u_int32_t atomic_t; - -#define atomic_set(p, v) (*(p) = (v)) -#define atomic_read(p) (*(p)) -#define atomic_inc(p) atomic_add_int(p, 1) -#define atomic_dec(p) atomic_subtract_int(p, 1) -#define atomic_add(n, p) atomic_add_int(p, n) -#define atomic_sub(n, p) atomic_subtract_int(p, n) - -static __inline atomic_t -test_and_set_bit(int b, volatile void *p) -{ - int s = splhigh(); - unsigned int m = 1<<b; - unsigned int r = *(volatile int *)p & m; - *(volatile int *)p |= m; - splx(s); - return r; -} - -static __inline void -clear_bit(int b, volatile void *p) -{ - atomic_clear_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f)); -} - -static __inline void -set_bit(int b, volatile void *p) -{ - atomic_set_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f)); -} - -static __inline int -test_bit(int b, volatile void *p) -{ - return ((volatile int *)p)[b >> 5] & (1 << (b & 0x1f)); -} - -static __inline int -find_first_zero_bit(volatile void *p, int max) -{ - int b; - volatile int *ptr = (volatile int *)p; - - for (b = 0; b < max; b += 32) { - if (ptr[b >> 5] != ~0) { - for (;;) { - if ((ptr[b >> 5] & (1 << (b & 0x1f))) == 0) - return b; - b++; - } - } - } - return max; -} diff --git a/sys/dev/drm/drm_auth.c b/sys/dev/drm/drm_auth.c deleted file mode 100644 index 555badc86cf3..000000000000 --- a/sys/dev/drm/drm_auth.c +++ /dev/null @@ -1,190 +0,0 @@ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_auth.c - * Implementation of the get/authmagic ioctls implementing the authentication - * scheme between the master and clients. - */ - -#include "dev/drm/drmP.h" - -static int drm_hash_magic(drm_magic_t magic) -{ - return magic & (DRM_HASH_SIZE-1); -} - -/** - * Returns the file private associated with the given magic number. - */ -static struct drm_file *drm_find_file(struct drm_device *dev, drm_magic_t magic) -{ - drm_magic_entry_t *pt; - int hash = drm_hash_magic(magic); - - DRM_SPINLOCK_ASSERT(&dev->dev_lock); - - for (pt = dev->magiclist[hash].head; pt; pt = pt->next) { - if (pt->magic == magic) { - return pt->priv; - } - } - - return NULL; -} - -/** - * Inserts the given magic number into the hash table of used magic number - * lists. - */ -static int drm_add_magic(struct drm_device *dev, struct drm_file *priv, - drm_magic_t magic) -{ - int hash; - drm_magic_entry_t *entry; - - DRM_DEBUG("%d\n", magic); - - DRM_SPINLOCK_ASSERT(&dev->dev_lock); - - hash = drm_hash_magic(magic); - entry = malloc(sizeof(*entry), DRM_MEM_MAGIC, M_ZERO | M_NOWAIT); - if (!entry) - return ENOMEM; - entry->magic = magic; - entry->priv = priv; - entry->next = NULL; - - if (dev->magiclist[hash].tail) { - dev->magiclist[hash].tail->next = entry; - dev->magiclist[hash].tail = entry; - } else { - dev->magiclist[hash].head = entry; - dev->magiclist[hash].tail = entry; - } - - return 0; -} - -/** - * Removes the given magic number from the hash table of used magic number - * lists. - */ -static int drm_remove_magic(struct drm_device *dev, drm_magic_t magic) -{ - drm_magic_entry_t *prev = NULL; - drm_magic_entry_t *pt; - int hash; - - DRM_SPINLOCK_ASSERT(&dev->dev_lock); - - DRM_DEBUG("%d\n", magic); - hash = drm_hash_magic(magic); - - for (pt = dev->magiclist[hash].head; pt; prev = pt, pt = pt->next) { - if (pt->magic == magic) { - if (dev->magiclist[hash].head == pt) { - dev->magiclist[hash].head = pt->next; - } - if (dev->magiclist[hash].tail == pt) { - dev->magiclist[hash].tail = prev; - } - if (prev) { - prev->next = pt->next; - } - free(pt, DRM_MEM_MAGIC); - return 0; - } - } - - return EINVAL; -} - -/** - * Called by the client, this returns a unique magic number to be authorized - * by the master. - * - * The master may use its own knowledge of the client (such as the X - * connection that the magic is passed over) to determine if the magic number - * should be authenticated. - */ -int drm_getmagic(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - static drm_magic_t sequence = 0; - struct drm_auth *auth = data; - - /* Find unique magic */ - if (file_priv->magic) { - auth->magic = file_priv->magic; - } else { - DRM_LOCK(); - do { - int old = sequence; - - auth->magic = old+1; - - if (!atomic_cmpset_int(&sequence, old, auth->magic)) - continue; - } while (drm_find_file(dev, auth->magic)); - file_priv->magic = auth->magic; - drm_add_magic(dev, file_priv, auth->magic); - DRM_UNLOCK(); - } - - DRM_DEBUG("%u\n", auth->magic); - - return 0; -} - -/** - * Marks the client associated with the given magic number as authenticated. - */ -int drm_authmagic(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_auth *auth = data; - struct drm_file *priv; - - DRM_DEBUG("%u\n", auth->magic); - - DRM_LOCK(); - priv = drm_find_file(dev, auth->magic); - if (priv != NULL) { - priv->authenticated = 1; - drm_remove_magic(dev, auth->magic); - DRM_UNLOCK(); - return 0; - } else { - DRM_UNLOCK(); - return EINVAL; - } -} diff --git a/sys/dev/drm/drm_bufs.c b/sys/dev/drm/drm_bufs.c deleted file mode 100644 index 26b70b976014..000000000000 --- a/sys/dev/drm/drm_bufs.c +++ /dev/null @@ -1,1125 +0,0 @@ -/*- - * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_bufs.c - * Implementation of the ioctls for setup of DRM mappings and DMA buffers. - */ - -#include "dev/pci/pcireg.h" - -#include "dev/drm/drmP.h" - -/* Allocation of PCI memory resources (framebuffer, registers, etc.) for - * drm_get_resource_*. Note that they are not RF_ACTIVE, so there's no virtual - * address for accessing them. Cleaned up at unload. - */ -static int drm_alloc_resource(struct drm_device *dev, int resource) -{ - struct resource *res; - int rid; - - DRM_SPINLOCK_ASSERT(&dev->dev_lock); - - if (resource >= DRM_MAX_PCI_RESOURCE) { - DRM_ERROR("Resource %d too large\n", resource); - return 1; - } - - if (dev->pcir[resource] != NULL) { - return 0; - } - - DRM_UNLOCK(); - rid = PCIR_BAR(resource); - res = bus_alloc_resource_any(dev->device, SYS_RES_MEMORY, &rid, - RF_SHAREABLE); - DRM_LOCK(); - if (res == NULL) { - DRM_ERROR("Couldn't find resource 0x%x\n", resource); - return 1; - } - - if (dev->pcir[resource] == NULL) { - dev->pcirid[resource] = rid; - dev->pcir[resource] = res; - } - - return 0; -} - -unsigned long drm_get_resource_start(struct drm_device *dev, - unsigned int resource) -{ - if (drm_alloc_resource(dev, resource) != 0) - return 0; - - return rman_get_start(dev->pcir[resource]); -} - -unsigned long drm_get_resource_len(struct drm_device *dev, - unsigned int resource) -{ - if (drm_alloc_resource(dev, resource) != 0) - return 0; - - return rman_get_size(dev->pcir[resource]); -} - -int drm_addmap(struct drm_device * dev, unsigned long offset, - unsigned long size, - enum drm_map_type type, enum drm_map_flags flags, drm_local_map_t **map_ptr) -{ - drm_local_map_t *map; - int align; - /*drm_agp_mem_t *entry; - int valid;*/ - - /* Only allow shared memory to be removable since we only keep enough - * book keeping information about shared memory to allow for removal - * when processes fork. - */ - if ((flags & _DRM_REMOVABLE) && type != _DRM_SHM) { - DRM_ERROR("Requested removable map for non-DRM_SHM\n"); - return EINVAL; - } - if ((offset & PAGE_MASK) || (size & PAGE_MASK)) { - DRM_ERROR("offset/size not page aligned: 0x%lx/0x%lx\n", - offset, size); - return EINVAL; - } - if (offset + size < offset) { - DRM_ERROR("offset and size wrap around: 0x%lx/0x%lx\n", - offset, size); - return EINVAL; - } - - DRM_DEBUG("offset = 0x%08lx, size = 0x%08lx, type = %d\n", offset, - size, type); - - /* Check if this is just another version of a kernel-allocated map, and - * just hand that back if so. - */ - if (type == _DRM_REGISTERS || type == _DRM_FRAME_BUFFER || - type == _DRM_SHM) { - TAILQ_FOREACH(map, &dev->maplist, link) { - if (map->type == type && (map->offset == offset || - (map->type == _DRM_SHM && - map->flags == _DRM_CONTAINS_LOCK))) { - map->size = size; - DRM_DEBUG("Found kernel map %d\n", type); - goto done; - } - } - } - DRM_UNLOCK(); - - /* Allocate a new map structure, fill it in, and do any type-specific - * initialization necessary. - */ - map = malloc(sizeof(*map), DRM_MEM_MAPS, M_ZERO | M_NOWAIT); - if (!map) { - DRM_LOCK(); - return ENOMEM; - } - - map->offset = offset; - map->size = size; - map->type = type; - map->flags = flags; - map->handle = (void *)((unsigned long)alloc_unr(dev->map_unrhdr) << - DRM_MAP_HANDLE_SHIFT); - - switch (map->type) { - case _DRM_REGISTERS: - map->virtual = drm_ioremap(dev, map); - if (!(map->flags & _DRM_WRITE_COMBINING)) - break; - /* FALLTHROUGH */ - case _DRM_FRAME_BUFFER: - if (drm_mtrr_add(map->offset, map->size, DRM_MTRR_WC) == 0) - map->mtrr = 1; - break; - case _DRM_SHM: - map->virtual = malloc(map->size, DRM_MEM_MAPS, M_NOWAIT); - DRM_DEBUG("%lu %d %p\n", - map->size, drm_order(map->size), map->virtual); - if (!map->virtual) { - free(map, DRM_MEM_MAPS); - DRM_LOCK(); - return ENOMEM; - } - map->offset = (unsigned long)map->virtual; - if (map->flags & _DRM_CONTAINS_LOCK) { - /* Prevent a 2nd X Server from creating a 2nd lock */ - DRM_LOCK(); - if (dev->lock.hw_lock != NULL) { - DRM_UNLOCK(); - free(map->virtual, DRM_MEM_MAPS); - free(map, DRM_MEM_MAPS); - return EBUSY; - } - dev->lock.hw_lock = map->virtual; /* Pointer to lock */ - DRM_UNLOCK(); - } - break; - case _DRM_AGP: - /*valid = 0;*/ - /* In some cases (i810 driver), user space may have already - * added the AGP base itself, because dev->agp->base previously - * only got set during AGP enable. So, only add the base - * address if the map's offset isn't already within the - * aperture. - */ - if (map->offset < dev->agp->base || - map->offset > dev->agp->base + - dev->agp->info.ai_aperture_size - 1) { - map->offset += dev->agp->base; - } - map->mtrr = dev->agp->mtrr; /* for getmap */ - /*for (entry = dev->agp->memory; entry; entry = entry->next) { - if ((map->offset >= entry->bound) && - (map->offset + map->size <= - entry->bound + entry->pages * PAGE_SIZE)) { - valid = 1; - break; - } - } - if (!valid) { - free(map, DRM_MEM_MAPS); - DRM_LOCK(); - return EACCES; - }*/ - break; - case _DRM_SCATTER_GATHER: - if (!dev->sg) { - free(map, DRM_MEM_MAPS); - DRM_LOCK(); - return EINVAL; - } - map->virtual = (void *)(dev->sg->vaddr + offset); - map->offset = dev->sg->vaddr + offset; - break; - case _DRM_CONSISTENT: - /* Unfortunately, we don't get any alignment specification from - * the caller, so we have to guess. drm_pci_alloc requires - * a power-of-two alignment, so try to align the bus address of - * the map to it size if possible, otherwise just assume - * PAGE_SIZE alignment. - */ - align = map->size; - if ((align & (align - 1)) != 0) - align = PAGE_SIZE; - map->dmah = drm_pci_alloc(dev, map->size, align, 0xfffffffful); - if (map->dmah == NULL) { - free(map, DRM_MEM_MAPS); - DRM_LOCK(); - return ENOMEM; - } - map->virtual = map->dmah->vaddr; - map->offset = map->dmah->busaddr; - break; - default: - DRM_ERROR("Bad map type %d\n", map->type); - free(map, DRM_MEM_MAPS); - DRM_LOCK(); - return EINVAL; - } - - DRM_LOCK(); - TAILQ_INSERT_TAIL(&dev->maplist, map, link); - -done: - /* Jumped to, with lock held, when a kernel map is found. */ - - DRM_DEBUG("Added map %d 0x%lx/0x%lx\n", map->type, map->offset, - map->size); - - *map_ptr = map; - - return 0; -} - -int drm_addmap_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_map *request = data; - drm_local_map_t *map; - int err; - - if (!(dev->flags & (FREAD|FWRITE))) - return EACCES; /* Require read/write */ - - if (!DRM_SUSER(DRM_CURPROC) && request->type != _DRM_AGP) - return EACCES; - - DRM_LOCK(); - err = drm_addmap(dev, request->offset, request->size, request->type, - request->flags, &map); - DRM_UNLOCK(); - if (err != 0) - return err; - - request->offset = map->offset; - request->size = map->size; - request->type = map->type; - request->flags = map->flags; - request->mtrr = map->mtrr; - request->handle = (void *)map->handle; - - return 0; -} - -void drm_rmmap(struct drm_device *dev, drm_local_map_t *map) -{ - DRM_SPINLOCK_ASSERT(&dev->dev_lock); - - if (map == NULL) - return; - - TAILQ_REMOVE(&dev->maplist, map, link); - - switch (map->type) { - case _DRM_REGISTERS: - if (map->bsr == NULL) - drm_ioremapfree(map); - /* FALLTHROUGH */ - case _DRM_FRAME_BUFFER: - if (map->mtrr) { - int __unused retcode; - - retcode = drm_mtrr_del(0, map->offset, map->size, - DRM_MTRR_WC); - DRM_DEBUG("mtrr_del = %d\n", retcode); - } - break; - case _DRM_SHM: - free(map->virtual, DRM_MEM_MAPS); - break; - case _DRM_AGP: - case _DRM_SCATTER_GATHER: - break; - case _DRM_CONSISTENT: - drm_pci_free(dev, map->dmah); - break; - default: - DRM_ERROR("Bad map type %d\n", map->type); - break; - } - - if (map->bsr != NULL) { - bus_release_resource(dev->device, SYS_RES_MEMORY, map->rid, - map->bsr); - } - - DRM_UNLOCK(); - if (map->handle) - free_unr(dev->map_unrhdr, (unsigned long)map->handle >> - DRM_MAP_HANDLE_SHIFT); - DRM_LOCK(); - - free(map, DRM_MEM_MAPS); -} - -/* Remove a map private from list and deallocate resources if the mapping - * isn't in use. - */ - -int drm_rmmap_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_local_map_t *map; - struct drm_map *request = data; - - DRM_LOCK(); - TAILQ_FOREACH(map, &dev->maplist, link) { - if (map->handle == request->handle && - map->flags & _DRM_REMOVABLE) - break; - } - - /* No match found. */ - if (map == NULL) { - DRM_UNLOCK(); - return EINVAL; - } - - drm_rmmap(dev, map); - - DRM_UNLOCK(); - - return 0; -} - - -static void drm_cleanup_buf_error(struct drm_device *dev, - drm_buf_entry_t *entry) -{ - int i; - - if (entry->seg_count) { - for (i = 0; i < entry->seg_count; i++) { - drm_pci_free(dev, entry->seglist[i]); - } - free(entry->seglist, DRM_MEM_SEGS); - - entry->seg_count = 0; - } - - if (entry->buf_count) { - for (i = 0; i < entry->buf_count; i++) { - free(entry->buflist[i].dev_private, DRM_MEM_BUFS); - } - free(entry->buflist, DRM_MEM_BUFS); - - entry->buf_count = 0; - } -} - -static int drm_do_addbufs_agp(struct drm_device *dev, struct drm_buf_desc *request) -{ - drm_device_dma_t *dma = dev->dma; - drm_buf_entry_t *entry; - /*drm_agp_mem_t *agp_entry; - int valid*/ - drm_buf_t *buf; - unsigned long offset; - unsigned long agp_offset; - int count; - int order; - int size; - int alignment; - int page_order; - int total; - int byte_count; - int i; - drm_buf_t **temp_buflist; - - count = request->count; - order = drm_order(request->size); - size = 1 << order; - - alignment = (request->flags & _DRM_PAGE_ALIGN) - ? round_page(size) : size; - page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; - total = PAGE_SIZE << page_order; - - byte_count = 0; - agp_offset = dev->agp->base + request->agp_start; - - DRM_DEBUG("count: %d\n", count); - DRM_DEBUG("order: %d\n", order); - DRM_DEBUG("size: %d\n", size); - DRM_DEBUG("agp_offset: 0x%lx\n", agp_offset); - DRM_DEBUG("alignment: %d\n", alignment); - DRM_DEBUG("page_order: %d\n", page_order); - DRM_DEBUG("total: %d\n", total); - - /* Make sure buffers are located in AGP memory that we own */ - /* Breaks MGA due to drm_alloc_agp not setting up entries for the - * memory. Safe to ignore for now because these ioctls are still - * root-only. - */ - /*valid = 0; - for (agp_entry = dev->agp->memory; agp_entry; - agp_entry = agp_entry->next) { - if ((agp_offset >= agp_entry->bound) && - (agp_offset + total * count <= - agp_entry->bound + agp_entry->pages * PAGE_SIZE)) { - valid = 1; - break; - } - } - if (!valid) { - DRM_DEBUG("zone invalid\n"); - return EINVAL; - }*/ - - entry = &dma->bufs[order]; - - entry->buflist = malloc(count * sizeof(*entry->buflist), DRM_MEM_BUFS, - M_NOWAIT | M_ZERO); - if (!entry->buflist) { - return ENOMEM; - } - - entry->buf_size = size; - entry->page_order = page_order; - - offset = 0; - - while (entry->buf_count < count) { - buf = &entry->buflist[entry->buf_count]; - buf->idx = dma->buf_count + entry->buf_count; - buf->total = alignment; - buf->order = order; - buf->used = 0; - - buf->offset = (dma->byte_count + offset); - buf->bus_address = agp_offset + offset; - buf->address = (void *)(agp_offset + offset); - buf->next = NULL; - buf->pending = 0; - buf->file_priv = NULL; - - buf->dev_priv_size = dev->driver->buf_priv_size; - buf->dev_private = malloc(buf->dev_priv_size, DRM_MEM_BUFS, - M_NOWAIT | M_ZERO); - if (buf->dev_private == NULL) { - /* Set count correctly so we free the proper amount. */ - entry->buf_count = count; - drm_cleanup_buf_error(dev, entry); - return ENOMEM; - } - - offset += alignment; - entry->buf_count++; - byte_count += PAGE_SIZE << page_order; - } - - DRM_DEBUG("byte_count: %d\n", byte_count); - - temp_buflist = realloc(dma->buflist, - (dma->buf_count + entry->buf_count) * sizeof(*dma->buflist), - DRM_MEM_BUFS, M_NOWAIT); - if (temp_buflist == NULL) { - /* Free the entry because it isn't valid */ - drm_cleanup_buf_error(dev, entry); - return ENOMEM; - } - dma->buflist = temp_buflist; - - for (i = 0; i < entry->buf_count; i++) { - dma->buflist[i + dma->buf_count] = &entry->buflist[i]; - } - - dma->buf_count += entry->buf_count; - dma->byte_count += byte_count; - - DRM_DEBUG("dma->buf_count : %d\n", dma->buf_count); - DRM_DEBUG("entry->buf_count : %d\n", entry->buf_count); - - request->count = entry->buf_count; - request->size = size; - - dma->flags = _DRM_DMA_USE_AGP; - - return 0; -} - -static int drm_do_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *request) -{ - drm_device_dma_t *dma = dev->dma; - int count; - int order; - int size; - int total; - int page_order; - drm_buf_entry_t *entry; - drm_buf_t *buf; - int alignment; - unsigned long offset; - int i; - int byte_count; - int page_count; - unsigned long *temp_pagelist; - drm_buf_t **temp_buflist; - - count = request->count; - order = drm_order(request->size); - size = 1 << order; - - DRM_DEBUG("count=%d, size=%d (%d), order=%d\n", - request->count, request->size, size, order); - - alignment = (request->flags & _DRM_PAGE_ALIGN) - ? round_page(size) : size; - page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; - total = PAGE_SIZE << page_order; - - entry = &dma->bufs[order]; - - entry->buflist = malloc(count * sizeof(*entry->buflist), DRM_MEM_BUFS, - M_NOWAIT | M_ZERO); - entry->seglist = malloc(count * sizeof(*entry->seglist), DRM_MEM_SEGS, - M_NOWAIT | M_ZERO); - - /* Keep the original pagelist until we know all the allocations - * have succeeded - */ - temp_pagelist = malloc((dma->page_count + (count << page_order)) * - sizeof(*dma->pagelist), DRM_MEM_PAGES, M_NOWAIT); - - if (entry->buflist == NULL || entry->seglist == NULL || - temp_pagelist == NULL) { - free(temp_pagelist, DRM_MEM_PAGES); - free(entry->seglist, DRM_MEM_SEGS); - free(entry->buflist, DRM_MEM_BUFS); - return ENOMEM; - } - - memcpy(temp_pagelist, dma->pagelist, dma->page_count * - sizeof(*dma->pagelist)); - - DRM_DEBUG("pagelist: %d entries\n", - dma->page_count + (count << page_order)); - - entry->buf_size = size; - entry->page_order = page_order; - byte_count = 0; - page_count = 0; - - while (entry->buf_count < count) { - DRM_SPINUNLOCK(&dev->dma_lock); - drm_dma_handle_t *dmah = drm_pci_alloc(dev, size, alignment, - 0xfffffffful); - DRM_SPINLOCK(&dev->dma_lock); - if (dmah == NULL) { - /* Set count correctly so we free the proper amount. */ - entry->buf_count = count; - entry->seg_count = count; - drm_cleanup_buf_error(dev, entry); - free(temp_pagelist, DRM_MEM_PAGES); - return ENOMEM; - } - - entry->seglist[entry->seg_count++] = dmah; - for (i = 0; i < (1 << page_order); i++) { - DRM_DEBUG("page %d @ %p\n", - dma->page_count + page_count, - (char *)dmah->vaddr + PAGE_SIZE * i); - temp_pagelist[dma->page_count + page_count++] = - (long)dmah->vaddr + PAGE_SIZE * i; - } - for (offset = 0; - offset + size <= total && entry->buf_count < count; - offset += alignment, ++entry->buf_count) { - buf = &entry->buflist[entry->buf_count]; - buf->idx = dma->buf_count + entry->buf_count; - buf->total = alignment; - buf->order = order; - buf->used = 0; - buf->offset = (dma->byte_count + byte_count + offset); - buf->address = ((char *)dmah->vaddr + offset); - buf->bus_address = dmah->busaddr + offset; - buf->next = NULL; - buf->pending = 0; - buf->file_priv = NULL; - - buf->dev_priv_size = dev->driver->buf_priv_size; - buf->dev_private = malloc(buf->dev_priv_size, - DRM_MEM_BUFS, M_NOWAIT | M_ZERO); - if (buf->dev_private == NULL) { - /* Set count correctly so we free the proper amount. */ - entry->buf_count = count; - entry->seg_count = count; - drm_cleanup_buf_error(dev, entry); - free(temp_pagelist, DRM_MEM_PAGES); - return ENOMEM; - } - - DRM_DEBUG("buffer %d @ %p\n", - entry->buf_count, buf->address); - } - byte_count += PAGE_SIZE << page_order; - } - - temp_buflist = realloc(dma->buflist, - (dma->buf_count + entry->buf_count) * sizeof(*dma->buflist), - DRM_MEM_BUFS, M_NOWAIT); - if (temp_buflist == NULL) { - /* Free the entry because it isn't valid */ - drm_cleanup_buf_error(dev, entry); - free(temp_pagelist, DRM_MEM_PAGES); - return ENOMEM; - } - dma->buflist = temp_buflist; - - for (i = 0; i < entry->buf_count; i++) { - dma->buflist[i + dma->buf_count] = &entry->buflist[i]; - } - - /* No allocations failed, so now we can replace the original pagelist - * with the new one. - */ - free(dma->pagelist, DRM_MEM_PAGES); - dma->pagelist = temp_pagelist; - - dma->buf_count += entry->buf_count; - dma->seg_count += entry->seg_count; - dma->page_count += entry->seg_count << page_order; - dma->byte_count += PAGE_SIZE * (entry->seg_count << page_order); - - request->count = entry->buf_count; - request->size = size; - - return 0; - -} - -static int drm_do_addbufs_sg(struct drm_device *dev, struct drm_buf_desc *request) -{ - drm_device_dma_t *dma = dev->dma; - drm_buf_entry_t *entry; - drm_buf_t *buf; - unsigned long offset; - unsigned long agp_offset; - int count; - int order; - int size; - int alignment; - int page_order; - int total; - int byte_count; - int i; - drm_buf_t **temp_buflist; - - count = request->count; - order = drm_order(request->size); - size = 1 << order; - - alignment = (request->flags & _DRM_PAGE_ALIGN) - ? round_page(size) : size; - page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; - total = PAGE_SIZE << page_order; - - byte_count = 0; - agp_offset = request->agp_start; - - DRM_DEBUG("count: %d\n", count); - DRM_DEBUG("order: %d\n", order); - DRM_DEBUG("size: %d\n", size); - DRM_DEBUG("agp_offset: %ld\n", agp_offset); - DRM_DEBUG("alignment: %d\n", alignment); - DRM_DEBUG("page_order: %d\n", page_order); - DRM_DEBUG("total: %d\n", total); - - entry = &dma->bufs[order]; - - entry->buflist = malloc(count * sizeof(*entry->buflist), DRM_MEM_BUFS, - M_NOWAIT | M_ZERO); - if (entry->buflist == NULL) - return ENOMEM; - - entry->buf_size = size; - entry->page_order = page_order; - - offset = 0; - - while (entry->buf_count < count) { - buf = &entry->buflist[entry->buf_count]; - buf->idx = dma->buf_count + entry->buf_count; - buf->total = alignment; - buf->order = order; - buf->used = 0; - - buf->offset = (dma->byte_count + offset); - buf->bus_address = agp_offset + offset; - buf->address = (void *)(agp_offset + offset + dev->sg->vaddr); - buf->next = NULL; - buf->pending = 0; - buf->file_priv = NULL; - - buf->dev_priv_size = dev->driver->buf_priv_size; - buf->dev_private = malloc(buf->dev_priv_size, DRM_MEM_BUFS, - M_NOWAIT | M_ZERO); - if (buf->dev_private == NULL) { - /* Set count correctly so we free the proper amount. */ - entry->buf_count = count; - drm_cleanup_buf_error(dev, entry); - return ENOMEM; - } - - DRM_DEBUG("buffer %d @ %p\n", - entry->buf_count, buf->address); - - offset += alignment; - entry->buf_count++; - byte_count += PAGE_SIZE << page_order; - } - - DRM_DEBUG("byte_count: %d\n", byte_count); - - temp_buflist = realloc(dma->buflist, - (dma->buf_count + entry->buf_count) * sizeof(*dma->buflist), - DRM_MEM_BUFS, M_NOWAIT); - if (temp_buflist == NULL) { - /* Free the entry because it isn't valid */ - drm_cleanup_buf_error(dev, entry); - return ENOMEM; - } - dma->buflist = temp_buflist; - - for (i = 0; i < entry->buf_count; i++) { - dma->buflist[i + dma->buf_count] = &entry->buflist[i]; - } - - dma->buf_count += entry->buf_count; - dma->byte_count += byte_count; - - DRM_DEBUG("dma->buf_count : %d\n", dma->buf_count); - DRM_DEBUG("entry->buf_count : %d\n", entry->buf_count); - - request->count = entry->buf_count; - request->size = size; - - dma->flags = _DRM_DMA_USE_SG; - - return 0; -} - -int drm_addbufs_agp(struct drm_device *dev, struct drm_buf_desc *request) -{ - int order, ret; - - if (request->count < 0 || request->count > 4096) - return EINVAL; - - order = drm_order(request->size); - if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER) - return EINVAL; - - DRM_SPINLOCK(&dev->dma_lock); - - /* No more allocations after first buffer-using ioctl. */ - if (dev->buf_use != 0) { - DRM_SPINUNLOCK(&dev->dma_lock); - return EBUSY; - } - /* No more than one allocation per order */ - if (dev->dma->bufs[order].buf_count != 0) { - DRM_SPINUNLOCK(&dev->dma_lock); - return ENOMEM; - } - - ret = drm_do_addbufs_agp(dev, request); - - DRM_SPINUNLOCK(&dev->dma_lock); - - return ret; -} - -int drm_addbufs_sg(struct drm_device *dev, struct drm_buf_desc *request) -{ - int order, ret; - - if (!DRM_SUSER(DRM_CURPROC)) - return EACCES; - - if (request->count < 0 || request->count > 4096) - return EINVAL; - - order = drm_order(request->size); - if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER) - return EINVAL; - - DRM_SPINLOCK(&dev->dma_lock); - - /* No more allocations after first buffer-using ioctl. */ - if (dev->buf_use != 0) { - DRM_SPINUNLOCK(&dev->dma_lock); - return EBUSY; - } - /* No more than one allocation per order */ - if (dev->dma->bufs[order].buf_count != 0) { - DRM_SPINUNLOCK(&dev->dma_lock); - return ENOMEM; - } - - ret = drm_do_addbufs_sg(dev, request); - - DRM_SPINUNLOCK(&dev->dma_lock); - - return ret; -} - -int drm_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *request) -{ - int order, ret; - - if (!DRM_SUSER(DRM_CURPROC)) - return EACCES; - - if (request->count < 0 || request->count > 4096) - return EINVAL; - - order = drm_order(request->size); - if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER) - return EINVAL; - - DRM_SPINLOCK(&dev->dma_lock); - - /* No more allocations after first buffer-using ioctl. */ - if (dev->buf_use != 0) { - DRM_SPINUNLOCK(&dev->dma_lock); - return EBUSY; - } - /* No more than one allocation per order */ - if (dev->dma->bufs[order].buf_count != 0) { - DRM_SPINUNLOCK(&dev->dma_lock); - return ENOMEM; - } - - ret = drm_do_addbufs_pci(dev, request); - - DRM_SPINUNLOCK(&dev->dma_lock); - - return ret; -} - -int drm_addbufs(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_buf_desc *request = data; - int err; - - if (request->flags & _DRM_AGP_BUFFER) - err = drm_addbufs_agp(dev, request); - else if (request->flags & _DRM_SG_BUFFER) - err = drm_addbufs_sg(dev, request); - else - err = drm_addbufs_pci(dev, request); - - return err; -} - -int drm_infobufs(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_device_dma_t *dma = dev->dma; - struct drm_buf_info *request = data; - int i; - int count; - int retcode = 0; - - DRM_SPINLOCK(&dev->dma_lock); - ++dev->buf_use; /* Can't allocate more after this call */ - DRM_SPINUNLOCK(&dev->dma_lock); - - for (i = 0, count = 0; i < DRM_MAX_ORDER + 1; i++) { - if (dma->bufs[i].buf_count) - ++count; - } - - DRM_DEBUG("count = %d\n", count); - - if (request->count >= count) { - for (i = 0, count = 0; i < DRM_MAX_ORDER + 1; i++) { - if (dma->bufs[i].buf_count) { - struct drm_buf_desc from; - - memset(&from, 0, sizeof(from)); - from.count = dma->bufs[i].buf_count; - from.size = dma->bufs[i].buf_size; - from.low_mark = dma->bufs[i].freelist.low_mark; - from.high_mark = dma->bufs[i].freelist.high_mark; - - if (DRM_COPY_TO_USER(&request->list[count], &from, - sizeof(struct drm_buf_desc)) != 0) { - retcode = EFAULT; - break; - } - - DRM_DEBUG("%d %d %d %d %d\n", - i, dma->bufs[i].buf_count, - dma->bufs[i].buf_size, - dma->bufs[i].freelist.low_mark, - dma->bufs[i].freelist.high_mark); - ++count; - } - } - } - request->count = count; - - return retcode; -} - -int drm_markbufs(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_device_dma_t *dma = dev->dma; - struct drm_buf_desc *request = data; - int order; - - DRM_DEBUG("%d, %d, %d\n", - request->size, request->low_mark, request->high_mark); - - - order = drm_order(request->size); - if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER || - request->low_mark < 0 || request->high_mark < 0) { - return EINVAL; - } - - DRM_SPINLOCK(&dev->dma_lock); - if (request->low_mark > dma->bufs[order].buf_count || - request->high_mark > dma->bufs[order].buf_count) { - DRM_SPINUNLOCK(&dev->dma_lock); - return EINVAL; - } - - dma->bufs[order].freelist.low_mark = request->low_mark; - dma->bufs[order].freelist.high_mark = request->high_mark; - DRM_SPINUNLOCK(&dev->dma_lock); - - return 0; -} - -int drm_freebufs(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_device_dma_t *dma = dev->dma; - struct drm_buf_free *request = data; - int i; - int idx; - drm_buf_t *buf; - int retcode = 0; - - DRM_DEBUG("%d\n", request->count); - - DRM_SPINLOCK(&dev->dma_lock); - for (i = 0; i < request->count; i++) { - if (DRM_COPY_FROM_USER(&idx, &request->list[i], sizeof(idx))) { - retcode = EFAULT; - break; - } - if (idx < 0 || idx >= dma->buf_count) { - DRM_ERROR("Index %d (of %d max)\n", - idx, dma->buf_count - 1); - retcode = EINVAL; - break; - } - buf = dma->buflist[idx]; - if (buf->file_priv != file_priv) { - DRM_ERROR("Process %d freeing buffer not owned\n", - DRM_CURRENTPID); - retcode = EINVAL; - break; - } - drm_free_buffer(dev, buf); - } - DRM_SPINUNLOCK(&dev->dma_lock); - - return retcode; -} - -int drm_mapbufs(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_device_dma_t *dma = dev->dma; - int retcode = 0; - const int zero = 0; - vm_offset_t address; - struct vmspace *vms; - vm_ooffset_t foff; - vm_size_t size; - vm_offset_t vaddr; - struct drm_buf_map *request = data; - int i; - - vms = DRM_CURPROC->td_proc->p_vmspace; - - DRM_SPINLOCK(&dev->dma_lock); - dev->buf_use++; /* Can't allocate more after this call */ - DRM_SPINUNLOCK(&dev->dma_lock); - - if (request->count < dma->buf_count) - goto done; - - if ((drm_core_has_AGP(dev) && (dma->flags & _DRM_DMA_USE_AGP)) || - (drm_core_check_feature(dev, DRIVER_SG) && - (dma->flags & _DRM_DMA_USE_SG))) { - drm_local_map_t *map = dev->agp_buffer_map; - - if (map == NULL) { - retcode = EINVAL; - goto done; - } - size = round_page(map->size); - foff = (unsigned long)map->handle; - } else { - size = round_page(dma->byte_count), - foff = 0; - } - - vaddr = round_page((vm_offset_t)vms->vm_daddr + MAXDSIZ); - retcode = vm_mmap(&vms->vm_map, &vaddr, size, VM_PROT_READ | - VM_PROT_WRITE, VM_PROT_ALL, MAP_SHARED | MAP_NOSYNC, OBJT_DEVICE, - dev->devnode, foff); - if (retcode) - goto done; - - request->virtual = (void *)vaddr; - - for (i = 0; i < dma->buf_count; i++) { - if (DRM_COPY_TO_USER(&request->list[i].idx, - &dma->buflist[i]->idx, sizeof(request->list[0].idx))) { - retcode = EFAULT; - goto done; - } - if (DRM_COPY_TO_USER(&request->list[i].total, - &dma->buflist[i]->total, sizeof(request->list[0].total))) { - retcode = EFAULT; - goto done; - } - if (DRM_COPY_TO_USER(&request->list[i].used, &zero, - sizeof(zero))) { - retcode = EFAULT; - goto done; - } - address = vaddr + dma->buflist[i]->offset; /* *** */ - if (DRM_COPY_TO_USER(&request->list[i].address, &address, - sizeof(address))) { - retcode = EFAULT; - goto done; - } - } - - done: - request->count = dma->buf_count; - - DRM_DEBUG("%d buffers, retcode = %d\n", request->count, retcode); - - return retcode; -} - -/* - * Compute order. Can be made faster. - */ -int drm_order(unsigned long size) -{ - int order; - - if (size == 0) - return 0; - - order = flsl(size) - 1; - if (size & ~(1ul << order)) - ++order; - - return order; -} diff --git a/sys/dev/drm/drm_context.c b/sys/dev/drm/drm_context.c deleted file mode 100644 index 3c13b43f9a7c..000000000000 --- a/sys/dev/drm/drm_context.c +++ /dev/null @@ -1,312 +0,0 @@ -/*- - * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_context.c - * Implementation of the context management ioctls. - */ - -#include "dev/drm/drmP.h" - -/* ================================================================ - * Context bitmap support - */ - -void drm_ctxbitmap_free(struct drm_device *dev, int ctx_handle) -{ - if (ctx_handle < 0 || ctx_handle >= DRM_MAX_CTXBITMAP || - dev->ctx_bitmap == NULL) { - DRM_ERROR("Attempt to free invalid context handle: %d\n", - ctx_handle); - return; - } - - DRM_LOCK(); - clear_bit(ctx_handle, dev->ctx_bitmap); - dev->context_sareas[ctx_handle] = NULL; - DRM_UNLOCK(); - return; -} - -int drm_ctxbitmap_next(struct drm_device *dev) -{ - int bit; - - if (dev->ctx_bitmap == NULL) - return -1; - - DRM_LOCK(); - bit = find_first_zero_bit(dev->ctx_bitmap, DRM_MAX_CTXBITMAP); - if (bit >= DRM_MAX_CTXBITMAP) { - DRM_UNLOCK(); - return -1; - } - - set_bit(bit, dev->ctx_bitmap); - DRM_DEBUG("bit : %d\n", bit); - if ((bit+1) > dev->max_context) { - drm_local_map_t **ctx_sareas; - int max_ctx = (bit+1); - - ctx_sareas = realloc(dev->context_sareas, - max_ctx * sizeof(*dev->context_sareas), - DRM_MEM_SAREA, M_NOWAIT); - if (ctx_sareas == NULL) { - clear_bit(bit, dev->ctx_bitmap); - DRM_DEBUG("failed to allocate bit : %d\n", bit); - DRM_UNLOCK(); - return -1; - } - dev->max_context = max_ctx; - dev->context_sareas = ctx_sareas; - dev->context_sareas[bit] = NULL; - } - DRM_UNLOCK(); - return bit; -} - -int drm_ctxbitmap_init(struct drm_device *dev) -{ - int i; - int temp; - - DRM_LOCK(); - dev->ctx_bitmap = malloc(PAGE_SIZE, DRM_MEM_CTXBITMAP, - M_NOWAIT | M_ZERO); - if (dev->ctx_bitmap == NULL) { - DRM_UNLOCK(); - return ENOMEM; - } - dev->context_sareas = NULL; - dev->max_context = -1; - DRM_UNLOCK(); - - for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) { - temp = drm_ctxbitmap_next(dev); - DRM_DEBUG("drm_ctxbitmap_init : %d\n", temp); - } - - return 0; -} - -void drm_ctxbitmap_cleanup(struct drm_device *dev) -{ - DRM_LOCK(); - if (dev->context_sareas != NULL) - free(dev->context_sareas, DRM_MEM_SAREA); - free(dev->ctx_bitmap, DRM_MEM_CTXBITMAP); - DRM_UNLOCK(); -} - -/* ================================================================ - * Per Context SAREA Support - */ - -int drm_getsareactx(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_ctx_priv_map *request = data; - drm_local_map_t *map; - - DRM_LOCK(); - if (dev->max_context < 0 || - request->ctx_id >= (unsigned) dev->max_context) { - DRM_UNLOCK(); - return EINVAL; - } - - map = dev->context_sareas[request->ctx_id]; - DRM_UNLOCK(); - - request->handle = (void *)map->handle; - - return 0; -} - -int drm_setsareactx(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_ctx_priv_map *request = data; - drm_local_map_t *map = NULL; - - DRM_LOCK(); - TAILQ_FOREACH(map, &dev->maplist, link) { - if (map->handle == request->handle) { - if (dev->max_context < 0) - goto bad; - if (request->ctx_id >= (unsigned) dev->max_context) - goto bad; - dev->context_sareas[request->ctx_id] = map; - DRM_UNLOCK(); - return 0; - } - } - -bad: - DRM_UNLOCK(); - return EINVAL; -} - -/* ================================================================ - * The actual DRM context handling routines - */ - -int drm_context_switch(struct drm_device *dev, int old, int new) -{ - if (test_and_set_bit(0, &dev->context_flag)) { - DRM_ERROR("Reentering -- FIXME\n"); - return EBUSY; - } - - DRM_DEBUG("Context switch from %d to %d\n", old, new); - - if (new == dev->last_context) { - clear_bit(0, &dev->context_flag); - return 0; - } - - return 0; -} - -int drm_context_switch_complete(struct drm_device *dev, int new) -{ - dev->last_context = new; /* PRE/POST: This is the _only_ writer. */ - - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("Lock isn't held after context switch\n"); - } - - /* If a context switch is ever initiated - when the kernel holds the lock, release - that lock here. */ - clear_bit(0, &dev->context_flag); - - return 0; -} - -int drm_resctx(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_ctx_res *res = data; - struct drm_ctx ctx; - int i; - - if (res->count >= DRM_RESERVED_CONTEXTS) { - bzero(&ctx, sizeof(ctx)); - for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) { - ctx.handle = i; - if (DRM_COPY_TO_USER(&res->contexts[i], - &ctx, sizeof(ctx))) - return EFAULT; - } - } - res->count = DRM_RESERVED_CONTEXTS; - - return 0; -} - -int drm_addctx(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_ctx *ctx = data; - - ctx->handle = drm_ctxbitmap_next(dev); - if (ctx->handle == DRM_KERNEL_CONTEXT) { - /* Skip kernel's context and get a new one. */ - ctx->handle = drm_ctxbitmap_next(dev); - } - DRM_DEBUG("%d\n", ctx->handle); - if (ctx->handle == -1) { - DRM_DEBUG("Not enough free contexts.\n"); - /* Should this return -EBUSY instead? */ - return ENOMEM; - } - - if (dev->driver->context_ctor && ctx->handle != DRM_KERNEL_CONTEXT) { - DRM_LOCK(); - dev->driver->context_ctor(dev, ctx->handle); - DRM_UNLOCK(); - } - - return 0; -} - -int drm_modctx(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - /* This does nothing */ - return 0; -} - -int drm_getctx(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_ctx *ctx = data; - - /* This is 0, because we don't handle any context flags */ - ctx->flags = 0; - - return 0; -} - -int drm_switchctx(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_ctx *ctx = data; - - DRM_DEBUG("%d\n", ctx->handle); - return drm_context_switch(dev, dev->last_context, ctx->handle); -} - -int drm_newctx(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_ctx *ctx = data; - - DRM_DEBUG("%d\n", ctx->handle); - drm_context_switch_complete(dev, ctx->handle); - - return 0; -} - -int drm_rmctx(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_ctx *ctx = data; - - DRM_DEBUG("%d\n", ctx->handle); - if (ctx->handle != DRM_KERNEL_CONTEXT) { - if (dev->driver->context_dtor) { - DRM_LOCK(); - dev->driver->context_dtor(dev, ctx->handle); - DRM_UNLOCK(); - } - - drm_ctxbitmap_free(dev, ctx->handle); - } - - return 0; -} diff --git a/sys/dev/drm/drm_dma.c b/sys/dev/drm/drm_dma.c deleted file mode 100644 index f99b16b770dc..000000000000 --- a/sys/dev/drm/drm_dma.c +++ /dev/null @@ -1,139 +0,0 @@ -/*- - * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_dma.c - * Support code for DMA buffer management. - * - * The implementation used to be significantly more complicated, but the - * complexity has been moved into the drivers as different buffer management - * schemes evolved. - */ - -#include "dev/drm/drmP.h" - -int drm_dma_setup(struct drm_device *dev) -{ - - dev->dma = malloc(sizeof(*dev->dma), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); - if (dev->dma == NULL) - return ENOMEM; - - DRM_SPININIT(&dev->dma_lock, "drmdma"); - - return 0; -} - -void drm_dma_takedown(struct drm_device *dev) -{ - drm_device_dma_t *dma = dev->dma; - int i, j; - - if (dma == NULL) - return; - - /* Clear dma buffers */ - for (i = 0; i <= DRM_MAX_ORDER; i++) { - if (dma->bufs[i].seg_count) { - DRM_DEBUG("order %d: buf_count = %d," - " seg_count = %d\n", i, dma->bufs[i].buf_count, - dma->bufs[i].seg_count); - for (j = 0; j < dma->bufs[i].seg_count; j++) { - drm_pci_free(dev, dma->bufs[i].seglist[j]); - } - free(dma->bufs[i].seglist, DRM_MEM_SEGS); - } - - if (dma->bufs[i].buf_count) { - for (j = 0; j < dma->bufs[i].buf_count; j++) { - free(dma->bufs[i].buflist[j].dev_private, - DRM_MEM_BUFS); - } - free(dma->bufs[i].buflist, DRM_MEM_BUFS); - } - } - - free(dma->buflist, DRM_MEM_BUFS); - free(dma->pagelist, DRM_MEM_PAGES); - free(dev->dma, DRM_MEM_DRIVER); - dev->dma = NULL; - DRM_SPINUNINIT(&dev->dma_lock); -} - - -void drm_free_buffer(struct drm_device *dev, drm_buf_t *buf) -{ - if (!buf) - return; - - buf->pending = 0; - buf->file_priv= NULL; - buf->used = 0; -} - -void drm_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv) -{ - drm_device_dma_t *dma = dev->dma; - int i; - - if (!dma) - return; - - for (i = 0; i < dma->buf_count; i++) { - if (dma->buflist[i]->file_priv == file_priv) { - switch (dma->buflist[i]->list) { - case DRM_LIST_NONE: - drm_free_buffer(dev, dma->buflist[i]); - break; - case DRM_LIST_WAIT: - dma->buflist[i]->list = DRM_LIST_RECLAIM; - break; - default: - /* Buffer already on hardware. */ - break; - } - } - } -} - -/* Call into the driver-specific DMA handler */ -int drm_dma(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - - if (dev->driver->dma_ioctl) { - /* shared code returns -errno */ - return -dev->driver->dma_ioctl(dev, data, file_priv); - } else { - DRM_DEBUG("DMA ioctl on driver with no dma handler\n"); - return EINVAL; - } -} diff --git a/sys/dev/drm/drm_drawable.c b/sys/dev/drm/drm_drawable.c deleted file mode 100644 index 18f997628bc7..000000000000 --- a/sys/dev/drm/drm_drawable.c +++ /dev/null @@ -1,173 +0,0 @@ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_drawable.c - * This file implements ioctls to store information along with DRM drawables, - * such as the current set of cliprects for vblank-synced buffer swaps. - */ - -#include "dev/drm/drmP.h" - -struct bsd_drm_drawable_info { - struct drm_drawable_info info; - int handle; - RB_ENTRY(bsd_drm_drawable_info) tree; -}; - -static int -drm_drawable_compare(struct bsd_drm_drawable_info *a, - struct bsd_drm_drawable_info *b) -{ - if (a->handle > b->handle) - return 1; - if (a->handle < b->handle) - return -1; - return 0; -} - -RB_GENERATE_STATIC(drawable_tree, bsd_drm_drawable_info, tree, - drm_drawable_compare); - -struct drm_drawable_info * -drm_get_drawable_info(struct drm_device *dev, int handle) -{ - struct bsd_drm_drawable_info find, *result; - - find.handle = handle; - result = RB_FIND(drawable_tree, &dev->drw_head, &find); - - return &result->info; -} - -int drm_adddraw(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_draw *draw = data; - struct bsd_drm_drawable_info *info; - - info = malloc(sizeof(struct bsd_drm_drawable_info), DRM_MEM_DRAWABLE, - M_NOWAIT | M_ZERO); - if (info == NULL) - return ENOMEM; - - info->handle = alloc_unr(dev->drw_unrhdr); - DRM_SPINLOCK(&dev->drw_lock); - RB_INSERT(drawable_tree, &dev->drw_head, info); - draw->handle = info->handle; - DRM_SPINUNLOCK(&dev->drw_lock); - - DRM_DEBUG("%d\n", draw->handle); - - return 0; -} - -int drm_rmdraw(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_draw *draw = (struct drm_draw *)data; - struct drm_drawable_info *info; - - DRM_SPINLOCK(&dev->drw_lock); - info = drm_get_drawable_info(dev, draw->handle); - if (info != NULL) { - RB_REMOVE(drawable_tree, &dev->drw_head, - (struct bsd_drm_drawable_info *)info); - DRM_SPINUNLOCK(&dev->drw_lock); - free_unr(dev->drw_unrhdr, draw->handle); - free(info->rects, DRM_MEM_DRAWABLE); - free(info, DRM_MEM_DRAWABLE); - return 0; - } else { - DRM_SPINUNLOCK(&dev->drw_lock); - return EINVAL; - } -} - -int drm_update_draw(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_drawable_info *info; - struct drm_update_draw *update = (struct drm_update_draw *)data; - int ret; - - info = drm_get_drawable_info(dev, update->handle); - if (info == NULL) - return EINVAL; - - switch (update->type) { - case DRM_DRAWABLE_CLIPRECTS: - DRM_SPINLOCK(&dev->drw_lock); - if (update->num != info->num_rects) { - free(info->rects, DRM_MEM_DRAWABLE); - info->rects = NULL; - info->num_rects = 0; - } - if (update->num == 0) { - DRM_SPINUNLOCK(&dev->drw_lock); - return 0; - } - if (info->rects == NULL) { - info->rects = malloc(sizeof(*info->rects) * - update->num, DRM_MEM_DRAWABLE, M_NOWAIT); - if (info->rects == NULL) { - DRM_SPINUNLOCK(&dev->drw_lock); - return ENOMEM; - } - info->num_rects = update->num; - } - /* For some reason the pointer arg is unsigned long long. */ - ret = copyin((void *)(intptr_t)update->data, info->rects, - sizeof(*info->rects) * info->num_rects); - DRM_SPINUNLOCK(&dev->drw_lock); - return ret; - default: - return EINVAL; - } -} - -void drm_drawable_free_all(struct drm_device *dev) -{ - struct bsd_drm_drawable_info *info, *next; - - DRM_SPINLOCK(&dev->drw_lock); - for (info = RB_MIN(drawable_tree, &dev->drw_head); - info != NULL ; info = next) { - next = RB_NEXT(drawable_tree, &dev->drw_head, info); - RB_REMOVE(drawable_tree, &dev->drw_head, - (struct bsd_drm_drawable_info *)info); - DRM_SPINUNLOCK(&dev->drw_lock); - free_unr(dev->drw_unrhdr, info->handle); - free(info->info.rects, DRM_MEM_DRAWABLE); - free(info, DRM_MEM_DRAWABLE); - DRM_SPINLOCK(&dev->drw_lock); - } - DRM_SPINUNLOCK(&dev->drw_lock); -} diff --git a/sys/dev/drm/drm_drv.c b/sys/dev/drm/drm_drv.c deleted file mode 100644 index bf8065accdb0..000000000000 --- a/sys/dev/drm/drm_drv.c +++ /dev/null @@ -1,834 +0,0 @@ -/*- - * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_drv.c - * The catch-all file for DRM device support, including module setup/teardown, - * open/close, and ioctl dispatch. - */ - - -#include <sys/limits.h> -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/drm_sarea.h" - -#ifdef DRM_DEBUG_DEFAULT_ON -int drm_debug_flag = 1; -#else -int drm_debug_flag = 0; -#endif - -static int drm_load(struct drm_device *dev); -static void drm_unload(struct drm_device *dev); -static drm_pci_id_list_t *drm_find_description(int vendor, int device, - drm_pci_id_list_t *idlist); - -MODULE_VERSION(drm, 1); -MODULE_DEPEND(drm, agp, 1, 1, 1); -MODULE_DEPEND(drm, pci, 1, 1, 1); -MODULE_DEPEND(drm, mem, 1, 1, 1); - -static drm_ioctl_desc_t drm_ioctls[256] = { - DRM_IOCTL_DEF(DRM_IOCTL_VERSION, drm_version, 0), - DRM_IOCTL_DEF(DRM_IOCTL_GET_UNIQUE, drm_getunique, 0), - DRM_IOCTL_DEF(DRM_IOCTL_GET_MAGIC, drm_getmagic, 0), - DRM_IOCTL_DEF(DRM_IOCTL_IRQ_BUSID, drm_irq_by_busid, DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_GET_MAP, drm_getmap, 0), - DRM_IOCTL_DEF(DRM_IOCTL_GET_CLIENT, drm_getclient, 0), - DRM_IOCTL_DEF(DRM_IOCTL_GET_STATS, drm_getstats, 0), - DRM_IOCTL_DEF(DRM_IOCTL_SET_VERSION, drm_setversion, DRM_MASTER|DRM_ROOT_ONLY), - - DRM_IOCTL_DEF(DRM_IOCTL_SET_UNIQUE, drm_setunique, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_BLOCK, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_UNBLOCK, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_AUTH_MAGIC, drm_authmagic, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - - DRM_IOCTL_DEF(DRM_IOCTL_ADD_MAP, drm_addmap_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_RM_MAP, drm_rmmap_ioctl, DRM_AUTH), - - DRM_IOCTL_DEF(DRM_IOCTL_SET_SAREA_CTX, drm_setsareactx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_GET_SAREA_CTX, drm_getsareactx, DRM_AUTH), - - DRM_IOCTL_DEF(DRM_IOCTL_ADD_CTX, drm_addctx, DRM_AUTH|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_RM_CTX, drm_rmctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_MOD_CTX, drm_modctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_GET_CTX, drm_getctx, DRM_AUTH), - DRM_IOCTL_DEF(DRM_IOCTL_SWITCH_CTX, drm_switchctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_NEW_CTX, drm_newctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_RES_CTX, drm_resctx, DRM_AUTH), - - DRM_IOCTL_DEF(DRM_IOCTL_ADD_DRAW, drm_adddraw, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_RM_DRAW, drm_rmdraw, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - - DRM_IOCTL_DEF(DRM_IOCTL_LOCK, drm_lock, DRM_AUTH), - DRM_IOCTL_DEF(DRM_IOCTL_UNLOCK, drm_unlock, DRM_AUTH), - - DRM_IOCTL_DEF(DRM_IOCTL_FINISH, drm_noop, DRM_AUTH), - - DRM_IOCTL_DEF(DRM_IOCTL_ADD_BUFS, drm_addbufs, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_MARK_BUFS, drm_markbufs, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_INFO_BUFS, drm_infobufs, DRM_AUTH), - DRM_IOCTL_DEF(DRM_IOCTL_MAP_BUFS, drm_mapbufs, DRM_AUTH), - DRM_IOCTL_DEF(DRM_IOCTL_FREE_BUFS, drm_freebufs, DRM_AUTH), - DRM_IOCTL_DEF(DRM_IOCTL_DMA, drm_dma, DRM_AUTH), - - DRM_IOCTL_DEF(DRM_IOCTL_CONTROL, drm_control, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - - DRM_IOCTL_DEF(DRM_IOCTL_AGP_ACQUIRE, drm_agp_acquire_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_AGP_RELEASE, drm_agp_release_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_AGP_ENABLE, drm_agp_enable_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_AGP_INFO, drm_agp_info_ioctl, DRM_AUTH), - DRM_IOCTL_DEF(DRM_IOCTL_AGP_ALLOC, drm_agp_alloc_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_AGP_FREE, drm_agp_free_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_AGP_BIND, drm_agp_bind_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_AGP_UNBIND, drm_agp_unbind_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - - DRM_IOCTL_DEF(DRM_IOCTL_SG_ALLOC, drm_sg_alloc_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_SG_FREE, drm_sg_free, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_WAIT_VBLANK, drm_wait_vblank, 0), - DRM_IOCTL_DEF(DRM_IOCTL_MODESET_CTL, drm_modeset_ctl, 0), - DRM_IOCTL_DEF(DRM_IOCTL_UPDATE_DRAW, drm_update_draw, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), -}; - -static struct cdevsw drm_cdevsw = { - .d_version = D_VERSION, - .d_open = drm_open, - .d_read = drm_read, - .d_ioctl = drm_ioctl, - .d_poll = drm_poll, - .d_mmap = drm_mmap, - .d_name = "drm", - .d_flags = D_TRACKCLOSE -}; - -static int drm_msi = 1; /* Enable by default. */ -SYSCTL_NODE(_hw, OID_AUTO, drm, CTLFLAG_RW, NULL, "DRM device"); -SYSCTL_INT(_hw_drm, OID_AUTO, msi, CTLFLAG_RDTUN, &drm_msi, 1, - "Enable MSI interrupts for drm devices"); - -static struct drm_msi_blacklist_entry drm_msi_blacklist[] = { - {0x8086, 0x2772}, /* Intel i945G */ \ - {0x8086, 0x27A2}, /* Intel i945GM */ \ - {0x8086, 0x27AE}, /* Intel i945GME */ \ - {0, 0} -}; - -static int drm_msi_is_blacklisted(int vendor, int device) -{ - int i = 0; - - for (i = 0; drm_msi_blacklist[i].vendor != 0; i++) { - if ((drm_msi_blacklist[i].vendor == vendor) && - (drm_msi_blacklist[i].device == device)) { - return 1; - } - } - - return 0; -} - -int drm_probe(device_t kdev, drm_pci_id_list_t *idlist) -{ - drm_pci_id_list_t *id_entry; - int vendor, device; - vendor = pci_get_vendor(kdev); - device = pci_get_device(kdev); - - if (pci_get_class(kdev) != PCIC_DISPLAY - || pci_get_subclass(kdev) != PCIS_DISPLAY_VGA) - return ENXIO; - - id_entry = drm_find_description(vendor, device, idlist); - if (id_entry != NULL) { - if (!device_get_desc(kdev)) { - DRM_DEBUG("desc : %s\n", device_get_desc(kdev)); - device_set_desc(kdev, id_entry->name); - } - DRM_OBSOLETE(kdev); - return BUS_PROBE_GENERIC; - } - - return ENXIO; -} - -int drm_attach(device_t kdev, drm_pci_id_list_t *idlist) -{ - struct drm_device *dev; - drm_pci_id_list_t *id_entry; - int unit, msicount; - - unit = device_get_unit(kdev); - dev = device_get_softc(kdev); - - dev->device = kdev; - dev->devnode = make_dev(&drm_cdevsw, - 0, - DRM_DEV_UID, - DRM_DEV_GID, - DRM_DEV_MODE, - "dri/card%d", unit); - dev->devnode->si_drv1 = dev; - - dev->pci_domain = pci_get_domain(dev->device); - dev->pci_bus = pci_get_bus(dev->device); - dev->pci_slot = pci_get_slot(dev->device); - dev->pci_func = pci_get_function(dev->device); - - dev->pci_vendor = pci_get_vendor(dev->device); - dev->pci_device = pci_get_device(dev->device); - - if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) { - if (drm_msi && - !drm_msi_is_blacklisted(dev->pci_vendor, dev->pci_device)) { - msicount = pci_msi_count(dev->device); - DRM_DEBUG("MSI count = %d\n", msicount); - if (msicount > 1) - msicount = 1; - - if (pci_alloc_msi(dev->device, &msicount) == 0) { - DRM_INFO("MSI enabled %d message(s)\n", - msicount); - dev->msi_enabled = 1; - dev->irqrid = 1; - } - } - - dev->irqr = bus_alloc_resource_any(dev->device, SYS_RES_IRQ, - &dev->irqrid, RF_SHAREABLE); - if (!dev->irqr) { - return ENOENT; - } - - dev->irq = (int) rman_get_start(dev->irqr); - } - - mtx_init(&dev->dev_lock, "drmdev", NULL, MTX_DEF); - mtx_init(&dev->irq_lock, "drmirq", NULL, MTX_DEF); - mtx_init(&dev->vbl_lock, "drmvbl", NULL, MTX_DEF); - mtx_init(&dev->drw_lock, "drmdrw", NULL, MTX_DEF); - - id_entry = drm_find_description(dev->pci_vendor, - dev->pci_device, idlist); - dev->id_entry = id_entry; - - return drm_load(dev); -} - -int drm_detach(device_t kdev) -{ - struct drm_device *dev; - - dev = device_get_softc(kdev); - - drm_unload(dev); - - if (dev->irqr) { - bus_release_resource(dev->device, SYS_RES_IRQ, dev->irqrid, - dev->irqr); - - if (dev->msi_enabled) { - pci_release_msi(dev->device); - DRM_INFO("MSI released\n"); - } - } - - return 0; -} - -#ifndef DRM_DEV_NAME -#define DRM_DEV_NAME "drm" -#endif - -devclass_t drm_devclass; - -drm_pci_id_list_t *drm_find_description(int vendor, int device, - drm_pci_id_list_t *idlist) -{ - int i = 0; - - for (i = 0; idlist[i].vendor != 0; i++) { - if ((idlist[i].vendor == vendor) && - ((idlist[i].device == device) || - (idlist[i].device == 0))) { - return &idlist[i]; - } - } - return NULL; -} - -static int drm_firstopen(struct drm_device *dev) -{ - drm_local_map_t *map; - int i; - - DRM_SPINLOCK_ASSERT(&dev->dev_lock); - - /* prebuild the SAREA */ - i = drm_addmap(dev, 0, SAREA_MAX, _DRM_SHM, - _DRM_CONTAINS_LOCK, &map); - if (i != 0) - return i; - - if (dev->driver->firstopen) - dev->driver->firstopen(dev); - - dev->buf_use = 0; - - if (drm_core_check_feature(dev, DRIVER_HAVE_DMA)) { - i = drm_dma_setup(dev); - if (i != 0) - return i; - } - - for (i = 0; i < DRM_HASH_SIZE; i++) { - dev->magiclist[i].head = NULL; - dev->magiclist[i].tail = NULL; - } - - dev->lock.lock_queue = 0; - dev->irq_enabled = 0; - dev->context_flag = 0; - dev->last_context = 0; - dev->if_version = 0; - - dev->buf_sigio = NULL; - - DRM_DEBUG("\n"); - - return 0; -} - -static int drm_lastclose(struct drm_device *dev) -{ - drm_magic_entry_t *pt, *next; - drm_local_map_t *map, *mapsave; - int i; - - DRM_SPINLOCK_ASSERT(&dev->dev_lock); - - DRM_DEBUG("\n"); - - if (dev->driver->lastclose != NULL) - dev->driver->lastclose(dev); - - if (dev->irq_enabled) - drm_irq_uninstall(dev); - - if (dev->unique) { - free(dev->unique, DRM_MEM_DRIVER); - dev->unique = NULL; - dev->unique_len = 0; - } - /* Clear pid list */ - for (i = 0; i < DRM_HASH_SIZE; i++) { - for (pt = dev->magiclist[i].head; pt; pt = next) { - next = pt->next; - free(pt, DRM_MEM_MAGIC); - } - dev->magiclist[i].head = dev->magiclist[i].tail = NULL; - } - - DRM_UNLOCK(); - drm_drawable_free_all(dev); - DRM_LOCK(); - - /* Clear AGP information */ - if (dev->agp) { - drm_agp_mem_t *entry; - drm_agp_mem_t *nexte; - - /* Remove AGP resources, but leave dev->agp intact until - * drm_unload is called. - */ - for (entry = dev->agp->memory; entry; entry = nexte) { - nexte = entry->next; - if (entry->bound) - drm_agp_unbind_memory(entry->handle); - drm_agp_free_memory(entry->handle); - free(entry, DRM_MEM_AGPLISTS); - } - dev->agp->memory = NULL; - - if (dev->agp->acquired) - drm_agp_release(dev); - - dev->agp->acquired = 0; - dev->agp->enabled = 0; - } - if (dev->sg != NULL) { - drm_sg_cleanup(dev->sg); - dev->sg = NULL; - } - - TAILQ_FOREACH_SAFE(map, &dev->maplist, link, mapsave) { - if (!(map->flags & _DRM_DRIVER)) - drm_rmmap(dev, map); - } - - drm_dma_takedown(dev); - if (dev->lock.hw_lock) { - dev->lock.hw_lock = NULL; /* SHM removed */ - dev->lock.file_priv = NULL; - DRM_WAKEUP_INT((void *)&dev->lock.lock_queue); - } - - return 0; -} - -static int drm_load(struct drm_device *dev) -{ - int i, retcode; - - DRM_DEBUG("\n"); - - TAILQ_INIT(&dev->maplist); - dev->map_unrhdr = new_unrhdr(1, ((1 << DRM_MAP_HANDLE_BITS) - 1), NULL); - if (dev->map_unrhdr == NULL) { - DRM_ERROR("Couldn't allocate map number allocator\n"); - return EINVAL; - } - - - drm_mem_init(); - drm_sysctl_init(dev); - TAILQ_INIT(&dev->files); - - dev->counters = 6; - dev->types[0] = _DRM_STAT_LOCK; - dev->types[1] = _DRM_STAT_OPENS; - dev->types[2] = _DRM_STAT_CLOSES; - dev->types[3] = _DRM_STAT_IOCTLS; - dev->types[4] = _DRM_STAT_LOCKS; - dev->types[5] = _DRM_STAT_UNLOCKS; - - for (i = 0; i < DRM_ARRAY_SIZE(dev->counts); i++) - atomic_set(&dev->counts[i], 0); - - if (dev->driver->load != NULL) { - DRM_LOCK(); - /* Shared code returns -errno. */ - retcode = -dev->driver->load(dev, - dev->id_entry->driver_private); - if (pci_enable_busmaster(dev->device)) - DRM_ERROR("Request to enable bus-master failed.\n"); - DRM_UNLOCK(); - if (retcode != 0) - goto error; - } - - if (drm_core_has_AGP(dev)) { - if (drm_device_is_agp(dev)) - dev->agp = drm_agp_init(); - if (drm_core_check_feature(dev, DRIVER_REQUIRE_AGP) && - dev->agp == NULL) { - DRM_ERROR("Card isn't AGP, or couldn't initialize " - "AGP.\n"); - retcode = ENOMEM; - goto error; - } - if (dev->agp != NULL && dev->agp->info.ai_aperture_base != 0) { - if (drm_mtrr_add(dev->agp->info.ai_aperture_base, - dev->agp->info.ai_aperture_size, DRM_MTRR_WC) == 0) - dev->agp->mtrr = 1; - } - } - - retcode = drm_ctxbitmap_init(dev); - if (retcode != 0) { - DRM_ERROR("Cannot allocate memory for context bitmap.\n"); - goto error; - } - - dev->drw_unrhdr = new_unrhdr(1, INT_MAX, NULL); - if (dev->drw_unrhdr == NULL) { - DRM_ERROR("Couldn't allocate drawable number allocator\n"); - goto error; - } - - DRM_INFO("Initialized %s %d.%d.%d %s\n", - dev->driver->name, - dev->driver->major, - dev->driver->minor, - dev->driver->patchlevel, - dev->driver->date); - - return 0; - -error: - drm_sysctl_cleanup(dev); - DRM_LOCK(); - drm_lastclose(dev); - DRM_UNLOCK(); - destroy_dev(dev->devnode); - - mtx_destroy(&dev->drw_lock); - mtx_destroy(&dev->vbl_lock); - mtx_destroy(&dev->irq_lock); - mtx_destroy(&dev->dev_lock); - - return retcode; -} - -static void drm_unload(struct drm_device *dev) -{ - int i; - - DRM_DEBUG("\n"); - - drm_sysctl_cleanup(dev); - destroy_dev(dev->devnode); - - drm_ctxbitmap_cleanup(dev); - - if (dev->agp && dev->agp->mtrr) { - int __unused retcode; - - retcode = drm_mtrr_del(0, dev->agp->info.ai_aperture_base, - dev->agp->info.ai_aperture_size, DRM_MTRR_WC); - DRM_DEBUG("mtrr_del = %d", retcode); - } - - drm_vblank_cleanup(dev); - - DRM_LOCK(); - drm_lastclose(dev); - DRM_UNLOCK(); - - /* Clean up PCI resources allocated by drm_bufs.c. We're not really - * worried about resource consumption while the DRM is inactive (between - * lastclose and firstopen or unload) because these aren't actually - * taking up KVA, just keeping the PCI resource allocated. - */ - for (i = 0; i < DRM_MAX_PCI_RESOURCE; i++) { - if (dev->pcir[i] == NULL) - continue; - bus_release_resource(dev->device, SYS_RES_MEMORY, - dev->pcirid[i], dev->pcir[i]); - dev->pcir[i] = NULL; - } - - if (dev->agp) { - free(dev->agp, DRM_MEM_AGPLISTS); - dev->agp = NULL; - } - - if (dev->driver->unload != NULL) { - DRM_LOCK(); - dev->driver->unload(dev); - DRM_UNLOCK(); - } - - delete_unrhdr(dev->drw_unrhdr); - delete_unrhdr(dev->map_unrhdr); - - drm_mem_uninit(); - - if (pci_disable_busmaster(dev->device)) - DRM_ERROR("Request to disable bus-master failed.\n"); - - mtx_destroy(&dev->drw_lock); - mtx_destroy(&dev->vbl_lock); - mtx_destroy(&dev->irq_lock); - mtx_destroy(&dev->dev_lock); -} - -int drm_version(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_version *version = data; - int len; - -#define DRM_COPY( name, value ) \ - len = strlen( value ); \ - if ( len > name##_len ) len = name##_len; \ - name##_len = strlen( value ); \ - if ( len && name ) { \ - if ( DRM_COPY_TO_USER( name, value, len ) ) \ - return EFAULT; \ - } - - version->version_major = dev->driver->major; - version->version_minor = dev->driver->minor; - version->version_patchlevel = dev->driver->patchlevel; - - DRM_COPY(version->name, dev->driver->name); - DRM_COPY(version->date, dev->driver->date); - DRM_COPY(version->desc, dev->driver->desc); - - return 0; -} - -int drm_open(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p) -{ - struct drm_device *dev = NULL; - int retcode = 0; - - dev = kdev->si_drv1; - - DRM_DEBUG("open_count = %d\n", dev->open_count); - - retcode = drm_open_helper(kdev, flags, fmt, p, dev); - - if (!retcode) { - atomic_inc(&dev->counts[_DRM_STAT_OPENS]); - DRM_LOCK(); - device_busy(dev->device); - if (!dev->open_count++) - retcode = drm_firstopen(dev); - DRM_UNLOCK(); - } - - return retcode; -} - -void drm_close(void *data) -{ - struct drm_file *file_priv = data; - struct drm_device *dev = file_priv->dev; - int retcode = 0; - - DRM_DEBUG("open_count = %d\n", dev->open_count); - - DRM_LOCK(); - - if (dev->driver->preclose != NULL) - dev->driver->preclose(dev, file_priv); - - /* ======================================================== - * Begin inline drm_release - */ - - DRM_DEBUG("pid = %d, device = 0x%lx, open_count = %d\n", - DRM_CURRENTPID, (long)dev->device, dev->open_count); - - if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) - && dev->lock.file_priv == file_priv) { - DRM_DEBUG("Process %d dead, freeing lock for context %d\n", - DRM_CURRENTPID, - _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)); - if (dev->driver->reclaim_buffers_locked != NULL) - dev->driver->reclaim_buffers_locked(dev, file_priv); - - drm_lock_free(&dev->lock, - _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)); - - /* FIXME: may require heavy-handed reset of - hardware at this point, possibly - processed via a callback to the X - server. */ - } else if (dev->driver->reclaim_buffers_locked != NULL && - dev->lock.hw_lock != NULL) { - /* The lock is required to reclaim buffers */ - for (;;) { - if (!dev->lock.hw_lock) { - /* Device has been unregistered */ - retcode = EINTR; - break; - } - if (drm_lock_take(&dev->lock, DRM_KERNEL_CONTEXT)) { - dev->lock.file_priv = file_priv; - dev->lock.lock_time = jiffies; - atomic_inc(&dev->counts[_DRM_STAT_LOCKS]); - break; /* Got lock */ - } - /* Contention */ - retcode = mtx_sleep((void *)&dev->lock.lock_queue, - &dev->dev_lock, PCATCH, "drmlk2", 0); - if (retcode) - break; - } - if (retcode == 0) { - dev->driver->reclaim_buffers_locked(dev, file_priv); - drm_lock_free(&dev->lock, DRM_KERNEL_CONTEXT); - } - } - - if (drm_core_check_feature(dev, DRIVER_HAVE_DMA) && - !dev->driver->reclaim_buffers_locked) - drm_reclaim_buffers(dev, file_priv); - - funsetown(&dev->buf_sigio); - - if (dev->driver->postclose != NULL) - dev->driver->postclose(dev, file_priv); - TAILQ_REMOVE(&dev->files, file_priv, link); - free(file_priv, DRM_MEM_FILES); - - /* ======================================================== - * End inline drm_release - */ - - atomic_inc(&dev->counts[_DRM_STAT_CLOSES]); - device_unbusy(dev->device); - if (--dev->open_count == 0) { - retcode = drm_lastclose(dev); - } - - DRM_UNLOCK(); -} - -/* drm_ioctl is called whenever a process performs an ioctl on /dev/drm. - */ -int drm_ioctl(struct cdev *kdev, u_long cmd, caddr_t data, int flags, - DRM_STRUCTPROC *p) -{ - struct drm_device *dev = drm_get_device_from_kdev(kdev); - int retcode = 0; - drm_ioctl_desc_t *ioctl; - int (*func)(struct drm_device *dev, void *data, struct drm_file *file_priv); - int nr = DRM_IOCTL_NR(cmd); - int is_driver_ioctl = 0; - struct drm_file *file_priv; - - retcode = devfs_get_cdevpriv((void **)&file_priv); - if (retcode != 0) { - DRM_ERROR("can't find authenticator\n"); - return EINVAL; - } - - atomic_inc(&dev->counts[_DRM_STAT_IOCTLS]); - ++file_priv->ioctl_count; - - DRM_DEBUG("pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n", - DRM_CURRENTPID, cmd, nr, (long)dev->device, - file_priv->authenticated); - - switch (cmd) { - case FIONBIO: - case FIOASYNC: - return 0; - - case FIOSETOWN: - return fsetown(*(int *)data, &dev->buf_sigio); - - case FIOGETOWN: - *(int *) data = fgetown(&dev->buf_sigio); - return 0; - } - - if (IOCGROUP(cmd) != DRM_IOCTL_BASE) { - DRM_DEBUG("Bad ioctl group 0x%x\n", (int)IOCGROUP(cmd)); - return EINVAL; - } - - ioctl = &drm_ioctls[nr]; - /* It's not a core DRM ioctl, try driver-specific. */ - if (ioctl->func == NULL && nr >= DRM_COMMAND_BASE) { - /* The array entries begin at DRM_COMMAND_BASE ioctl nr */ - nr -= DRM_COMMAND_BASE; - if (nr >= dev->driver->max_ioctl) { - DRM_DEBUG("Bad driver ioctl number, 0x%x (of 0x%x)\n", - nr, dev->driver->max_ioctl); - return EINVAL; - } - ioctl = &dev->driver->ioctls[nr]; - is_driver_ioctl = 1; - } - func = ioctl->func; - - if (func == NULL) { - DRM_DEBUG("no function\n"); - return EINVAL; - } - - if (((ioctl->flags & DRM_ROOT_ONLY) && !DRM_SUSER(p)) || - ((ioctl->flags & DRM_AUTH) && !file_priv->authenticated) || - ((ioctl->flags & DRM_MASTER) && !file_priv->master)) - return EACCES; - - if (is_driver_ioctl) { - DRM_LOCK(); - /* shared code returns -errno */ - retcode = -func(dev, data, file_priv); - DRM_UNLOCK(); - } else { - retcode = func(dev, data, file_priv); - } - - if (retcode != 0) - DRM_DEBUG(" returning %d\n", retcode); - - return retcode; -} - -drm_local_map_t *drm_getsarea(struct drm_device *dev) -{ - drm_local_map_t *map; - - DRM_SPINLOCK_ASSERT(&dev->dev_lock); - TAILQ_FOREACH(map, &dev->maplist, link) { - if (map->type == _DRM_SHM && (map->flags & _DRM_CONTAINS_LOCK)) - return map; - } - - return NULL; -} - -#if DRM_LINUX - -#include <sys/sysproto.h> - -MODULE_DEPEND(DRIVER_NAME, linux, 1, 1, 1); - -#define LINUX_IOCTL_DRM_MIN 0x6400 -#define LINUX_IOCTL_DRM_MAX 0x64ff - -static linux_ioctl_function_t drm_linux_ioctl; -static struct linux_ioctl_handler drm_handler = {drm_linux_ioctl, - LINUX_IOCTL_DRM_MIN, LINUX_IOCTL_DRM_MAX}; - -SYSINIT(drm_register, SI_SUB_KLD, SI_ORDER_MIDDLE, - linux_ioctl_register_handler, &drm_handler); -SYSUNINIT(drm_unregister, SI_SUB_KLD, SI_ORDER_MIDDLE, - linux_ioctl_unregister_handler, &drm_handler); - -/* The bits for in/out are switched on Linux */ -#define LINUX_IOC_IN IOC_OUT -#define LINUX_IOC_OUT IOC_IN - -static int -drm_linux_ioctl(DRM_STRUCTPROC *p, struct linux_ioctl_args* args) -{ - int error; - int cmd = args->cmd; - - args->cmd &= ~(LINUX_IOC_IN | LINUX_IOC_OUT); - if (cmd & LINUX_IOC_IN) - args->cmd |= IOC_IN; - if (cmd & LINUX_IOC_OUT) - args->cmd |= IOC_OUT; - - error = ioctl(p, (struct ioctl_args *)args); - - return error; -} -#endif /* DRM_LINUX */ diff --git a/sys/dev/drm/drm_fops.c b/sys/dev/drm/drm_fops.c deleted file mode 100644 index 814958e1f87d..000000000000 --- a/sys/dev/drm/drm_fops.c +++ /dev/null @@ -1,105 +0,0 @@ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Daryll Strauss <daryll@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_fops.c - * Support code for dealing with the file privates associated with each - * open of the DRM device. - */ - -#include "dev/drm/drmP.h" - -/* drm_open_helper is called whenever a process opens /dev/drm. */ -int drm_open_helper(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p, - struct drm_device *dev) -{ - struct drm_file *priv; - int retcode; - - if (flags & O_EXCL) - return EBUSY; /* No exclusive opens */ - dev->flags = flags; - - DRM_DEBUG("pid = %d, device = %s\n", DRM_CURRENTPID, devtoname(kdev)); - - priv = malloc(sizeof(*priv), DRM_MEM_FILES, M_NOWAIT | M_ZERO); - if (priv == NULL) { - return ENOMEM; - } - - DRM_LOCK(); - priv->dev = dev; - priv->uid = p->td_ucred->cr_svuid; - priv->pid = p->td_proc->p_pid; - priv->ioctl_count = 0; - - /* for compatibility root is always authenticated */ - priv->authenticated = DRM_SUSER(p); - - if (dev->driver->open) { - /* shared code returns -errno */ - retcode = -dev->driver->open(dev, priv); - if (retcode != 0) { - free(priv, DRM_MEM_FILES); - DRM_UNLOCK(); - return retcode; - } - } - - /* first opener automatically becomes master */ - priv->master = TAILQ_EMPTY(&dev->files); - - TAILQ_INSERT_TAIL(&dev->files, priv, link); - DRM_UNLOCK(); - kdev->si_drv1 = dev; - - retcode = devfs_set_cdevpriv(priv, drm_close); - if (retcode != 0) - drm_close(priv); - - return (retcode); -} - - -/* The drm_read and drm_poll are stubs to prevent spurious errors - * on older X Servers (4.3.0 and earlier) */ - -int drm_read(struct cdev *kdev, struct uio *uio, int ioflag) -{ - return 0; -} - -int drm_poll(struct cdev *kdev, int events, DRM_STRUCTPROC *p) -{ - return 0; -} diff --git a/sys/dev/drm/drm_hashtab.c b/sys/dev/drm/drm_hashtab.c deleted file mode 100644 index 360c02bfada5..000000000000 --- a/sys/dev/drm/drm_hashtab.c +++ /dev/null @@ -1,181 +0,0 @@ -/************************************************************************** - * - * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND. USA. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * - **************************************************************************/ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Simple open hash tab implementation. - * - * Authors: - * Thomas Hellström <thomas-at-tungstengraphics-dot-com> - */ - -#include "dev/drm/drmP.h" -#include "dev/drm/drm_hashtab.h" - -#include <sys/hash.h> - -int drm_ht_create(struct drm_open_hash *ht, unsigned int order) -{ - ht->size = 1 << order; - ht->order = order; - ht->table = NULL; - ht->table = hashinit_flags(ht->size, DRM_MEM_HASHTAB, &ht->mask, - HASH_NOWAIT); - if (!ht->table) { - DRM_ERROR("Out of memory for hash table\n"); - return -ENOMEM; - } - return 0; -} - -void drm_ht_verbose_list(struct drm_open_hash *ht, unsigned long key) -{ - struct drm_hash_item *entry; - struct drm_hash_item_list *h_list; - unsigned int hashed_key; - int count = 0; - - hashed_key = hash32_buf(&key, sizeof(key), ht->order); - DRM_DEBUG("Key is 0x%08lx, Hashed key is 0x%08x\n", key, hashed_key); - h_list = &ht->table[hashed_key & ht->mask]; - LIST_FOREACH(entry, h_list, head) - DRM_DEBUG("count %d, key: 0x%08lx\n", count++, entry->key); -} - -static struct drm_hash_item * -drm_ht_find_key(struct drm_open_hash *ht, unsigned long key) -{ - struct drm_hash_item *entry; - struct drm_hash_item_list *h_list; - unsigned int hashed_key; - - hashed_key = hash32_buf(&key, sizeof(key), ht->order); - h_list = &ht->table[hashed_key & ht->mask]; - LIST_FOREACH(entry, h_list, head) { - if (entry->key == key) - return entry; - if (entry->key > key) - break; - } - return NULL; -} - - -int drm_ht_insert_item(struct drm_open_hash *ht, struct drm_hash_item *item) -{ - struct drm_hash_item *entry, *parent; - struct drm_hash_item_list *h_list; - unsigned int hashed_key; - unsigned long key = item->key; - - hashed_key = hash32_buf(&key, sizeof(key), ht->order); - h_list = &ht->table[hashed_key & ht->mask]; - parent = NULL; - LIST_FOREACH(entry, h_list, head) { - if (entry->key == key) - return -EINVAL; - if (entry->key > key) - break; - parent = entry; - } - if (parent) { - LIST_INSERT_AFTER(parent, item, head); - } else { - LIST_INSERT_HEAD(h_list, item, head); - } - return 0; -} - -/* - * Just insert an item and return any "bits" bit key that hasn't been - * used before. - */ -int drm_ht_just_insert_please(struct drm_open_hash *ht, struct drm_hash_item *item, - unsigned long seed, int bits, int shift, - unsigned long add) -{ - int ret; - unsigned long mask = (1 << bits) - 1; - unsigned long first, unshifted_key = 0; - - unshifted_key = hash32_buf(&seed, sizeof(seed), unshifted_key); - first = unshifted_key; - do { - item->key = (unshifted_key << shift) + add; - ret = drm_ht_insert_item(ht, item); - if (ret) - unshifted_key = (unshifted_key + 1) & mask; - } while(ret && (unshifted_key != first)); - - if (ret) { - DRM_ERROR("Available key bit space exhausted\n"); - return -EINVAL; - } - return 0; -} - -int drm_ht_find_item(struct drm_open_hash *ht, unsigned long key, - struct drm_hash_item **item) -{ - struct drm_hash_item *entry; - - entry = drm_ht_find_key(ht, key); - if (!entry) - return -EINVAL; - - *item = entry; - return 0; -} - -int drm_ht_remove_key(struct drm_open_hash *ht, unsigned long key) -{ - struct drm_hash_item *entry; - - entry = drm_ht_find_key(ht, key); - if (entry) { - LIST_REMOVE(entry, head); - return 0; - } - return -EINVAL; -} - -int drm_ht_remove_item(struct drm_open_hash *ht, struct drm_hash_item *item) -{ - LIST_REMOVE(item, head); - return 0; -} - -void drm_ht_remove(struct drm_open_hash *ht) -{ - if (ht->table) { - hashdestroy(ht->table, DRM_MEM_HASHTAB, ht->mask); - ht->table = NULL; - } -} diff --git a/sys/dev/drm/drm_hashtab.h b/sys/dev/drm/drm_hashtab.h deleted file mode 100644 index 967022d7e623..000000000000 --- a/sys/dev/drm/drm_hashtab.h +++ /dev/null @@ -1,68 +0,0 @@ -/************************************************************************** - * - * Copyright 2006 Tungsten Graphics, Inc., Bismack, ND. USA. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * - **************************************************************************/ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Simple open hash tab implementation. - * - * Authors: - * Thomas Hellström <thomas-at-tungstengraphics-dot-com> - */ - -#ifndef DRM_HASHTAB_H -#define DRM_HASHTAB_H - -#define drm_hash_entry(_ptr, _type, _member) container_of(_ptr, _type, _member) - -struct drm_hash_item { - LIST_ENTRY(drm_hash_item) head; - unsigned long key; -}; - -struct drm_open_hash { - LIST_HEAD(drm_hash_item_list, drm_hash_item) *table; - unsigned int size; - unsigned int order; - unsigned long mask; -}; - -extern int drm_ht_create(struct drm_open_hash *ht, unsigned int order); -extern int drm_ht_insert_item(struct drm_open_hash *ht, struct drm_hash_item *item); -extern int drm_ht_just_insert_please(struct drm_open_hash *ht, struct drm_hash_item *item, - unsigned long seed, int bits, int shift, - unsigned long add); -extern int drm_ht_find_item(struct drm_open_hash *ht, unsigned long key, struct drm_hash_item **item); - -extern void drm_ht_verbose_list(struct drm_open_hash *ht, unsigned long key); -extern int drm_ht_remove_key(struct drm_open_hash *ht, unsigned long key); -extern int drm_ht_remove_item(struct drm_open_hash *ht, struct drm_hash_item *item); -extern void drm_ht_remove(struct drm_open_hash *ht); - -#endif diff --git a/sys/dev/drm/drm_internal.h b/sys/dev/drm/drm_internal.h deleted file mode 100644 index 0ed1b6f78ee7..000000000000 --- a/sys/dev/drm/drm_internal.h +++ /dev/null @@ -1,43 +0,0 @@ -/*- - * Copyright 2007 Red Hat, Inc - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* This header file holds function prototypes and data types that are - * internal to the drm (not exported to user space) but shared across - * drivers and platforms */ - -#ifndef __DRM_INTERNAL_H__ -#define __DRM_INTERNAL_H__ - -/** - * Drawable information. - */ -struct drm_drawable_info { - unsigned int num_rects; - struct drm_clip_rect *rects; -}; - -#endif diff --git a/sys/dev/drm/drm_ioctl.c b/sys/dev/drm/drm_ioctl.c deleted file mode 100644 index 357d29fd161f..000000000000 --- a/sys/dev/drm/drm_ioctl.c +++ /dev/null @@ -1,286 +0,0 @@ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_ioctl.c - * Varios minor DRM ioctls not applicable to other files, such as versioning - * information and reporting DRM information to userland. - */ - -#include "dev/drm/drmP.h" - -/* - * Beginning in revision 1.1 of the DRM interface, getunique will return - * a unique in the form pci:oooo:bb:dd.f (o=domain, b=bus, d=device, f=function) - * before setunique has been called. The format for the bus-specific part of - * the unique is not defined for any other bus. - */ -int drm_getunique(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_unique *u = data; - - if (u->unique_len >= dev->unique_len) { - if (DRM_COPY_TO_USER(u->unique, dev->unique, dev->unique_len)) - return EFAULT; - } - u->unique_len = dev->unique_len; - - return 0; -} - -/* Deprecated in DRM version 1.1, and will return EBUSY when setversion has - * requested version 1.1 or greater. - */ -int drm_setunique(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_unique *u = data; - int domain, bus, slot, func, ret; - char *busid; - - /* Check and copy in the submitted Bus ID */ - if (!u->unique_len || u->unique_len > 1024) - return EINVAL; - - busid = malloc(u->unique_len + 1, DRM_MEM_DRIVER, M_WAITOK); - if (busid == NULL) - return ENOMEM; - - if (DRM_COPY_FROM_USER(busid, u->unique, u->unique_len)) { - free(busid, DRM_MEM_DRIVER); - return EFAULT; - } - busid[u->unique_len] = '\0'; - - /* Return error if the busid submitted doesn't match the device's actual - * busid. - */ - ret = sscanf(busid, "PCI:%d:%d:%d", &bus, &slot, &func); - if (ret != 3) { - free(busid, DRM_MEM_DRIVER); - return EINVAL; - } - domain = bus >> 8; - bus &= 0xff; - - if ((domain != dev->pci_domain) || - (bus != dev->pci_bus) || - (slot != dev->pci_slot) || - (func != dev->pci_func)) { - free(busid, DRM_MEM_DRIVER); - return EINVAL; - } - - /* Actually set the device's busid now. */ - DRM_LOCK(); - if (dev->unique_len || dev->unique) { - DRM_UNLOCK(); - free(busid, DRM_MEM_DRIVER); - return EBUSY; - } - - dev->unique_len = u->unique_len; - dev->unique = busid; - DRM_UNLOCK(); - - return 0; -} - - -static int -drm_set_busid(struct drm_device *dev) -{ - - DRM_LOCK(); - - if (dev->unique != NULL) { - DRM_UNLOCK(); - return EBUSY; - } - - dev->unique_len = 20; - dev->unique = malloc(dev->unique_len + 1, DRM_MEM_DRIVER, M_NOWAIT); - if (dev->unique == NULL) { - DRM_UNLOCK(); - return ENOMEM; - } - - snprintf(dev->unique, dev->unique_len, "pci:%04x:%02x:%02x.%1x", - dev->pci_domain, dev->pci_bus, dev->pci_slot, dev->pci_func); - - DRM_UNLOCK(); - - return 0; -} - -int drm_getmap(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_map *map = data; - drm_local_map_t *mapinlist; - int idx; - int i = 0; - - idx = map->offset; - - DRM_LOCK(); - if (idx < 0) { - DRM_UNLOCK(); - return EINVAL; - } - - TAILQ_FOREACH(mapinlist, &dev->maplist, link) { - if (i == idx) { - map->offset = mapinlist->offset; - map->size = mapinlist->size; - map->type = mapinlist->type; - map->flags = mapinlist->flags; - map->handle = mapinlist->handle; - map->mtrr = mapinlist->mtrr; - break; - } - i++; - } - - DRM_UNLOCK(); - - if (mapinlist == NULL) - return EINVAL; - - return 0; -} - -int drm_getclient(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_client *client = data; - struct drm_file *pt; - int idx; - int i = 0; - - idx = client->idx; - DRM_LOCK(); - TAILQ_FOREACH(pt, &dev->files, link) { - if (i == idx) { - client->auth = pt->authenticated; - client->pid = pt->pid; - client->uid = pt->uid; - client->magic = pt->magic; - client->iocs = pt->ioctl_count; - DRM_UNLOCK(); - return 0; - } - i++; - } - DRM_UNLOCK(); - - return EINVAL; -} - -int drm_getstats(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_stats *stats = data; - int i; - - memset(stats, 0, sizeof(struct drm_stats)); - - DRM_LOCK(); - - for (i = 0; i < dev->counters; i++) { - if (dev->types[i] == _DRM_STAT_LOCK) - stats->data[i].value = - (dev->lock.hw_lock ? dev->lock.hw_lock->lock : 0); - else - stats->data[i].value = atomic_read(&dev->counts[i]); - stats->data[i].type = dev->types[i]; - } - - stats->count = dev->counters; - - DRM_UNLOCK(); - - return 0; -} - -#define DRM_IF_MAJOR 1 -#define DRM_IF_MINOR 2 - -int drm_setversion(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_set_version *sv = data; - struct drm_set_version ver; - int if_version; - - /* Save the incoming data, and set the response before continuing - * any further. - */ - ver = *sv; - sv->drm_di_major = DRM_IF_MAJOR; - sv->drm_di_minor = DRM_IF_MINOR; - sv->drm_dd_major = dev->driver->major; - sv->drm_dd_minor = dev->driver->minor; - - if (ver.drm_di_major != -1) { - if (ver.drm_di_major != DRM_IF_MAJOR || - ver.drm_di_minor < 0 || ver.drm_di_minor > DRM_IF_MINOR) { - return EINVAL; - } - if_version = DRM_IF_VERSION(ver.drm_di_major, - ver.drm_dd_minor); - dev->if_version = DRM_MAX(if_version, dev->if_version); - if (ver.drm_di_minor >= 1) { - /* - * Version 1.1 includes tying of DRM to specific device - */ - drm_set_busid(dev); - } - } - - if (ver.drm_dd_major != -1) { - if (ver.drm_dd_major != dev->driver->major || - ver.drm_dd_minor < 0 || - ver.drm_dd_minor > dev->driver->minor) - { - return EINVAL; - } - } - - return 0; -} - - -int drm_noop(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - DRM_DEBUG("\n"); - return 0; -} diff --git a/sys/dev/drm/drm_irq.c b/sys/dev/drm/drm_irq.c deleted file mode 100644 index afe296338152..000000000000 --- a/sys/dev/drm/drm_irq.c +++ /dev/null @@ -1,491 +0,0 @@ -/*- - * Copyright 2003 Eric Anholt - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <anholt@FreeBSD.org> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_irq.c - * Support code for handling setup/teardown of interrupt handlers and - * handing interrupt handlers off to the drivers. - */ - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" - -int drm_irq_by_busid(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_irq_busid *irq = data; - - if ((irq->busnum >> 8) != dev->pci_domain || - (irq->busnum & 0xff) != dev->pci_bus || - irq->devnum != dev->pci_slot || - irq->funcnum != dev->pci_func) - return EINVAL; - - irq->irq = dev->irq; - - DRM_DEBUG("%d:%d:%d => IRQ %d\n", - irq->busnum, irq->devnum, irq->funcnum, irq->irq); - - return 0; -} - -static irqreturn_t -drm_irq_handler_wrap(DRM_IRQ_ARGS) -{ - struct drm_device *dev = arg; - - DRM_SPINLOCK(&dev->irq_lock); - dev->driver->irq_handler(arg); - DRM_SPINUNLOCK(&dev->irq_lock); -} - -static void vblank_disable_fn(void *arg) -{ - struct drm_device *dev = (struct drm_device *)arg; - int i; - - /* Make sure that we are called with the lock held */ - mtx_assert(&dev->vbl_lock, MA_OWNED); - - if (callout_pending(&dev->vblank_disable_timer)) { - /* callout was reset */ - return; - } - if (!callout_active(&dev->vblank_disable_timer)) { - /* callout was stopped */ - return; - } - callout_deactivate(&dev->vblank_disable_timer); - - DRM_DEBUG("vblank_disable: %s\n", dev->vblank_disable_allowed ? - "allowed" : "denied"); - if (!dev->vblank_disable_allowed) - return; - - for (i = 0; i < dev->num_crtcs; i++) { - if (dev->vblank[i].refcount == 0 && - dev->vblank[i].enabled && !dev->vblank[i].inmodeset) { - DRM_DEBUG("disabling vblank on crtc %d\n", i); - dev->vblank[i].last = - dev->driver->get_vblank_counter(dev, i); - dev->driver->disable_vblank(dev, i); - dev->vblank[i].enabled = 0; - } - } -} - -void drm_vblank_cleanup(struct drm_device *dev) -{ - /* Bail if the driver didn't call drm_vblank_init() */ - if (dev->num_crtcs == 0) - return; - - DRM_SPINLOCK(&dev->vbl_lock); - callout_stop(&dev->vblank_disable_timer); - DRM_SPINUNLOCK(&dev->vbl_lock); - - callout_drain(&dev->vblank_disable_timer); - - DRM_SPINLOCK(&dev->vbl_lock); - vblank_disable_fn((void *)dev); - DRM_SPINUNLOCK(&dev->vbl_lock); - - free(dev->vblank, DRM_MEM_DRIVER); - - dev->num_crtcs = 0; -} - -int drm_vblank_init(struct drm_device *dev, int num_crtcs) -{ - int i, ret = ENOMEM; - - callout_init_mtx(&dev->vblank_disable_timer, &dev->vbl_lock, 0); - dev->num_crtcs = num_crtcs; - - dev->vblank = malloc(sizeof(struct drm_vblank_info) * num_crtcs, - DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); - if (!dev->vblank) - goto err; - - DRM_DEBUG("\n"); - - /* Zero per-crtc vblank stuff */ - DRM_SPINLOCK(&dev->vbl_lock); - for (i = 0; i < num_crtcs; i++) { - DRM_INIT_WAITQUEUE(&dev->vblank[i].queue); - dev->vblank[i].refcount = 0; - atomic_store_rel_32(&dev->vblank[i].count, 0); - } - dev->vblank_disable_allowed = 0; - DRM_SPINUNLOCK(&dev->vbl_lock); - - return 0; - -err: - drm_vblank_cleanup(dev); - return ret; -} - -int drm_irq_install(struct drm_device *dev) -{ - int crtc, retcode; - - if (dev->irq == 0 || dev->dev_private == NULL) - return EINVAL; - - DRM_DEBUG("irq=%d\n", dev->irq); - - DRM_LOCK(); - if (dev->irq_enabled) { - DRM_UNLOCK(); - return EBUSY; - } - dev->irq_enabled = 1; - - dev->context_flag = 0; - - /* Before installing handler */ - dev->driver->irq_preinstall(dev); - DRM_UNLOCK(); - - /* Install handler */ - retcode = bus_setup_intr(dev->device, dev->irqr, - INTR_TYPE_TTY | INTR_MPSAFE, - NULL, drm_irq_handler_wrap, dev, &dev->irqh); - if (retcode != 0) - goto err; - - /* After installing handler */ - DRM_LOCK(); - dev->driver->irq_postinstall(dev); - DRM_UNLOCK(); - if (dev->driver->enable_vblank) { - DRM_SPINLOCK(&dev->vbl_lock); - for( crtc = 0 ; crtc < dev->num_crtcs ; crtc++) { - if (dev->driver->enable_vblank(dev, crtc) == 0) { - dev->vblank[crtc].enabled = 1; - } - } - callout_reset(&dev->vblank_disable_timer, 5 * DRM_HZ, - (timeout_t *)vblank_disable_fn, (void *)dev); - DRM_SPINUNLOCK(&dev->vbl_lock); - } - - return 0; -err: - DRM_LOCK(); - dev->irq_enabled = 0; - DRM_UNLOCK(); - - return retcode; -} - -int drm_irq_uninstall(struct drm_device *dev) -{ - int crtc; - - if (!dev->irq_enabled) - return EINVAL; - - dev->irq_enabled = 0; - - /* - * Wake up any waiters so they don't hang. - */ - DRM_SPINLOCK(&dev->vbl_lock); - for (crtc = 0; crtc < dev->num_crtcs; crtc++) { - if (dev->vblank[crtc].enabled) { - DRM_WAKEUP(&dev->vblank[crtc].queue); - dev->vblank[crtc].last = - dev->driver->get_vblank_counter(dev, crtc); - dev->vblank[crtc].enabled = 0; - } - } - DRM_SPINUNLOCK(&dev->vbl_lock); - - DRM_DEBUG("irq=%d\n", dev->irq); - - dev->driver->irq_uninstall(dev); - - DRM_UNLOCK(); - bus_teardown_intr(dev->device, dev->irqr, dev->irqh); - DRM_LOCK(); - - return 0; -} - -int drm_control(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_control *ctl = data; - int err; - - switch (ctl->func) { - case DRM_INST_HANDLER: - /* Handle drivers whose DRM used to require IRQ setup but the - * no longer does. - */ - if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) - return 0; - if (dev->if_version < DRM_IF_VERSION(1, 2) && - ctl->irq != dev->irq) - return EINVAL; - return drm_irq_install(dev); - case DRM_UNINST_HANDLER: - if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) - return 0; - DRM_LOCK(); - err = drm_irq_uninstall(dev); - DRM_UNLOCK(); - return err; - default: - return EINVAL; - } -} - -u32 drm_vblank_count(struct drm_device *dev, int crtc) -{ - return atomic_load_acq_32(&dev->vblank[crtc].count); -} - -static void drm_update_vblank_count(struct drm_device *dev, int crtc) -{ - u32 cur_vblank, diff; - - /* - * Interrupts were disabled prior to this call, so deal with counter - * wrap if needed. - * NOTE! It's possible we lost a full dev->max_vblank_count events - * here if the register is small or we had vblank interrupts off for - * a long time. - */ - cur_vblank = dev->driver->get_vblank_counter(dev, crtc); - diff = cur_vblank - dev->vblank[crtc].last; - if (cur_vblank < dev->vblank[crtc].last) { - diff += dev->max_vblank_count; - - DRM_DEBUG("vblank[%d].last=0x%x, cur_vblank=0x%x => diff=0x%x\n", - crtc, dev->vblank[crtc].last, cur_vblank, diff); - } - - DRM_DEBUG("enabling vblank interrupts on crtc %d, missed %d\n", - crtc, diff); - - atomic_add_rel_32(&dev->vblank[crtc].count, diff); -} - -int drm_vblank_get(struct drm_device *dev, int crtc) -{ - int ret = 0; - - /* Make sure that we are called with the lock held */ - mtx_assert(&dev->vbl_lock, MA_OWNED); - - /* Going from 0->1 means we have to enable interrupts again */ - if (++dev->vblank[crtc].refcount == 1 && - !dev->vblank[crtc].enabled) { - ret = dev->driver->enable_vblank(dev, crtc); - DRM_DEBUG("enabling vblank on crtc %d, ret: %d\n", crtc, ret); - if (ret) - --dev->vblank[crtc].refcount; - else { - dev->vblank[crtc].enabled = 1; - drm_update_vblank_count(dev, crtc); - } - } - - if (dev->vblank[crtc].enabled) - dev->vblank[crtc].last = - dev->driver->get_vblank_counter(dev, crtc); - - return ret; -} - -void drm_vblank_put(struct drm_device *dev, int crtc) -{ - /* Make sure that we are called with the lock held */ - mtx_assert(&dev->vbl_lock, MA_OWNED); - - KASSERT(dev->vblank[crtc].refcount > 0, - ("invalid refcount")); - - /* Last user schedules interrupt disable */ - if (--dev->vblank[crtc].refcount == 0) - callout_reset(&dev->vblank_disable_timer, 5 * DRM_HZ, - (timeout_t *)vblank_disable_fn, (void *)dev); -} - -int drm_modeset_ctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_modeset_ctl *modeset = data; - int crtc, ret = 0; - - /* If drm_vblank_init() hasn't been called yet, just no-op */ - if (!dev->num_crtcs) - goto out; - - crtc = modeset->crtc; - if (crtc < 0 || crtc >= dev->num_crtcs) { - ret = EINVAL; - goto out; - } - - /* - * To avoid all the problems that might happen if interrupts - * were enabled/disabled around or between these calls, we just - * have the kernel take a reference on the CRTC (just once though - * to avoid corrupting the count if multiple, mismatch calls occur), - * so that interrupts remain enabled in the interim. - */ - switch (modeset->cmd) { - case _DRM_PRE_MODESET: - DRM_DEBUG("pre-modeset, crtc %d\n", crtc); - DRM_SPINLOCK(&dev->vbl_lock); - if (!dev->vblank[crtc].inmodeset) { - dev->vblank[crtc].inmodeset = 0x1; - if (drm_vblank_get(dev, crtc) == 0) - dev->vblank[crtc].inmodeset |= 0x2; - } - DRM_SPINUNLOCK(&dev->vbl_lock); - break; - case _DRM_POST_MODESET: - DRM_DEBUG("post-modeset, crtc %d\n", crtc); - DRM_SPINLOCK(&dev->vbl_lock); - if (dev->vblank[crtc].inmodeset) { - if (dev->vblank[crtc].inmodeset & 0x2) - drm_vblank_put(dev, crtc); - dev->vblank[crtc].inmodeset = 0; - } - dev->vblank_disable_allowed = 1; - DRM_SPINUNLOCK(&dev->vbl_lock); - break; - default: - ret = EINVAL; - break; - } - -out: - return ret; -} - -int drm_wait_vblank(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - union drm_wait_vblank *vblwait = data; - unsigned int flags, seq, crtc; - int ret = 0; - - if (!dev->irq_enabled) - return EINVAL; - - if (vblwait->request.type & - ~(_DRM_VBLANK_TYPES_MASK | _DRM_VBLANK_FLAGS_MASK)) { - DRM_ERROR("Unsupported type value 0x%x, supported mask 0x%x\n", - vblwait->request.type, - (_DRM_VBLANK_TYPES_MASK | _DRM_VBLANK_FLAGS_MASK)); - return EINVAL; - } - - flags = vblwait->request.type & _DRM_VBLANK_FLAGS_MASK; - crtc = flags & _DRM_VBLANK_SECONDARY ? 1 : 0; - - if (crtc >= dev->num_crtcs) - return EINVAL; - - DRM_SPINLOCK(&dev->vbl_lock); - ret = drm_vblank_get(dev, crtc); - DRM_SPINUNLOCK(&dev->vbl_lock); - if (ret) { - DRM_ERROR("failed to acquire vblank counter, %d\n", ret); - return ret; - } - seq = drm_vblank_count(dev, crtc); - - switch (vblwait->request.type & _DRM_VBLANK_TYPES_MASK) { - case _DRM_VBLANK_RELATIVE: - vblwait->request.sequence += seq; - vblwait->request.type &= ~_DRM_VBLANK_RELATIVE; - case _DRM_VBLANK_ABSOLUTE: - break; - default: - ret = EINVAL; - goto done; - } - - if ((flags & _DRM_VBLANK_NEXTONMISS) && - (seq - vblwait->request.sequence) <= (1<<23)) { - vblwait->request.sequence = seq + 1; - } - - if (flags & _DRM_VBLANK_SIGNAL) { - /* There have never been any consumers */ - ret = EINVAL; - } else { - DRM_DEBUG("waiting on vblank count %d, crtc %d\n", - vblwait->request.sequence, crtc); - for ( ret = 0 ; !ret && !(((drm_vblank_count(dev, crtc) - - vblwait->request.sequence) <= (1 << 23)) || - !dev->irq_enabled) ; ) { - mtx_lock(&dev->irq_lock); - if (!(((drm_vblank_count(dev, crtc) - - vblwait->request.sequence) <= (1 << 23)) || - !dev->irq_enabled)) - ret = mtx_sleep(&dev->vblank[crtc].queue, - &dev->irq_lock, PCATCH, "vblwtq", - DRM_HZ); - mtx_unlock(&dev->irq_lock); - } - - if (ret != EINTR && ret != ERESTART) { - struct timeval now; - - microtime(&now); - vblwait->reply.tval_sec = now.tv_sec; - vblwait->reply.tval_usec = now.tv_usec; - vblwait->reply.sequence = drm_vblank_count(dev, crtc); - DRM_DEBUG("returning %d to client, irq_enabled %d\n", - vblwait->reply.sequence, dev->irq_enabled); - } else { - DRM_DEBUG("vblank wait interrupted by signal\n"); - } - } - -done: - DRM_SPINLOCK(&dev->vbl_lock); - drm_vblank_put(dev, crtc); - DRM_SPINUNLOCK(&dev->vbl_lock); - - return ret; -} - -void drm_handle_vblank(struct drm_device *dev, int crtc) -{ - atomic_add_rel_32(&dev->vblank[crtc].count, 1); - DRM_WAKEUP(&dev->vblank[crtc].queue); -} - diff --git a/sys/dev/drm/drm_linux_list.h b/sys/dev/drm/drm_linux_list.h deleted file mode 100644 index d4122583291c..000000000000 --- a/sys/dev/drm/drm_linux_list.h +++ /dev/null @@ -1,110 +0,0 @@ -/* drm_linux_list.h -- linux list functions for the BSDs. - * Created: Mon Apr 7 14:30:16 1999 by anholt@FreeBSD.org - */ -/*- - * Copyright 2003 Eric Anholt - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <anholt@FreeBSD.org> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef _DRM_LINUX_LIST_H_ -#define _DRM_LINUX_LIST_H_ - -struct list_head { - struct list_head *next, *prev; -}; - -#define list_entry(ptr, type, member) container_of(ptr,type,member) -#define hlist_entry(ptr, type, member) container_of(ptr,type,member) - -static __inline__ void -INIT_LIST_HEAD(struct list_head *head) { - (head)->next = head; - (head)->prev = head; -} - -static __inline__ int -list_empty(struct list_head *head) { - return (head)->next == head; -} - -static __inline__ void -list_add(struct list_head *new, struct list_head *head) { - (head)->next->prev = new; - (new)->next = (head)->next; - (new)->prev = head; - (head)->next = new; -} - -static __inline__ void -list_add_tail(struct list_head *entry, struct list_head *head) { - (entry)->prev = (head)->prev; - (entry)->next = head; - (head)->prev->next = entry; - (head)->prev = entry; -} - -static __inline__ void -list_del(struct list_head *entry) { - (entry)->next->prev = (entry)->prev; - (entry)->prev->next = (entry)->next; -} - -static __inline__ void -list_del_init(struct list_head *entry) { - (entry)->next->prev = (entry)->prev; - (entry)->prev->next = (entry)->next; - INIT_LIST_HEAD(entry); -} - -#define list_for_each(entry, head) \ - for (entry = (head)->next; entry != head; entry = (entry)->next) - -#define list_for_each_prev(entry, head) \ - for (entry = (head)->prev; entry != (head); \ - entry = entry->prev) - -#define list_for_each_safe(entry, temp, head) \ - for (entry = (head)->next, temp = (entry)->next; \ - entry != head; \ - entry = temp, temp = entry->next) - -/** - * list_for_each_entry_safe - iterate over list of given type safe against removal of list entry - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - */ -#define list_for_each_entry_safe(pos, n, head, member) \ - for (pos = list_entry((head)->next, __typeof(*pos), member), \ - n = list_entry(pos->member.next, __typeof(*pos), member); \ - &pos->member != (head); \ - pos = n, n = list_entry(n->member.next, __typeof(*n), member)) - -#endif /* _DRM_LINUX_LIST_H_ */ diff --git a/sys/dev/drm/drm_lock.c b/sys/dev/drm/drm_lock.c deleted file mode 100644 index 28573c8c4f27..000000000000 --- a/sys/dev/drm/drm_lock.c +++ /dev/null @@ -1,199 +0,0 @@ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_lock.c - * Implementation of the ioctls and other support code for dealing with the - * hardware lock. - * - * The DRM hardware lock is a shared structure between the kernel and userland. - * - * On uncontended access where the new context was the last context, the - * client may take the lock without dropping down into the kernel, using atomic - * compare-and-set. - * - * If the client finds during compare-and-set that it was not the last owner - * of the lock, it calls the DRM lock ioctl, which may sleep waiting for the - * lock, and may have side-effects of kernel-managed context switching. - * - * When the client releases the lock, if the lock is marked as being contended - * by another client, then the DRM unlock ioctl is called so that the - * contending client may be woken up. - */ - -#include "dev/drm/drmP.h" - -int drm_lock(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_lock *lock = data; - int ret = 0; - - if (lock->context == DRM_KERNEL_CONTEXT) { - DRM_ERROR("Process %d using kernel context %d\n", - DRM_CURRENTPID, lock->context); - return EINVAL; - } - - DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n", - lock->context, DRM_CURRENTPID, dev->lock.hw_lock->lock, - lock->flags); - - if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE) && - lock->context < 0) - return EINVAL; - - DRM_LOCK(); - for (;;) { - if (drm_lock_take(&dev->lock, lock->context)) { - dev->lock.file_priv = file_priv; - dev->lock.lock_time = jiffies; - atomic_inc(&dev->counts[_DRM_STAT_LOCKS]); - break; /* Got lock */ - } - - /* Contention */ - ret = mtx_sleep((void *)&dev->lock.lock_queue, &dev->dev_lock, - PCATCH, "drmlk2", 0); - if (ret != 0) - break; - } - DRM_UNLOCK(); - - if (ret == ERESTART) - DRM_DEBUG("restarting syscall\n"); - else - DRM_DEBUG("%d %s\n", lock->context, - ret ? "interrupted" : "has lock"); - - if (ret != 0) - return ret; - - /* XXX: Add signal blocking here */ - - if (dev->driver->dma_quiescent != NULL && - (lock->flags & _DRM_LOCK_QUIESCENT)) - dev->driver->dma_quiescent(dev); - - return 0; -} - -int drm_unlock(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_lock *lock = data; - - DRM_DEBUG("%d (pid %d) requests unlock (0x%08x), flags = 0x%08x\n", - lock->context, DRM_CURRENTPID, dev->lock.hw_lock->lock, - lock->flags); - - if (lock->context == DRM_KERNEL_CONTEXT) { - DRM_ERROR("Process %d using kernel context %d\n", - DRM_CURRENTPID, lock->context); - return EINVAL; - } - - atomic_inc(&dev->counts[_DRM_STAT_UNLOCKS]); - - DRM_LOCK(); - drm_lock_transfer(&dev->lock, DRM_KERNEL_CONTEXT); - - if (drm_lock_free(&dev->lock, DRM_KERNEL_CONTEXT)) { - DRM_ERROR("\n"); - } - DRM_UNLOCK(); - - return 0; -} - -int drm_lock_take(struct drm_lock_data *lock_data, unsigned int context) -{ - volatile unsigned int *lock = &lock_data->hw_lock->lock; - unsigned int old, new; - - do { - old = *lock; - if (old & _DRM_LOCK_HELD) - new = old | _DRM_LOCK_CONT; - else - new = context | _DRM_LOCK_HELD; - } while (!atomic_cmpset_int(lock, old, new)); - - if (_DRM_LOCKING_CONTEXT(old) == context) { - if (old & _DRM_LOCK_HELD) { - if (context != DRM_KERNEL_CONTEXT) { - DRM_ERROR("%d holds heavyweight lock\n", - context); - } - return 0; - } - } - if (new == (context | _DRM_LOCK_HELD)) { - /* Have lock */ - return 1; - } - return 0; -} - -/* This takes a lock forcibly and hands it to context. Should ONLY be used - inside *_unlock to give lock to kernel before calling *_dma_schedule. */ -int drm_lock_transfer(struct drm_lock_data *lock_data, unsigned int context) -{ - volatile unsigned int *lock = &lock_data->hw_lock->lock; - unsigned int old, new; - - lock_data->file_priv = NULL; - do { - old = *lock; - new = context | _DRM_LOCK_HELD; - } while (!atomic_cmpset_int(lock, old, new)); - - return 1; -} - -int drm_lock_free(struct drm_lock_data *lock_data, unsigned int context) -{ - volatile unsigned int *lock = &lock_data->hw_lock->lock; - unsigned int old, new; - - lock_data->file_priv = NULL; - do { - old = *lock; - new = 0; - } while (!atomic_cmpset_int(lock, old, new)); - - if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) { - DRM_ERROR("%d freed heavyweight lock held by %d\n", - context, _DRM_LOCKING_CONTEXT(old)); - return 1; - } - DRM_WAKEUP_INT((void *)&lock_data->lock_queue); - return 0; -} diff --git a/sys/dev/drm/drm_memory.c b/sys/dev/drm/drm_memory.c deleted file mode 100644 index 409ea7d72dc0..000000000000 --- a/sys/dev/drm/drm_memory.c +++ /dev/null @@ -1,115 +0,0 @@ -/*- - *Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_memory.c - * Wrappers for kernel memory allocation routines, and MTRR management support. - * - * This file previously implemented a memory consumption tracking system using - * the "area" argument for various different types of allocations, but that - * has been stripped out for now. - */ - -#include "dev/drm/drmP.h" - -MALLOC_DEFINE(DRM_MEM_DMA, "drm_dma", "DRM DMA Data Structures"); -MALLOC_DEFINE(DRM_MEM_SAREA, "drm_sarea", "DRM SAREA Data Structures"); -MALLOC_DEFINE(DRM_MEM_DRIVER, "drm_driver", "DRM DRIVER Data Structures"); -MALLOC_DEFINE(DRM_MEM_MAGIC, "drm_magic", "DRM MAGIC Data Structures"); -MALLOC_DEFINE(DRM_MEM_IOCTLS, "drm_ioctls", "DRM IOCTL Data Structures"); -MALLOC_DEFINE(DRM_MEM_MAPS, "drm_maps", "DRM MAP Data Structures"); -MALLOC_DEFINE(DRM_MEM_BUFS, "drm_bufs", "DRM BUFFER Data Structures"); -MALLOC_DEFINE(DRM_MEM_SEGS, "drm_segs", "DRM SEGMENTS Data Structures"); -MALLOC_DEFINE(DRM_MEM_PAGES, "drm_pages", "DRM PAGES Data Structures"); -MALLOC_DEFINE(DRM_MEM_FILES, "drm_files", "DRM FILE Data Structures"); -MALLOC_DEFINE(DRM_MEM_QUEUES, "drm_queues", "DRM QUEUE Data Structures"); -MALLOC_DEFINE(DRM_MEM_CMDS, "drm_cmds", "DRM COMMAND Data Structures"); -MALLOC_DEFINE(DRM_MEM_MAPPINGS, "drm_mapping", "DRM MAPPING Data Structures"); -MALLOC_DEFINE(DRM_MEM_BUFLISTS, "drm_buflists", "DRM BUFLISTS Data Structures"); -MALLOC_DEFINE(DRM_MEM_AGPLISTS, "drm_agplists", "DRM AGPLISTS Data Structures"); -MALLOC_DEFINE(DRM_MEM_CTXBITMAP, "drm_ctxbitmap", - "DRM CTXBITMAP Data Structures"); -MALLOC_DEFINE(DRM_MEM_SGLISTS, "drm_sglists", "DRM SGLISTS Data Structures"); -MALLOC_DEFINE(DRM_MEM_DRAWABLE, "drm_drawable", "DRM DRAWABLE Data Structures"); -MALLOC_DEFINE(DRM_MEM_MM, "drm_sman", "DRM MEMORY MANAGER Data Structures"); -MALLOC_DEFINE(DRM_MEM_HASHTAB, "drm_hashtab", "DRM HASHTABLE Data Structures"); - -void drm_mem_init(void) -{ -} - -void drm_mem_uninit(void) -{ -} - -void *drm_ioremap_wc(struct drm_device *dev, drm_local_map_t *map) -{ - return pmap_mapdev_attr(map->offset, map->size, VM_MEMATTR_WRITE_COMBINING); -} - -void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map) -{ - return pmap_mapdev(map->offset, map->size); -} - -void drm_ioremapfree(drm_local_map_t *map) -{ - pmap_unmapdev((vm_offset_t) map->virtual, map->size); -} - -int -drm_mtrr_add(unsigned long offset, size_t size, int flags) -{ - int act; - struct mem_range_desc mrdesc; - - mrdesc.mr_base = offset; - mrdesc.mr_len = size; - mrdesc.mr_flags = flags; - act = MEMRANGE_SET_UPDATE; - strlcpy(mrdesc.mr_owner, "drm", sizeof(mrdesc.mr_owner)); - return mem_range_attr_set(&mrdesc, &act); -} - -int -drm_mtrr_del(int __unused handle, unsigned long offset, size_t size, int flags) -{ - int act; - struct mem_range_desc mrdesc; - - mrdesc.mr_base = offset; - mrdesc.mr_len = size; - mrdesc.mr_flags = flags; - act = MEMRANGE_SET_REMOVE; - strlcpy(mrdesc.mr_owner, "drm", sizeof(mrdesc.mr_owner)); - return mem_range_attr_set(&mrdesc, &act); -} diff --git a/sys/dev/drm/drm_mm.c b/sys/dev/drm/drm_mm.c deleted file mode 100644 index bab36c1117a7..000000000000 --- a/sys/dev/drm/drm_mm.c +++ /dev/null @@ -1,369 +0,0 @@ -/************************************************************************** - * - * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * - **************************************************************************/ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Generic simple memory manager implementation. Intended to be used as a base - * class implementation for more advanced memory managers. - * - * Note that the algorithm used is quite simple and there might be substantial - * performance gains if a smarter free list is implemented. Currently it is just an - * unordered stack of free regions. This could easily be improved if an RB-tree - * is used instead. At least if we expect heavy fragmentation. - * - * Aligned allocations can also see improvement. - * - * Authors: - * Thomas Hellström <thomas-at-tungstengraphics-dot-com> - */ - -#include "dev/drm/drmP.h" -#include "dev/drm/drm_mm.h" - -#define MM_UNUSED_TARGET 4 - -unsigned long drm_mm_tail_space(struct drm_mm *mm) -{ - struct list_head *tail_node; - struct drm_mm_node *entry; - - tail_node = mm->ml_entry.prev; - entry = list_entry(tail_node, struct drm_mm_node, ml_entry); - if (!entry->free) - return 0; - - return entry->size; -} - -int drm_mm_remove_space_from_tail(struct drm_mm *mm, unsigned long size) -{ - struct list_head *tail_node; - struct drm_mm_node *entry; - - tail_node = mm->ml_entry.prev; - entry = list_entry(tail_node, struct drm_mm_node, ml_entry); - if (!entry->free) - return -ENOMEM; - - if (entry->size <= size) - return -ENOMEM; - - entry->size -= size; - return 0; -} - -static struct drm_mm_node *drm_mm_kmalloc(struct drm_mm *mm, int atomic) -{ - struct drm_mm_node *child; - - if (atomic) - child = malloc(sizeof(*child), DRM_MEM_MM, M_NOWAIT); - else - child = malloc(sizeof(*child), DRM_MEM_MM, M_WAITOK); - - if (unlikely(child == NULL)) { - mtx_lock(&mm->unused_lock); - if (list_empty(&mm->unused_nodes)) - child = NULL; - else { - child = - list_entry(mm->unused_nodes.next, - struct drm_mm_node, fl_entry); - list_del(&child->fl_entry); - --mm->num_unused; - } - mtx_unlock(&mm->unused_lock); - } - return child; -} - -int drm_mm_pre_get(struct drm_mm *mm) -{ - struct drm_mm_node *node; - - mtx_lock(&mm->unused_lock); - while (mm->num_unused < MM_UNUSED_TARGET) { - mtx_unlock(&mm->unused_lock); - node = malloc(sizeof(*node), DRM_MEM_MM, M_WAITOK); - mtx_lock(&mm->unused_lock); - - if (unlikely(node == NULL)) { - int ret = (mm->num_unused < 2) ? -ENOMEM : 0; - mtx_unlock(&mm->unused_lock); - return ret; - } - ++mm->num_unused; - list_add_tail(&node->fl_entry, &mm->unused_nodes); - } - mtx_unlock(&mm->unused_lock); - return 0; -} - -static int drm_mm_create_tail_node(struct drm_mm *mm, - unsigned long start, - unsigned long size, int atomic) -{ - struct drm_mm_node *child; - - child = drm_mm_kmalloc(mm, atomic); - if (unlikely(child == NULL)) - return -ENOMEM; - - child->free = 1; - child->size = size; - child->start = start; - child->mm = mm; - - list_add_tail(&child->ml_entry, &mm->ml_entry); - list_add_tail(&child->fl_entry, &mm->fl_entry); - - return 0; -} - -int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size, int atomic) -{ - struct list_head *tail_node; - struct drm_mm_node *entry; - - tail_node = mm->ml_entry.prev; - entry = list_entry(tail_node, struct drm_mm_node, ml_entry); - if (!entry->free) { - return drm_mm_create_tail_node(mm, entry->start + entry->size, - size, atomic); - } - entry->size += size; - return 0; -} - -static struct drm_mm_node *drm_mm_split_at_start(struct drm_mm_node *parent, - unsigned long size, - int atomic) -{ - struct drm_mm_node *child; - - child = drm_mm_kmalloc(parent->mm, atomic); - if (unlikely(child == NULL)) - return NULL; - - INIT_LIST_HEAD(&child->fl_entry); - - child->free = 0; - child->size = size; - child->start = parent->start; - child->mm = parent->mm; - - list_add_tail(&child->ml_entry, &parent->ml_entry); - INIT_LIST_HEAD(&child->fl_entry); - - parent->size -= size; - parent->start += size; - return child; -} - - -struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *node, - unsigned long size, - unsigned alignment, - int atomic) -{ - - struct drm_mm_node *align_splitoff = NULL; - unsigned tmp = 0; - - if (alignment) - tmp = node->start % alignment; - - if (tmp) { - align_splitoff = - drm_mm_split_at_start(node, alignment - tmp, atomic); - if (unlikely(align_splitoff == NULL)) - return NULL; - } - - if (node->size == size) { - list_del_init(&node->fl_entry); - node->free = 0; - } else { - node = drm_mm_split_at_start(node, size, atomic); - } - - if (align_splitoff) - drm_mm_put_block(align_splitoff); - - return node; -} - -/* - * Put a block. Merge with the previous and / or next block if they are free. - * Otherwise add to the free stack. - */ - -void drm_mm_put_block(struct drm_mm_node *cur) -{ - - struct drm_mm *mm = cur->mm; - struct list_head *cur_head = &cur->ml_entry; - struct list_head *root_head = &mm->ml_entry; - struct drm_mm_node *prev_node = NULL; - struct drm_mm_node *next_node; - - int merged = 0; - - if (cur_head->prev != root_head) { - prev_node = - list_entry(cur_head->prev, struct drm_mm_node, ml_entry); - if (prev_node->free) { - prev_node->size += cur->size; - merged = 1; - } - } - if (cur_head->next != root_head) { - next_node = - list_entry(cur_head->next, struct drm_mm_node, ml_entry); - if (next_node->free) { - if (merged) { - prev_node->size += next_node->size; - list_del(&next_node->ml_entry); - list_del(&next_node->fl_entry); - if (mm->num_unused < MM_UNUSED_TARGET) { - list_add(&next_node->fl_entry, - &mm->unused_nodes); - ++mm->num_unused; - } else - free(next_node, DRM_MEM_MM); - } else { - next_node->size += cur->size; - next_node->start = cur->start; - merged = 1; - } - } - } - if (!merged) { - cur->free = 1; - list_add(&cur->fl_entry, &mm->fl_entry); - } else { - list_del(&cur->ml_entry); - if (mm->num_unused < MM_UNUSED_TARGET) { - list_add(&cur->fl_entry, &mm->unused_nodes); - ++mm->num_unused; - } else - free(cur, DRM_MEM_MM); - } -} - -struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm, - unsigned long size, - unsigned alignment, int best_match) -{ - struct list_head *list; - const struct list_head *free_stack = &mm->fl_entry; - struct drm_mm_node *entry; - struct drm_mm_node *best; - unsigned long best_size; - unsigned wasted; - - best = NULL; - best_size = ~0UL; - - list_for_each(list, free_stack) { - entry = list_entry(list, struct drm_mm_node, fl_entry); - wasted = 0; - - if (entry->size < size) - continue; - - if (alignment) { - register unsigned tmp = entry->start % alignment; - if (tmp) - wasted += alignment - tmp; - } - - if (entry->size >= size + wasted) { - if (!best_match) - return entry; - if (size < best_size) { - best = entry; - best_size = entry->size; - } - } - } - - return best; -} - -int drm_mm_clean(struct drm_mm * mm) -{ - struct list_head *head = &mm->ml_entry; - - return (head->next->next == head); -} - -int drm_mm_init(struct drm_mm * mm, unsigned long start, unsigned long size) -{ - INIT_LIST_HEAD(&mm->ml_entry); - INIT_LIST_HEAD(&mm->fl_entry); - INIT_LIST_HEAD(&mm->unused_nodes); - mm->num_unused = 0; - mtx_init(&mm->unused_lock, "drm_unused", NULL, MTX_DEF); - - /* XXX This could be non-atomic but gets called from a locked path */ - return drm_mm_create_tail_node(mm, start, size, 1); -} - -void drm_mm_takedown(struct drm_mm * mm) -{ - struct list_head *bnode = mm->fl_entry.next; - struct drm_mm_node *entry; - struct drm_mm_node *next; - - entry = list_entry(bnode, struct drm_mm_node, fl_entry); - - if (entry->ml_entry.next != &mm->ml_entry || - entry->fl_entry.next != &mm->fl_entry) { - DRM_ERROR("Memory manager not clean. Delaying takedown\n"); - return; - } - - list_del(&entry->fl_entry); - list_del(&entry->ml_entry); - free(entry, DRM_MEM_MM); - - mtx_lock(&mm->unused_lock); - list_for_each_entry_safe(entry, next, &mm->unused_nodes, fl_entry) { - list_del(&entry->fl_entry); - free(entry, DRM_MEM_MM); - --mm->num_unused; - } - mtx_unlock(&mm->unused_lock); - - mtx_destroy(&mm->unused_lock); - - KASSERT(mm->num_unused == 0, ("num_unused != 0")); -} diff --git a/sys/dev/drm/drm_mm.h b/sys/dev/drm/drm_mm.h deleted file mode 100644 index f7479cdc1f40..000000000000 --- a/sys/dev/drm/drm_mm.h +++ /dev/null @@ -1,100 +0,0 @@ -/************************************************************************** - * - * Copyright 2006-2008 Tungsten Graphics, Inc., Cedar Park, TX. USA. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * - **************************************************************************/ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Authors: - * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> - */ - -#ifndef _DRM_MM_H_ -#define _DRM_MM_H_ - -#include "dev/drm/drm_linux_list.h" - -struct drm_mm_node { - struct list_head fl_entry; - struct list_head ml_entry; - int free; - unsigned long start; - unsigned long size; - struct drm_mm *mm; - void *private; -}; - -struct drm_mm { - struct list_head fl_entry; - struct list_head ml_entry; - struct list_head unused_nodes; - int num_unused; - struct mtx unused_lock; -}; - -/* - * Basic range manager support (drm_mm.c) - */ -extern struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *node, - unsigned long size, - unsigned alignment, - int atomic); -static inline struct drm_mm_node *drm_mm_get_block(struct drm_mm_node *parent, - unsigned long size, - unsigned alignment) -{ - return drm_mm_get_block_generic(parent, size, alignment, 0); -} -static inline struct drm_mm_node *drm_mm_get_block_atomic(struct drm_mm_node *parent, - unsigned long size, - unsigned alignment) -{ - return drm_mm_get_block_generic(parent, size, alignment, 1); -} -extern void drm_mm_put_block(struct drm_mm_node *cur); -extern struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm, - unsigned long size, - unsigned alignment, - int best_match); -extern int drm_mm_init(struct drm_mm *mm, unsigned long start, - unsigned long size); -extern void drm_mm_takedown(struct drm_mm *mm); -extern int drm_mm_clean(struct drm_mm *mm); -extern unsigned long drm_mm_tail_space(struct drm_mm *mm); -extern int drm_mm_remove_space_from_tail(struct drm_mm *mm, - unsigned long size); -extern int drm_mm_add_space_to_tail(struct drm_mm *mm, - unsigned long size, int atomic); -extern int drm_mm_pre_get(struct drm_mm *mm); - -static inline struct drm_mm *drm_get_mm(struct drm_mm_node *block) -{ - return block->mm; -} - -#endif diff --git a/sys/dev/drm/drm_pci.c b/sys/dev/drm/drm_pci.c deleted file mode 100644 index 3d9a6f4a2b76..000000000000 --- a/sys/dev/drm/drm_pci.c +++ /dev/null @@ -1,129 +0,0 @@ -/*- - * Copyright 2003 Eric Anholt. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** - * \file drm_pci.h - * \brief PCI consistent, DMA-accessible memory allocation. - * - * \author Eric Anholt <anholt@FreeBSD.org> - */ - -#include "dev/drm/drmP.h" - -/**********************************************************************/ -/** \name PCI memory */ -/*@{*/ - -static void -drm_pci_busdma_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) -{ - drm_dma_handle_t *dmah = arg; - - if (error != 0) - return; - - KASSERT(nsegs == 1, ("drm_pci_busdma_callback: bad dma segment count")); - dmah->busaddr = segs[0].ds_addr; -} - -/** - * \brief Allocate a physically contiguous DMA-accessible consistent - * memory block. - */ -drm_dma_handle_t * -drm_pci_alloc(struct drm_device *dev, size_t size, - size_t align, dma_addr_t maxaddr) -{ - drm_dma_handle_t *dmah; - int ret; - - /* Need power-of-two alignment, so fail the allocation if it isn't. */ - if ((align & (align - 1)) != 0) { - DRM_ERROR("drm_pci_alloc with non-power-of-two alignment %d\n", - (int)align); - return NULL; - } - - dmah = malloc(sizeof(drm_dma_handle_t), DRM_MEM_DMA, M_ZERO | M_NOWAIT); - if (dmah == NULL) - return NULL; - - /* Make sure we aren't holding locks here */ - mtx_assert(&dev->dev_lock, MA_NOTOWNED); - if (mtx_owned(&dev->dev_lock)) - DRM_ERROR("called while holding dev_lock\n"); - mtx_assert(&dev->dma_lock, MA_NOTOWNED); - if (mtx_owned(&dev->dma_lock)) - DRM_ERROR("called while holding dma_lock\n"); - - ret = bus_dma_tag_create(NULL, align, 0, /* tag, align, boundary */ - maxaddr, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */ - NULL, NULL, /* filtfunc, filtfuncargs */ - size, 1, size, /* maxsize, nsegs, maxsegsize */ - 0, NULL, NULL, /* flags, lockfunc, lockfuncargs */ - &dmah->tag); - if (ret != 0) { - free(dmah, DRM_MEM_DMA); - return NULL; - } - - ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr, - BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_NOCACHE, &dmah->map); - if (ret != 0) { - bus_dma_tag_destroy(dmah->tag); - free(dmah, DRM_MEM_DMA); - return NULL; - } - - ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr, size, - drm_pci_busdma_callback, dmah, BUS_DMA_NOWAIT); - if (ret != 0) { - bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map); - bus_dma_tag_destroy(dmah->tag); - free(dmah, DRM_MEM_DMA); - return NULL; - } - - return dmah; -} - -/** - * \brief Free a DMA-accessible consistent memory block. - */ -void -drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah) -{ - if (dmah == NULL) - return; - - bus_dmamap_unload(dmah->tag, dmah->map); - bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map); - bus_dma_tag_destroy(dmah->tag); - - free(dmah, DRM_MEM_DMA); -} - -/*@}*/ diff --git a/sys/dev/drm/drm_pciids.h b/sys/dev/drm/drm_pciids.h deleted file mode 100644 index 38e0864761b5..000000000000 --- a/sys/dev/drm/drm_pciids.h +++ /dev/null @@ -1,348 +0,0 @@ -/* - * $FreeBSD$ - */ -/* - This file is auto-generated from the drm_pciids.txt in the DRM CVS - Please contact dri-devel@lists.sf.net to add new cards to this list -*/ -#define r128_PCI_IDS \ - {0x1002, 0x4c45, 0, "ATI Rage 128 Mobility LE (PCI)"}, \ - {0x1002, 0x4c46, 0, "ATI Rage 128 Mobility LF (AGP)"}, \ - {0x1002, 0x4d46, 0, "ATI Rage 128 Mobility MF (AGP)"}, \ - {0x1002, 0x4d4c, 0, "ATI Rage 128 Mobility ML (AGP)"}, \ - {0x1002, 0x5041, 0, "ATI Rage 128 Pro PA (PCI)"}, \ - {0x1002, 0x5042, 0, "ATI Rage 128 Pro PB (AGP)"}, \ - {0x1002, 0x5043, 0, "ATI Rage 128 Pro PC (AGP)"}, \ - {0x1002, 0x5044, 0, "ATI Rage 128 Pro PD (PCI)"}, \ - {0x1002, 0x5045, 0, "ATI Rage 128 Pro PE (AGP)"}, \ - {0x1002, 0x5046, 0, "ATI Rage 128 Pro PF (AGP)"}, \ - {0x1002, 0x5047, 0, "ATI Rage 128 Pro PG (PCI)"}, \ - {0x1002, 0x5048, 0, "ATI Rage 128 Pro PH (AGP)"}, \ - {0x1002, 0x5049, 0, "ATI Rage 128 Pro PI (AGP)"}, \ - {0x1002, 0x504A, 0, "ATI Rage 128 Pro PJ (PCI)"}, \ - {0x1002, 0x504B, 0, "ATI Rage 128 Pro PK (AGP)"}, \ - {0x1002, 0x504C, 0, "ATI Rage 128 Pro PL (AGP)"}, \ - {0x1002, 0x504D, 0, "ATI Rage 128 Pro PM (PCI)"}, \ - {0x1002, 0x504E, 0, "ATI Rage 128 Pro PN (AGP)"}, \ - {0x1002, 0x504F, 0, "ATI Rage 128 Pro PO (AGP)"}, \ - {0x1002, 0x5050, 0, "ATI Rage 128 Pro PP (PCI)"}, \ - {0x1002, 0x5051, 0, "ATI Rage 128 Pro PQ (AGP)"}, \ - {0x1002, 0x5052, 0, "ATI Rage 128 Pro PR (PCI)"}, \ - {0x1002, 0x5053, 0, "ATI Rage 128 Pro PS (PCI)"}, \ - {0x1002, 0x5054, 0, "ATI Rage 128 Pro PT (AGP)"}, \ - {0x1002, 0x5055, 0, "ATI Rage 128 Pro PU (AGP)"}, \ - {0x1002, 0x5056, 0, "ATI Rage 128 Pro PV (PCI)"}, \ - {0x1002, 0x5057, 0, "ATI Rage 128 Pro PW (AGP)"}, \ - {0x1002, 0x5058, 0, "ATI Rage 128 Pro PX (AGP)"}, \ - {0x1002, 0x5245, 0, "ATI Rage 128 RE (PCI)"}, \ - {0x1002, 0x5246, 0, "ATI Rage 128 RF (AGP)"}, \ - {0x1002, 0x5247, 0, "ATI Rage 128 RG (AGP)"}, \ - {0x1002, 0x524b, 0, "ATI Rage 128 RK (PCI)"}, \ - {0x1002, 0x524c, 0, "ATI Rage 128 RL (AGP)"}, \ - {0x1002, 0x534d, 0, "ATI Rage 128 SM (AGP)"}, \ - {0x1002, 0x5446, 0, "ATI Rage 128 Pro Ultra TF (AGP)"}, \ - {0x1002, 0x544C, 0, "ATI Rage 128 Pro Ultra TL (AGP)"}, \ - {0x1002, 0x5452, 0, "ATI Rage 128 Pro Ultra TR (AGP)"}, \ - {0, 0, 0, NULL} - -#define mga_PCI_IDS \ - {0x102b, 0x0520, MGA_CARD_TYPE_G200, "Matrox G200 (PCI)"}, \ - {0x102b, 0x0521, MGA_CARD_TYPE_G200, "Matrox G200 (AGP)"}, \ - {0x102b, 0x0525, MGA_CARD_TYPE_G400, "Matrox G400/G450 (AGP)"}, \ - {0x102b, 0x2527, MGA_CARD_TYPE_G550, "Matrox G550 (AGP)"}, \ - {0, 0, 0, NULL} - -#define mach64_PCI_IDS \ - {0x1002, 0x4749, 0, "3D Rage Pro"}, \ - {0x1002, 0x4750, 0, "3D Rage Pro 215GP"}, \ - {0x1002, 0x4751, 0, "3D Rage Pro 215GQ"}, \ - {0x1002, 0x4742, 0, "3D Rage Pro AGP 1X/2X"}, \ - {0x1002, 0x4744, 0, "3D Rage Pro AGP 1X"}, \ - {0x1002, 0x4c49, 0, "3D Rage LT Pro"}, \ - {0x1002, 0x4c50, 0, "3D Rage LT Pro"}, \ - {0x1002, 0x4c51, 0, "3D Rage LT Pro"}, \ - {0x1002, 0x4c42, 0, "3D Rage LT Pro AGP-133"}, \ - {0x1002, 0x4c44, 0, "3D Rage LT Pro AGP-66"}, \ - {0x1002, 0x474c, 0, "Rage XC"}, \ - {0x1002, 0x474f, 0, "Rage XL"}, \ - {0x1002, 0x4752, 0, "Rage XL"}, \ - {0x1002, 0x4753, 0, "Rage XC"}, \ - {0x1002, 0x474d, 0, "Rage XL AGP 2X"}, \ - {0x1002, 0x474e, 0, "Rage XC AGP"}, \ - {0x1002, 0x4c52, 0, "Rage Mobility P/M"}, \ - {0x1002, 0x4c53, 0, "Rage Mobility L"}, \ - {0x1002, 0x4c4d, 0, "Rage Mobility P/M AGP 2X"}, \ - {0x1002, 0x4c4e, 0, "Rage Mobility L AGP 2X"}, \ - {0, 0, 0, NULL} - -#define sis_PCI_IDS \ - {0x1039, 0x0300, 0, "SiS 300/305"}, \ - {0x1039, 0x5300, 0, "SiS 540"}, \ - {0x1039, 0x6300, 0, "SiS 630"}, \ - {0x1039, 0x6330, SIS_CHIP_315, "SiS 661"}, \ - {0x1039, 0x7300, 0, "SiS 730"}, \ - {0x18CA, 0x0040, SIS_CHIP_315, "Volari V3XT/V5/V8"}, \ - {0x18CA, 0x0042, SIS_CHIP_315, "Volari Unknown"}, \ - {0, 0, 0, NULL} - -#define tdfx_PCI_IDS \ - {0x121a, 0x0003, 0, "3dfx Voodoo Banshee"}, \ - {0x121a, 0x0004, 0, "3dfx Voodoo3 2000"}, \ - {0x121a, 0x0005, 0, "3dfx Voodoo3 3000"}, \ - {0x121a, 0x0007, 0, "3dfx Voodoo4 4500"}, \ - {0x121a, 0x0009, 0, "3dfx Voodoo5 5500"}, \ - {0x121a, 0x000b, 0, "3dfx Voodoo4 4200"}, \ - {0, 0, 0, NULL} - -#define viadrv_PCI_IDS \ - {0x1106, 0x3022, 0, "VIA CLE266 3022"}, \ - {0x1106, 0x3118, VIA_PRO_GROUP_A, "VIA CN400 / PM8X0"}, \ - {0x1106, 0x3122, 0, "VIA CLE266"}, \ - {0x1106, 0x7205, 0, "VIA KM400"}, \ - {0x1106, 0x3108, 0, "VIA K8M800"}, \ - {0x1106, 0x3344, 0, "VIA CN700 / VM800 / P4M800Pro"}, \ - {0x1106, 0x3343, 0, "VIA P4M890"}, \ - {0x1106, 0x3230, VIA_DX9_0, "VIA K8M890"}, \ - {0x1106, 0x3157, VIA_PRO_GROUP_A, "VIA CX700"}, \ - {0x1106, 0x3371, VIA_DX9_0, "VIA P4M900 / VN896"}, \ - {0, 0, 0, NULL} - -#define i810_PCI_IDS \ - {0x8086, 0x7121, 0, "Intel i810 GMCH"}, \ - {0x8086, 0x7123, 0, "Intel i810-DC100 GMCH"}, \ - {0x8086, 0x7125, 0, "Intel i810E GMCH"}, \ - {0x8086, 0x1132, 0, "Intel i815 GMCH"}, \ - {0, 0, 0, NULL} - -#define i830_PCI_IDS \ - {0x8086, 0x3577, 0, "Intel i830M GMCH"}, \ - {0x8086, 0x2562, 0, "Intel i845G GMCH"}, \ - {0x8086, 0x3582, 0, "Intel i852GM/i855GM GMCH"}, \ - {0x8086, 0x2572, 0, "Intel i865G GMCH"}, \ - {0, 0, 0, NULL} - -#define gamma_PCI_IDS \ - {0x3d3d, 0x0008, 0, "3DLabs GLINT Gamma G1"}, \ - {0, 0, 0, NULL} - -#define savage_PCI_IDS \ - {0x5333, 0x8a20, S3_SAVAGE3D, "Savage 3D"}, \ - {0x5333, 0x8a21, S3_SAVAGE3D, "Savage 3D/MV"}, \ - {0x5333, 0x8a22, S3_SAVAGE4, "Savage4"}, \ - {0x5333, 0x8a23, S3_SAVAGE4, "Savage4"}, \ - {0x5333, 0x8c10, S3_SAVAGE_MX, "Savage/MX-MV"}, \ - {0x5333, 0x8c11, S3_SAVAGE_MX, "Savage/MX"}, \ - {0x5333, 0x8c12, S3_SAVAGE_MX, "Savage/IX-MV"}, \ - {0x5333, 0x8c13, S3_SAVAGE_MX, "Savage/IX"}, \ - {0x5333, 0x8c22, S3_SUPERSAVAGE, "SuperSavage MX/128"}, \ - {0x5333, 0x8c24, S3_SUPERSAVAGE, "SuperSavage MX/64"}, \ - {0x5333, 0x8c26, S3_SUPERSAVAGE, "SuperSavage MX/64C"}, \ - {0x5333, 0x8c2a, S3_SUPERSAVAGE, "SuperSavage IX/128 SDR"}, \ - {0x5333, 0x8c2b, S3_SUPERSAVAGE, "SuperSavage IX/128 DDR"}, \ - {0x5333, 0x8c2c, S3_SUPERSAVAGE, "SuperSavage IX/64 SDR"}, \ - {0x5333, 0x8c2d, S3_SUPERSAVAGE, "SuperSavage IX/64 DDR"}, \ - {0x5333, 0x8c2e, S3_SUPERSAVAGE, "SuperSavage IX/C SDR"}, \ - {0x5333, 0x8c2f, S3_SUPERSAVAGE, "SuperSavage IX/C DDR"}, \ - {0x5333, 0x8a25, S3_PROSAVAGE, "ProSavage PM133"}, \ - {0x5333, 0x8a26, S3_PROSAVAGE, "ProSavage KM133"}, \ - {0x5333, 0x8d01, S3_TWISTER, "ProSavage Twister PN133"}, \ - {0x5333, 0x8d02, S3_TWISTER, "ProSavage Twister KN133"}, \ - {0x5333, 0x8d03, S3_PROSAVAGEDDR, "ProSavage DDR"}, \ - {0x5333, 0x8d04, S3_PROSAVAGEDDR, "ProSavage DDR-K"}, \ - {0, 0, 0, NULL} - -#define ffb_PCI_IDS \ - {0, 0, 0, NULL} - -#define imagine_PCI_IDS \ - {0x105d, 0x2309, IMAGINE_128, "Imagine 128"}, \ - {0x105d, 0x2339, IMAGINE_128_2, "Imagine 128-II"}, \ - {0x105d, 0x493d, IMAGINE_T2R, "Ticket to Ride"}, \ - {0x105d, 0x5348, IMAGINE_REV4, "Revolution IV"}, \ - {0, 0, 0, NULL} - -#define nv_PCI_IDS \ - {0x10DE, 0x0020, NV04, "NVidia RIVA TNT"}, \ - {0x10DE, 0x0028, NV04, "NVidia RIVA TNT2"}, \ - {0x10DE, 0x002A, NV04, "NVidia Unknown TNT2"}, \ - {0x10DE, 0x002C, NV04, "NVidia Vanta"}, \ - {0x10DE, 0x0029, NV04, "NVidia RIVA TNT2 Ultra"}, \ - {0x10DE, 0x002D, NV04, "NVidia RIVA TNT2 Model 64"}, \ - {0x10DE, 0x00A0, NV04, "NVidia Aladdin TNT2"}, \ - {0x10DE, 0x0100, NV10, "NVidia GeForce 256"}, \ - {0x10DE, 0x0101, NV10, "NVidia GeForce DDR"}, \ - {0x10DE, 0x0103, NV10, "NVidia Quadro"}, \ - {0x10DE, 0x0110, NV10, "NVidia GeForce2 MX/MX 400"}, \ - {0x10DE, 0x0111, NV10, "NVidia GeForce2 MX 100/200"}, \ - {0x10DE, 0x0112, NV10, "NVidia GeForce2 Go"}, \ - {0x10DE, 0x0113, NV10, "NVidia Quadro2 MXR/EX/Go"}, \ - {0x10DE, 0x0150, NV10, "NVidia GeForce2 GTS"}, \ - {0x10DE, 0x0151, NV10, "NVidia GeForce2 Ti"}, \ - {0x10DE, 0x0152, NV10, "NVidia GeForce2 Ultra"}, \ - {0x10DE, 0x0153, NV10, "NVidia Quadro2 Pro"}, \ - {0x10DE, 0x0170, NV10, "NVidia GeForce4 MX 460"}, \ - {0x10DE, 0x0171, NV10, "NVidia GeForce4 MX 440"}, \ - {0x10DE, 0x0172, NV10, "NVidia GeForce4 MX 420"}, \ - {0x10DE, 0x0173, NV10, "NVidia GeForce4 MX 440-SE"}, \ - {0x10DE, 0x0174, NV10, "NVidia GeForce4 440 Go"}, \ - {0x10DE, 0x0175, NV10, "NVidia GeForce4 420 Go"}, \ - {0x10DE, 0x0176, NV10, "NVidia GeForce4 420 Go 32M"}, \ - {0x10DE, 0x0177, NV10, "NVidia GeForce4 460 Go"}, \ - {0x10DE, 0x0178, NV10, "NVidia Quadro4 550 XGL"}, \ - {0x10DE, 0x0179, NV10, "NVidia GeForce4"}, \ - {0x10DE, 0x017A, NV10, "NVidia Quadro4 NVS"}, \ - {0x10DE, 0x017C, NV10, "NVidia Quadro4 500 GoGL"}, \ - {0x10DE, 0x017D, NV10, "NVidia GeForce4 410 Go 16M"}, \ - {0x10DE, 0x0181, NV10, "NVidia GeForce4 MX 440 with AGP8X"}, \ - {0x10DE, 0x0182, NV10, "NVidia GeForce4 MX 440SE with AGP8X"}, \ - {0x10DE, 0x0183, NV10, "NVidia GeForce4 MX 420 with AGP8X"}, \ - {0x10DE, 0x0185, NV10, "NVidia GeForce4 MX 4000"}, \ - {0x10DE, 0x0186, NV10, "NVidia GeForce4 448 Go"}, \ - {0x10DE, 0x0187, NV10, "NVidia GeForce4 488 Go"}, \ - {0x10DE, 0x0188, NV10, "NVidia Quadro4 580 XGL"}, \ - {0x10DE, 0x0189, NV10, "NVidia GeForce4 MX with AGP8X (Mac)"}, \ - {0x10DE, 0x018A, NV10, "NVidia Quadro4 280 NVS"}, \ - {0x10DE, 0x018B, NV10, "NVidia Quadro4 380 XGL"}, \ - {0x10DE, 0x018C, NV10, "NVidia Quadro NVS 50 PCI"}, \ - {0x10DE, 0x018D, NV10, "NVidia GeForce4 448 Go"}, \ - {0x10DE, 0x01A0, NV10, "NVidia GeForce2 Integrated GPU"}, \ - {0x10DE, 0x01F0, NV10, "NVidia GeForce4 MX Integrated GPU"}, \ - {0x10DE, 0x0200, NV20, "NVidia GeForce3"}, \ - {0x10DE, 0x0201, NV20, "NVidia GeForce3 Ti 200"}, \ - {0x10DE, 0x0202, NV20, "NVidia GeForce3 Ti 500"}, \ - {0x10DE, 0x0203, NV20, "NVidia Quadro DCC"}, \ - {0x10DE, 0x0250, NV20, "NVidia GeForce4 Ti 4600"}, \ - {0x10DE, 0x0251, NV20, "NVidia GeForce4 Ti 4400"}, \ - {0x10DE, 0x0252, NV20, "NVidia 0x0252"}, \ - {0x10DE, 0x0253, NV20, "NVidia GeForce4 Ti 4200"}, \ - {0x10DE, 0x0258, NV20, "NVidia Quadro4 900 XGL"}, \ - {0x10DE, 0x0259, NV20, "NVidia Quadro4 750 XGL"}, \ - {0x10DE, 0x025B, NV20, "NVidia Quadro4 700 XGL"}, \ - {0x10DE, 0x0280, NV20, "NVidia GeForce4 Ti 4800"}, \ - {0x10DE, 0x0281, NV20, "NVidia GeForce4 Ti 4200 with AGP8X"}, \ - {0x10DE, 0x0282, NV20, "NVidia GeForce4 Ti 4800 SE"}, \ - {0x10DE, 0x0286, NV20, "NVidia GeForce4 4200 Go"}, \ - {0x10DE, 0x028C, NV20, "NVidia Quadro4 700 GoGL"}, \ - {0x10DE, 0x0288, NV20, "NVidia Quadro4 980 XGL"}, \ - {0x10DE, 0x0289, NV20, "NVidia Quadro4 780 XGL"}, \ - {0x10DE, 0x0301, NV30, "NVidia GeForce FX 5800 Ultra"}, \ - {0x10DE, 0x0302, NV30, "NVidia GeForce FX 5800"}, \ - {0x10DE, 0x0308, NV30, "NVidia Quadro FX 2000"}, \ - {0x10DE, 0x0309, NV30, "NVidia Quadro FX 1000"}, \ - {0x10DE, 0x0311, NV30, "NVidia GeForce FX 5600 Ultra"}, \ - {0x10DE, 0x0312, NV30, "NVidia GeForce FX 5600"}, \ - {0x10DE, 0x0313, NV30, "NVidia 0x0313"}, \ - {0x10DE, 0x0314, NV30, "NVidia GeForce FX 5600SE"}, \ - {0x10DE, 0x0316, NV30, "NVidia 0x0316"}, \ - {0x10DE, 0x0317, NV30, "NVidia 0x0317"}, \ - {0x10DE, 0x031A, NV30, "NVidia GeForce FX Go5600"}, \ - {0x10DE, 0x031B, NV30, "NVidia GeForce FX Go5650"}, \ - {0x10DE, 0x031C, NV30, "NVidia Quadro FX Go700"}, \ - {0x10DE, 0x031D, NV30, "NVidia 0x031D"}, \ - {0x10DE, 0x031E, NV30, "NVidia 0x031E"}, \ - {0x10DE, 0x031F, NV30, "NVidia 0x031F"}, \ - {0x10DE, 0x0320, NV30, "NVidia GeForce FX 5200"}, \ - {0x10DE, 0x0321, NV30, "NVidia GeForce FX 5200 Ultra"}, \ - {0x10DE, 0x0322, NV30, "NVidia GeForce FX 5200"}, \ - {0x10DE, 0x0323, NV30, "NVidia GeForce FX 5200SE"}, \ - {0x10DE, 0x0324, NV30, "NVidia GeForce FX Go5200"}, \ - {0x10DE, 0x0325, NV30, "NVidia GeForce FX Go5250"}, \ - {0x10DE, 0x0326, NV30, "NVidia GeForce FX 5500"}, \ - {0x10DE, 0x0327, NV30, "NVidia GeForce FX 5100"}, \ - {0x10DE, 0x0328, NV30, "NVidia GeForce FX Go5200 32M/64M"}, \ - {0x10DE, 0x0329, NV30, "NVidia GeForce FX 5200 (Mac)"}, \ - {0x10DE, 0x032A, NV30, "NVidia Quadro NVS 280 PCI"}, \ - {0x10DE, 0x032B, NV30, "NVidia Quadro FX 500/600 PCI"}, \ - {0x10DE, 0x032C, NV30, "NVidia GeForce FX Go53xx Series"}, \ - {0x10DE, 0x032D, NV30, "NVidia GeForce FX Go5100"}, \ - {0x10DE, 0x032F, NV30, "NVidia 0x032F"}, \ - {0x10DE, 0x0330, NV30, "NVidia GeForce FX 5900 Ultra"}, \ - {0x10DE, 0x0331, NV30, "NVidia GeForce FX 5900"}, \ - {0x10DE, 0x0332, NV30, "NVidia GeForce FX 5900XT"}, \ - {0x10DE, 0x0333, NV30, "NVidia GeForce FX 5950 Ultra"}, \ - {0x10DE, 0x033F, NV30, "NVidia Quadro FX 700"}, \ - {0x10DE, 0x0334, NV30, "NVidia GeForce FX 5900ZT"}, \ - {0x10DE, 0x0338, NV30, "NVidia Quadro FX 3000"}, \ - {0x10DE, 0x0341, NV30, "NVidia GeForce FX 5700 Ultra"}, \ - {0x10DE, 0x0342, NV30, "NVidia GeForce FX 5700"}, \ - {0x10DE, 0x0343, NV30, "NVidia GeForce FX 5700LE"}, \ - {0x10DE, 0x0344, NV30, "NVidia GeForce FX 5700VE"}, \ - {0x10DE, 0x0345, NV30, "NVidia 0x0345"}, \ - {0x10DE, 0x0347, NV30, "NVidia GeForce FX Go5700"}, \ - {0x10DE, 0x0348, NV30, "NVidia GeForce FX Go5700"}, \ - {0x10DE, 0x0349, NV30, "NVidia 0x0349"}, \ - {0x10DE, 0x034B, NV30, "NVidia 0x034B"}, \ - {0x10DE, 0x034C, NV30, "NVidia Quadro FX Go1000"}, \ - {0x10DE, 0x034E, NV30, "NVidia Quadro FX 1100"}, \ - {0x10DE, 0x034F, NV30, "NVidia 0x034F"}, \ - {0x10DE, 0x0040, NV40, "NVidia GeForce 6800 Ultra"}, \ - {0x10DE, 0x0041, NV40, "NVidia GeForce 6800"}, \ - {0x10DE, 0x0042, NV40, "NVidia GeForce 6800 LE"}, \ - {0x10DE, 0x0043, NV40, "NVidia 0x0043"}, \ - {0x10DE, 0x0045, NV40, "NVidia GeForce 6800 GT"}, \ - {0x10DE, 0x0046, NV40, "NVidia GeForce 6800 GT"}, \ - {0x10DE, 0x0049, NV40, "NVidia 0x0049"}, \ - {0x10DE, 0x004E, NV40, "NVidia Quadro FX 4000"}, \ - {0x10DE, 0x00C0, NV40, "NVidia 0x00C0"}, \ - {0x10DE, 0x00C1, NV40, "NVidia GeForce 6800"}, \ - {0x10DE, 0x00C2, NV40, "NVidia GeForce 6800 LE"}, \ - {0x10DE, 0x00C8, NV40, "NVidia GeForce Go 6800"}, \ - {0x10DE, 0x00C9, NV40, "NVidia GeForce Go 6800 Ultra"}, \ - {0x10DE, 0x00CC, NV40, "NVidia Quadro FX Go1400"}, \ - {0x10DE, 0x00CD, NV40, "NVidia Quadro FX 3450/4000 SDI"}, \ - {0x10DE, 0x00CE, NV40, "NVidia Quadro FX 1400"}, \ - {0x10de, 0x00f0, NV40, "Nvidia GeForce 6600 GT"}, \ - {0x10de, 0x00f1, NV40, "Nvidia GeForce 6600 GT"}, \ - {0x10DE, 0x0140, NV40, "NVidia GeForce 6600 GT"}, \ - {0x10DE, 0x0141, NV40, "NVidia GeForce 6600"}, \ - {0x10DE, 0x0142, NV40, "NVidia GeForce 6600 LE"}, \ - {0x10DE, 0x0143, NV40, "NVidia 0x0143"}, \ - {0x10DE, 0x0144, NV40, "NVidia GeForce Go 6600"}, \ - {0x10DE, 0x0145, NV40, "NVidia GeForce 6610 XL"}, \ - {0x10DE, 0x0146, NV40, "NVidia GeForce Go 6600 TE/6200 TE"}, \ - {0x10DE, 0x0147, NV40, "NVidia GeForce 6700 XL"}, \ - {0x10DE, 0x0148, NV40, "NVidia GeForce Go 6600"}, \ - {0x10DE, 0x0149, NV40, "NVidia GeForce Go 6600 GT"}, \ - {0x10DE, 0x014B, NV40, "NVidia 0x014B"}, \ - {0x10DE, 0x014C, NV40, "NVidia 0x014C"}, \ - {0x10DE, 0x014D, NV40, "NVidia 0x014D"}, \ - {0x10DE, 0x014E, NV40, "NVidia Quadro FX 540"}, \ - {0x10DE, 0x014F, NV40, "NVidia GeForce 6200"}, \ - {0x10DE, 0x0160, NV40, "NVidia 0x0160"}, \ - {0x10DE, 0x0161, NV40, "NVidia GeForce 6200 TurboCache(TM)"}, \ - {0x10DE, 0x0162, NV40, "NVidia GeForce 6200SE TurboCache(TM)"}, \ - {0x10DE, 0x0163, NV40, "NVidia 0x0163"}, \ - {0x10DE, 0x0164, NV40, "NVidia GeForce Go 6200"}, \ - {0x10DE, 0x0165, NV40, "NVidia Quadro NVS 285"}, \ - {0x10DE, 0x0166, NV40, "NVidia GeForce Go 6400"}, \ - {0x10DE, 0x0167, NV40, "NVidia GeForce Go 6200"}, \ - {0x10DE, 0x0168, NV40, "NVidia GeForce Go 6400"}, \ - {0x10DE, 0x0169, NV40, "NVidia 0x0169"}, \ - {0x10DE, 0x016B, NV40, "NVidia 0x016B"}, \ - {0x10DE, 0x016C, NV40, "NVidia 0x016C"}, \ - {0x10DE, 0x016D, NV40, "NVidia 0x016D"}, \ - {0x10DE, 0x016E, NV40, "NVidia 0x016E"}, \ - {0x10DE, 0x0210, NV40, "NVidia 0x0210"}, \ - {0x10DE, 0x0211, NV40, "NVidia GeForce 6800"}, \ - {0x10DE, 0x0212, NV40, "NVidia GeForce 6800 LE"}, \ - {0x10DE, 0x0215, NV40, "NVidia GeForce 6800 GT"}, \ - {0x10DE, 0x0220, NV40, "NVidia 0x0220"}, \ - {0x10DE, 0x0221, NV40, "NVidia GeForce 6200"}, \ - {0x10DE, 0x0222, NV40, "NVidia 0x0222"}, \ - {0x10DE, 0x0228, NV40, "NVidia 0x0228"}, \ - {0x10DE, 0x0090, NV40, "NVidia 0x0090"}, \ - {0x10DE, 0x0091, NV40, "NVidia GeForce 7800 GTX"}, \ - {0x10DE, 0x0092, NV40, "NVidia 0x0092"}, \ - {0x10DE, 0x0093, NV40, "NVidia 0x0093"}, \ - {0x10DE, 0x0094, NV40, "NVidia 0x0094"}, \ - {0x10DE, 0x0098, NV40, "NVidia 0x0098"}, \ - {0x10DE, 0x0099, NV40, "NVidia GeForce Go 7800 GTX"}, \ - {0x10DE, 0x009C, NV40, "NVidia 0x009C"}, \ - {0x10DE, 0x009D, NV40, "NVidia Quadro FX 4500"}, \ - {0x10DE, 0x009E, NV40, "NVidia 0x009E"}, \ - {0, 0, 0, NULL} - -#define xgi_PCI_IDS \ - {0x18ca, 0x2200, 0, "XP5"}, \ - {0x18ca, 0x0047, 0, "XP10 / XG47"}, \ - {0, 0, 0, NULL} diff --git a/sys/dev/drm/drm_sarea.h b/sys/dev/drm/drm_sarea.h deleted file mode 100644 index bb957594dbfc..000000000000 --- a/sys/dev/drm/drm_sarea.h +++ /dev/null @@ -1,85 +0,0 @@ -/** - * \file drm_sarea.h - * \brief SAREA definitions - * - * \author Michel D�zer <michel@daenzer.net> - */ - -/*- - * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef _DRM_SAREA_H_ -#define _DRM_SAREA_H_ - -#include "dev/drm/drm.h" - -/* SAREA area needs to be at least a page */ -#if defined(__alpha__) -#define SAREA_MAX 0x2000 -#else -/* Intel 830M driver needs at least 8k SAREA */ -#define SAREA_MAX 0x2000UL -#endif - -/** Maximum number of drawables in the SAREA */ -#define SAREA_MAX_DRAWABLES 256 - -#define SAREA_DRAWABLE_CLAIMED_ENTRY 0x80000000 - -/** SAREA drawable */ -struct drm_sarea_drawable { - unsigned int stamp; - unsigned int flags; -}; - -/** SAREA frame */ -struct drm_sarea_frame { - unsigned int x; - unsigned int y; - unsigned int width; - unsigned int height; - unsigned int fullscreen; -}; - -/** SAREA */ -struct drm_sarea { - /** first thing is always the DRM locking structure */ - struct drm_hw_lock lock; - /** \todo Use readers/writer lock for drm_sarea::drawable_lock */ - struct drm_hw_lock drawable_lock; - struct drm_sarea_drawable drawableTable[SAREA_MAX_DRAWABLES]; /**< drawables */ - struct drm_sarea_frame frame; /**< frame */ - drm_context_t dummy_context; -}; - -#ifndef __KERNEL__ -typedef struct drm_sarea_drawable drm_sarea_drawable_t; -typedef struct drm_sarea_frame drm_sarea_frame_t; -typedef struct drm_sarea drm_sarea_t; -#endif - -#endif /* _DRM_SAREA_H_ */ diff --git a/sys/dev/drm/drm_scatter.c b/sys/dev/drm/drm_scatter.c deleted file mode 100644 index 9b02d1a69c55..000000000000 --- a/sys/dev/drm/drm_scatter.c +++ /dev/null @@ -1,129 +0,0 @@ -/*- - * Copyright (c) 2009 Robert C. Noland III <rnoland@FreeBSD.org> - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_scatter.c - * Allocation of memory for scatter-gather mappings by the graphics chip. - * The memory allocated here is then made into an aperture in the card - * by mapping the pages into the GART. - */ - -#include "dev/drm/drmP.h" - -int -drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather *request) -{ - struct drm_sg_mem *entry; - vm_size_t size; - vm_pindex_t pindex; - - if (dev->sg) - return EINVAL; - - DRM_DEBUG("request size=%ld\n", request->size); - - entry = malloc(sizeof(*entry), DRM_MEM_DRIVER, M_WAITOK | M_ZERO); - - size = round_page(request->size); - entry->pages = atop(size); - entry->busaddr = malloc(entry->pages * sizeof(*entry->busaddr), - DRM_MEM_SGLISTS, M_WAITOK | M_ZERO); - - entry->vaddr = kmem_alloc_attr(size, M_WAITOK | M_ZERO, 0, - BUS_SPACE_MAXADDR_32BIT, VM_MEMATTR_WRITE_COMBINING); - if (entry->vaddr == 0) { - drm_sg_cleanup(entry); - return (ENOMEM); - } - - for(pindex = 0; pindex < entry->pages; pindex++) { - entry->busaddr[pindex] = - vtophys(entry->vaddr + IDX_TO_OFF(pindex)); - } - - DRM_LOCK(); - if (dev->sg) { - DRM_UNLOCK(); - drm_sg_cleanup(entry); - return (EINVAL); - } - dev->sg = entry; - DRM_UNLOCK(); - - request->handle = entry->vaddr; - - DRM_DEBUG("allocated %ju pages @ 0x%08zx, contents=%08lx\n", - entry->pages, entry->vaddr, *(unsigned long *)entry->vaddr); - - return (0); -} - -int -drm_sg_alloc_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_scatter_gather *request = data; - - DRM_DEBUG("\n"); - - return (drm_sg_alloc(dev, request)); -} - -void -drm_sg_cleanup(struct drm_sg_mem *entry) -{ - if (entry == NULL) - return; - - if (entry->vaddr != 0) - kmem_free(entry->vaddr, IDX_TO_OFF(entry->pages)); - - free(entry->busaddr, DRM_MEM_SGLISTS); - free(entry, DRM_MEM_DRIVER); - - return; -} - -int -drm_sg_free(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_scatter_gather *request = data; - struct drm_sg_mem *entry; - - DRM_LOCK(); - entry = dev->sg; - dev->sg = NULL; - DRM_UNLOCK(); - - if (!entry || entry->vaddr != request->handle) - return (EINVAL); - - DRM_DEBUG("free 0x%zx\n", entry->vaddr); - - drm_sg_cleanup(entry); - - return (0); -} diff --git a/sys/dev/drm/drm_sman.c b/sys/dev/drm/drm_sman.c deleted file mode 100644 index 32f9eb9e4655..000000000000 --- a/sys/dev/drm/drm_sman.c +++ /dev/null @@ -1,352 +0,0 @@ -/************************************************************************** - * - * Copyright 2006 Tungsten Graphics, Inc., Bismarck., ND., USA. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * - **************************************************************************/ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Simple memory manager interface that keeps track on allocate regions on a - * per "owner" basis. All regions associated with an "owner" can be released - * with a simple call. Typically if the "owner" exists. The owner is any - * "unsigned long" identifier. Can typically be a pointer to a file private - * struct or a context identifier. - * - * Authors: - * Thomas Hellström <thomas-at-tungstengraphics-dot-com> - */ - -#include "dev/drm/drmP.h" -#include "dev/drm/drm_sman.h" - -struct drm_owner_item { - struct drm_hash_item owner_hash; - struct list_head sman_list; - struct list_head mem_blocks; -}; - -void drm_sman_takedown(struct drm_sman * sman) -{ - drm_ht_remove(&sman->user_hash_tab); - drm_ht_remove(&sman->owner_hash_tab); - if (sman->mm) - drm_free(sman->mm, sman->num_managers * sizeof(*sman->mm), - DRM_MEM_MM); -} - -int -drm_sman_init(struct drm_sman * sman, unsigned int num_managers, - unsigned int user_order, unsigned int owner_order) -{ - int ret = 0; - - sman->mm = (struct drm_sman_mm *) drm_calloc(num_managers, - sizeof(*sman->mm), DRM_MEM_MM); - if (!sman->mm) { - ret = -ENOMEM; - goto out; - } - sman->num_managers = num_managers; - INIT_LIST_HEAD(&sman->owner_items); - ret = drm_ht_create(&sman->owner_hash_tab, owner_order); - if (ret) - goto out1; - ret = drm_ht_create(&sman->user_hash_tab, user_order); - if (!ret) - goto out; - - drm_ht_remove(&sman->owner_hash_tab); -out1: - drm_free(sman->mm, num_managers * sizeof(*sman->mm), DRM_MEM_MM); -out: - return ret; -} - -static void *drm_sman_mm_allocate(void *private, unsigned long size, - unsigned alignment) -{ - struct drm_mm *mm = (struct drm_mm *) private; - struct drm_mm_node *tmp; - - tmp = drm_mm_search_free(mm, size, alignment, 1); - if (!tmp) { - return NULL; - } - /* This could be non-atomic, but we are called from a locked path */ - tmp = drm_mm_get_block_atomic(tmp, size, alignment); - return tmp; -} - -static void drm_sman_mm_free(void *private, void *ref) -{ - struct drm_mm_node *node = (struct drm_mm_node *) ref; - - drm_mm_put_block(node); -} - -static void drm_sman_mm_destroy(void *private) -{ - struct drm_mm *mm = (struct drm_mm *) private; - drm_mm_takedown(mm); - drm_free(mm, sizeof(*mm), DRM_MEM_MM); -} - -static unsigned long drm_sman_mm_offset(void *private, void *ref) -{ - struct drm_mm_node *node = (struct drm_mm_node *) ref; - return node->start; -} - -int -drm_sman_set_range(struct drm_sman * sman, unsigned int manager, - unsigned long start, unsigned long size) -{ - struct drm_sman_mm *sman_mm; - struct drm_mm *mm; - int ret; - - KASSERT(manager < sman->num_managers, ("Invalid manager")); - - sman_mm = &sman->mm[manager]; - mm = malloc(sizeof(*mm), DRM_MEM_MM, M_NOWAIT | M_ZERO); - if (!mm) { - return -ENOMEM; - } - sman_mm->private = mm; - ret = drm_mm_init(mm, start, size); - - if (ret) { - drm_free(mm, sizeof(*mm), DRM_MEM_MM); - return ret; - } - - sman_mm->allocate = drm_sman_mm_allocate; - sman_mm->free = drm_sman_mm_free; - sman_mm->destroy = drm_sman_mm_destroy; - sman_mm->offset = drm_sman_mm_offset; - - return 0; -} - -int -drm_sman_set_manager(struct drm_sman * sman, unsigned int manager, - struct drm_sman_mm * allocator) -{ - KASSERT(manager < sman->num_managers, ("Invalid manager")); - sman->mm[manager] = *allocator; - - return 0; -} - -static struct drm_owner_item *drm_sman_get_owner_item(struct drm_sman * sman, - unsigned long owner) -{ - int ret; - struct drm_hash_item *owner_hash_item; - struct drm_owner_item *owner_item; - - ret = drm_ht_find_item(&sman->owner_hash_tab, owner, &owner_hash_item); - if (!ret) { - return drm_hash_entry(owner_hash_item, struct drm_owner_item, - owner_hash); - } - - owner_item = malloc(sizeof(*owner_item), DRM_MEM_MM, M_NOWAIT | M_ZERO); - if (!owner_item) - goto out; - - INIT_LIST_HEAD(&owner_item->mem_blocks); - owner_item->owner_hash.key = owner; - DRM_DEBUG("owner_item = %p, mem_blocks = %p\n", owner_item, &owner_item->mem_blocks); - if (drm_ht_insert_item(&sman->owner_hash_tab, &owner_item->owner_hash)) - goto out1; - - list_add_tail(&owner_item->sman_list, &sman->owner_items); - return owner_item; - -out1: - drm_free(owner_item, sizeof(*owner_item), DRM_MEM_MM); -out: - return NULL; -} - -struct drm_memblock_item *drm_sman_alloc(struct drm_sman *sman, unsigned int manager, - unsigned long size, unsigned alignment, - unsigned long owner) -{ - void *tmp; - struct drm_sman_mm *sman_mm; - struct drm_owner_item *owner_item; - struct drm_memblock_item *memblock; - - KASSERT(manager < sman->num_managers, ("Invalid manager")); - - sman_mm = &sman->mm[manager]; - tmp = sman_mm->allocate(sman_mm->private, size, alignment); - if (!tmp) { - return NULL; - } - - memblock = malloc(sizeof(*memblock), DRM_MEM_MM, M_NOWAIT | M_ZERO); - DRM_DEBUG("allocated mem_block %p\n", memblock); - if (!memblock) - goto out; - - memblock->mm_info = tmp; - memblock->mm = sman_mm; - memblock->sman = sman; - INIT_LIST_HEAD(&memblock->owner_list); - - if (drm_ht_just_insert_please - (&sman->user_hash_tab, &memblock->user_hash, - (unsigned long)memblock, 32, 0, 0)) - goto out1; - - owner_item = drm_sman_get_owner_item(sman, owner); - if (!owner_item) - goto out2; - - DRM_DEBUG("owner_item = %p, mem_blocks = %p\n", owner_item, &owner_item->mem_blocks); - DRM_DEBUG("owner_list.prev = %p, mem_blocks.prev = %p\n", memblock->owner_list.prev, owner_item->mem_blocks.prev); - DRM_DEBUG("owner_list.next = %p, mem_blocks.next = %p\n", memblock->owner_list.next, owner_item->mem_blocks.next); - list_add_tail(&memblock->owner_list, &owner_item->mem_blocks); - - DRM_DEBUG("Complete\n"); - return memblock; - -out2: - drm_ht_remove_item(&sman->user_hash_tab, &memblock->user_hash); -out1: - drm_free(memblock, sizeof(*memblock), DRM_MEM_MM); -out: - sman_mm->free(sman_mm->private, tmp); - - return NULL; -} - -static void drm_sman_free(struct drm_memblock_item *item) -{ - struct drm_sman *sman = item->sman; - - list_del(&item->owner_list); - drm_ht_remove_item(&sman->user_hash_tab, &item->user_hash); - item->mm->free(item->mm->private, item->mm_info); - drm_free(item, sizeof(*item), DRM_MEM_MM); -} - -int drm_sman_free_key(struct drm_sman *sman, unsigned int key) -{ - struct drm_hash_item *hash_item; - struct drm_memblock_item *memblock_item; - - if (drm_ht_find_item(&sman->user_hash_tab, key, &hash_item)) - return -EINVAL; - - memblock_item = drm_hash_entry(hash_item, struct drm_memblock_item, - user_hash); - drm_sman_free(memblock_item); - return 0; -} - -static void drm_sman_remove_owner(struct drm_sman *sman, - struct drm_owner_item *owner_item) -{ - list_del(&owner_item->sman_list); - drm_ht_remove_item(&sman->owner_hash_tab, &owner_item->owner_hash); - drm_free(owner_item, sizeof(*owner_item), DRM_MEM_MM); -} - -int drm_sman_owner_clean(struct drm_sman *sman, unsigned long owner) -{ - - struct drm_hash_item *hash_item; - struct drm_owner_item *owner_item; - - if (drm_ht_find_item(&sman->owner_hash_tab, owner, &hash_item)) { - return -1; - } - - owner_item = drm_hash_entry(hash_item, struct drm_owner_item, owner_hash); - DRM_DEBUG("cleaning owner_item %p\n", owner_item); - if (owner_item->mem_blocks.next == &owner_item->mem_blocks) { - drm_sman_remove_owner(sman, owner_item); - return -1; - } - - return 0; -} - -static void drm_sman_do_owner_cleanup(struct drm_sman *sman, - struct drm_owner_item *owner_item) -{ - struct drm_memblock_item *entry, *next; - - list_for_each_entry_safe(entry, next, &owner_item->mem_blocks, - owner_list) { - DRM_DEBUG("freeing mem_block %p\n", entry); - drm_sman_free(entry); - } - drm_sman_remove_owner(sman, owner_item); -} - -void drm_sman_owner_cleanup(struct drm_sman *sman, unsigned long owner) -{ - - struct drm_hash_item *hash_item; - struct drm_owner_item *owner_item; - - if (drm_ht_find_item(&sman->owner_hash_tab, owner, &hash_item)) { - - return; - } - - owner_item = drm_hash_entry(hash_item, struct drm_owner_item, owner_hash); - drm_sman_do_owner_cleanup(sman, owner_item); -} - -void drm_sman_cleanup(struct drm_sman *sman) -{ - struct drm_owner_item *entry, *next; - unsigned int i; - struct drm_sman_mm *sman_mm; - - DRM_DEBUG("sman = %p, owner_items = %p\n", - sman, &sman->owner_items); - list_for_each_entry_safe(entry, next, &sman->owner_items, sman_list) { - DRM_DEBUG("cleaning owner_item = %p\n", entry); - drm_sman_do_owner_cleanup(sman, entry); - } - if (sman->mm) { - for (i = 0; i < sman->num_managers; ++i) { - sman_mm = &sman->mm[i]; - if (sman_mm->private) { - sman_mm->destroy(sman_mm->private); - sman_mm->private = NULL; - } - } - } -} diff --git a/sys/dev/drm/drm_sman.h b/sys/dev/drm/drm_sman.h deleted file mode 100644 index 28eb8817b989..000000000000 --- a/sys/dev/drm/drm_sman.h +++ /dev/null @@ -1,181 +0,0 @@ -/************************************************************************** - * - * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * - **************************************************************************/ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Simple memory MANager interface that keeps track on allocate regions on a - * per "owner" basis. All regions associated with an "owner" can be released - * with a simple call. Typically if the "owner" exists. The owner is any - * "unsigned long" identifier. Can typically be a pointer to a file private - * struct or a context identifier. - * - * Authors: - * Thomas Hellström <thomas-at-tungstengraphics-dot-com> - */ - -#ifndef DRM_SMAN_H -#define DRM_SMAN_H - -#include "dev/drm/drm_hashtab.h" -#include "dev/drm/drm_linux_list.h" -#include "dev/drm/drm_mm.h" - -/* - * A class that is an abstration of a simple memory allocator. - * The sman implementation provides a default such allocator - * using the drm_mm.c implementation. But the user can replace it. - * See the SiS implementation, which may use the SiS FB kernel module - * for memory management. - */ - -struct drm_sman_mm { - /* private info. If allocated, needs to be destroyed by the destroy - function */ - void *private; - - /* Allocate a memory block with given size and alignment. - Return an opaque reference to the memory block */ - - void *(*allocate) (void *private, unsigned long size, - unsigned alignment); - - /* Free a memory block. "ref" is the opaque reference that we got from - the "alloc" function */ - - void (*free) (void *private, void *ref); - - /* Free all resources associated with this allocator */ - - void (*destroy) (void *private); - - /* Return a memory offset from the opaque reference returned from the - "alloc" function */ - - unsigned long (*offset) (void *private, void *ref); -}; - -struct drm_memblock_item { - struct list_head owner_list; - struct drm_hash_item user_hash; - void *mm_info; - struct drm_sman_mm *mm; - struct drm_sman *sman; -}; - -struct drm_sman { - struct drm_sman_mm *mm; - int num_managers; - struct drm_open_hash owner_hash_tab; - struct drm_open_hash user_hash_tab; - struct list_head owner_items; -}; - -/* - * Take down a memory manager. This function should only be called after a - * successful init and after a call to drm_sman_cleanup. - */ - -extern void drm_sman_takedown(struct drm_sman * sman); - -/* - * Allocate structures for a manager. - * num_managers are the number of memory pools to manage. (VRAM, AGP, ....) - * user_order is the log2 of the number of buckets in the user hash table. - * set this to approximately log2 of the max number of memory regions - * that will be allocated for _all_ pools together. - * owner_order is the log2 of the number of buckets in the owner hash table. - * set this to approximately log2 of - * the number of client file connections that will - * be using the manager. - * - */ - -extern int drm_sman_init(struct drm_sman * sman, unsigned int num_managers, - unsigned int user_order, unsigned int owner_order); - -/* - * Initialize a drm_mm.c allocator. Should be called only once for each - * manager unless a customized allogator is used. - */ - -extern int drm_sman_set_range(struct drm_sman * sman, unsigned int manager, - unsigned long start, unsigned long size); - -/* - * Initialize a customized allocator for one of the managers. - * (See the SiS module). The object pointed to by "allocator" is copied, - * so it can be destroyed after this call. - */ - -extern int drm_sman_set_manager(struct drm_sman * sman, unsigned int mananger, - struct drm_sman_mm * allocator); - -/* - * Allocate a memory block. Aligment is not implemented yet. - */ - -extern struct drm_memblock_item *drm_sman_alloc(struct drm_sman * sman, - unsigned int manager, - unsigned long size, - unsigned alignment, - unsigned long owner); -/* - * Free a memory block identified by its user hash key. - */ - -extern int drm_sman_free_key(struct drm_sman * sman, unsigned int key); - -/* - * returns 1 iff there are no stale memory blocks associated with this owner. - * Typically called to determine if we need to idle the hardware and call - * drm_sman_owner_cleanup. If there are no stale memory blocks, it removes all - * resources associated with owner. - */ - -extern int drm_sman_owner_clean(struct drm_sman * sman, unsigned long owner); - -/* - * Frees all stale memory blocks associated with this owner. Note that this - * requires that the hardware is finished with all blocks, so the graphics engine - * should be idled before this call is made. This function also frees - * any resources associated with "owner" and should be called when owner - * is not going to be referenced anymore. - */ - -extern void drm_sman_owner_cleanup(struct drm_sman * sman, unsigned long owner); - -/* - * Frees all stale memory blocks associated with the memory manager. - * See idling above. - */ - -extern void drm_sman_cleanup(struct drm_sman * sman); - -#endif diff --git a/sys/dev/drm/drm_sysctl.c b/sys/dev/drm/drm_sysctl.c deleted file mode 100644 index 2a138e88a73b..000000000000 --- a/sys/dev/drm/drm_sysctl.c +++ /dev/null @@ -1,343 +0,0 @@ -/*- - * Copyright 2003 Eric Anholt - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_sysctl.c - * Implementation of various sysctls for controlling DRM behavior and reporting - * debug information. - */ - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" - -#include <sys/sysctl.h> - -static int drm_name_info DRM_SYSCTL_HANDLER_ARGS; -static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS; -static int drm_clients_info DRM_SYSCTL_HANDLER_ARGS; -static int drm_bufs_info DRM_SYSCTL_HANDLER_ARGS; -static int drm_vblank_info DRM_SYSCTL_HANDLER_ARGS; - -struct drm_sysctl_list { - const char *name; - int (*f) DRM_SYSCTL_HANDLER_ARGS; -} drm_sysctl_list[] = { - {"name", drm_name_info}, - {"vm", drm_vm_info}, - {"clients", drm_clients_info}, - {"bufs", drm_bufs_info}, - {"vblank", drm_vblank_info}, -}; -#define DRM_SYSCTL_ENTRIES (sizeof(drm_sysctl_list)/sizeof(drm_sysctl_list[0])) - -struct drm_sysctl_info { - struct sysctl_ctx_list ctx; - char name[2]; -}; - -int drm_sysctl_init(struct drm_device *dev) -{ - struct drm_sysctl_info *info; - struct sysctl_oid *oid; - struct sysctl_oid *top, *drioid; - int i; - - info = malloc(sizeof *info, DRM_MEM_DRIVER, M_WAITOK | M_ZERO); - if ( !info ) - return 1; - dev->sysctl = info; - - /* Add the sysctl node for DRI if it doesn't already exist */ - drioid = SYSCTL_ADD_NODE(&info->ctx, SYSCTL_CHILDREN(&sysctl___hw), OID_AUTO, "dri", CTLFLAG_RW, NULL, "DRI Graphics"); - if (!drioid) - return 1; - - /* Find the next free slot under hw.dri */ - i = 0; - SLIST_FOREACH(oid, SYSCTL_CHILDREN(drioid), oid_link) { - if (i <= oid->oid_arg2) - i = oid->oid_arg2 + 1; - } - if (i>9) - return 1; - - /* Add the hw.dri.x for our device */ - info->name[0] = '0' + i; - info->name[1] = 0; - top = SYSCTL_ADD_NODE( &info->ctx, SYSCTL_CHILDREN(drioid), OID_AUTO, info->name, CTLFLAG_RW, NULL, NULL); - if (!top) - return 1; - - for (i = 0; i < DRM_SYSCTL_ENTRIES; i++) { - oid = SYSCTL_ADD_OID(&info->ctx, - SYSCTL_CHILDREN(top), - OID_AUTO, - drm_sysctl_list[i].name, - CTLTYPE_STRING | CTLFLAG_RD, - dev, - 0, - drm_sysctl_list[i].f, - "A", - NULL); - if (!oid) - return 1; - } - SYSCTL_ADD_INT(&info->ctx, SYSCTL_CHILDREN(top), OID_AUTO, "debug", - CTLFLAG_RW, &drm_debug_flag, sizeof(drm_debug_flag), - "Enable debugging output"); - - return 0; -} - -int drm_sysctl_cleanup(struct drm_device *dev) -{ - int error; - error = sysctl_ctx_free( &dev->sysctl->ctx ); - - free(dev->sysctl, DRM_MEM_DRIVER); - dev->sysctl = NULL; - - return error; -} - -#define DRM_SYSCTL_PRINT(fmt, arg...) \ -do { \ - snprintf(buf, sizeof(buf), fmt, ##arg); \ - retcode = SYSCTL_OUT(req, buf, strlen(buf)); \ - if (retcode) \ - goto done; \ -} while (0) - -static int drm_name_info DRM_SYSCTL_HANDLER_ARGS -{ - struct drm_device *dev = arg1; - char buf[128]; - int retcode; - int hasunique = 0; - - DRM_SYSCTL_PRINT("%s 0x%jx", dev->driver->name, - (uintmax_t)dev2udev(dev->devnode)); - - DRM_LOCK(); - if (dev->unique) { - snprintf(buf, sizeof(buf), " %s", dev->unique); - hasunique = 1; - } - DRM_UNLOCK(); - - if (hasunique) - SYSCTL_OUT(req, buf, strlen(buf)); - - SYSCTL_OUT(req, "", 1); - -done: - return retcode; -} - -static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS -{ - struct drm_device *dev = arg1; - drm_local_map_t *map, *tempmaps; - const char *types[] = { "FB", "REG", "SHM", "AGP", "SG" }; - const char *type, *yesno; - int i, mapcount; - char buf[128]; - int retcode; - - /* We can't hold the lock while doing SYSCTL_OUTs, so allocate a - * temporary copy of all the map entries and then SYSCTL_OUT that. - */ - DRM_LOCK(); - - mapcount = 0; - TAILQ_FOREACH(map, &dev->maplist, link) - mapcount++; - - tempmaps = malloc(sizeof(drm_local_map_t) * mapcount, DRM_MEM_DRIVER, - M_NOWAIT); - if (tempmaps == NULL) { - DRM_UNLOCK(); - return ENOMEM; - } - - i = 0; - TAILQ_FOREACH(map, &dev->maplist, link) - tempmaps[i++] = *map; - - DRM_UNLOCK(); - - DRM_SYSCTL_PRINT("\nslot offset size " - "type flags address handle mtrr\n"); - - for (i = 0; i < mapcount; i++) { - map = &tempmaps[i]; - - if (map->type > 4) - type = "??"; - else - type = types[map->type]; - - if (!map->mtrr) - yesno = "no"; - else - yesno = "yes"; - - DRM_SYSCTL_PRINT( - "%4d 0x%016lx 0x%08lx %4.4s 0x%02x 0x%016lx %6d %s\n", - i, map->offset, map->size, type, map->flags, - (unsigned long)map->virtual, - (unsigned int)((unsigned long)map->handle >> - DRM_MAP_HANDLE_SHIFT), yesno); - } - SYSCTL_OUT(req, "", 1); - -done: - free(tempmaps, DRM_MEM_DRIVER); - return retcode; -} - -static int drm_bufs_info DRM_SYSCTL_HANDLER_ARGS -{ - struct drm_device *dev = arg1; - drm_device_dma_t *dma = dev->dma; - drm_device_dma_t tempdma; - int *templists; - int i; - char buf[128]; - int retcode; - - /* We can't hold the locks around DRM_SYSCTL_PRINT, so make a temporary - * copy of the whole structure and the relevant data from buflist. - */ - DRM_LOCK(); - if (dma == NULL) { - DRM_UNLOCK(); - return 0; - } - DRM_SPINLOCK(&dev->dma_lock); - tempdma = *dma; - templists = malloc(sizeof(int) * dma->buf_count, DRM_MEM_DRIVER, - M_NOWAIT); - for (i = 0; i < dma->buf_count; i++) - templists[i] = dma->buflist[i]->list; - dma = &tempdma; - DRM_SPINUNLOCK(&dev->dma_lock); - DRM_UNLOCK(); - - DRM_SYSCTL_PRINT("\n o size count free segs pages kB\n"); - for (i = 0; i <= DRM_MAX_ORDER; i++) { - if (dma->bufs[i].buf_count) - DRM_SYSCTL_PRINT("%2d %8d %5d %5d %5d %5d %5d\n", - i, - dma->bufs[i].buf_size, - dma->bufs[i].buf_count, - atomic_read(&dma->bufs[i] - .freelist.count), - dma->bufs[i].seg_count, - dma->bufs[i].seg_count - *(1 << dma->bufs[i].page_order), - (dma->bufs[i].seg_count - * (1 << dma->bufs[i].page_order)) - * (int)PAGE_SIZE / 1024); - } - DRM_SYSCTL_PRINT("\n"); - for (i = 0; i < dma->buf_count; i++) { - if (i && !(i%32)) DRM_SYSCTL_PRINT("\n"); - DRM_SYSCTL_PRINT(" %d", templists[i]); - } - DRM_SYSCTL_PRINT("\n"); - - SYSCTL_OUT(req, "", 1); -done: - free(templists, DRM_MEM_DRIVER); - return retcode; -} - -static int drm_clients_info DRM_SYSCTL_HANDLER_ARGS -{ - struct drm_device *dev = arg1; - struct drm_file *priv, *tempprivs; - char buf[128]; - int retcode; - int privcount, i; - - DRM_LOCK(); - - privcount = 0; - TAILQ_FOREACH(priv, &dev->files, link) - privcount++; - - tempprivs = malloc(sizeof(struct drm_file) * privcount, DRM_MEM_DRIVER, - M_NOWAIT); - if (tempprivs == NULL) { - DRM_UNLOCK(); - return ENOMEM; - } - i = 0; - TAILQ_FOREACH(priv, &dev->files, link) - tempprivs[i++] = *priv; - - DRM_UNLOCK(); - - DRM_SYSCTL_PRINT( - "\na dev pid uid magic ioctls\n"); - for (i = 0; i < privcount; i++) { - priv = &tempprivs[i]; - DRM_SYSCTL_PRINT("%c %-12s %5d %5d %10u %10lu\n", - priv->authenticated ? 'y' : 'n', - devtoname(priv->dev->devnode), - priv->pid, - priv->uid, - priv->magic, - priv->ioctl_count); - } - - SYSCTL_OUT(req, "", 1); -done: - free(tempprivs, DRM_MEM_DRIVER); - return retcode; -} - -static int drm_vblank_info DRM_SYSCTL_HANDLER_ARGS -{ - struct drm_device *dev = arg1; - char buf[128]; - int retcode; - int i; - - DRM_SYSCTL_PRINT("\ncrtc ref count last enabled inmodeset\n"); - for(i = 0 ; i < dev->num_crtcs ; i++) { - DRM_SYSCTL_PRINT(" %02d %02d %08d %08d %02d %02d\n", - i, atomic_load_acq_32(&dev->vblank[i].refcount), - atomic_load_acq_32(&dev->vblank[i].count), - atomic_load_acq_32(&dev->vblank[i].last), - atomic_load_acq_int(&dev->vblank[i].enabled), - atomic_load_acq_int(&dev->vblank[i].inmodeset)); - } - - SYSCTL_OUT(req, "", -1); -done: - return retcode; -} diff --git a/sys/dev/drm/drm_vm.c b/sys/dev/drm/drm_vm.c deleted file mode 100644 index 4810343b3a07..000000000000 --- a/sys/dev/drm/drm_vm.c +++ /dev/null @@ -1,133 +0,0 @@ -/*- - * Copyright 2003 Eric Anholt - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** @file drm_vm.c - * Support code for mmaping of DRM maps. - */ - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" - -int drm_mmap(struct cdev *kdev, vm_ooffset_t offset, vm_paddr_t *paddr, - int prot, vm_memattr_t *memattr) -{ - struct drm_device *dev = drm_get_device_from_kdev(kdev); - struct drm_file *file_priv = NULL; - drm_local_map_t *map; - enum drm_map_type type; - vm_paddr_t phys; - int error; - - /* d_mmap gets called twice, we can only reference file_priv during - * the first call. We need to assume that if error is EBADF the - * call was successful and the client is authenticated. - */ - error = devfs_get_cdevpriv((void **)&file_priv); - if (error == ENOENT) { - DRM_ERROR("Could not find authenticator!\n"); - return EINVAL; - } - - if (file_priv && !file_priv->authenticated) - return EACCES; - - DRM_DEBUG("called with offset %016jx\n", offset); - if (dev->dma && offset < ptoa(dev->dma->page_count)) { - drm_device_dma_t *dma = dev->dma; - - DRM_SPINLOCK(&dev->dma_lock); - - if (dma->pagelist != NULL) { - unsigned long page = offset >> PAGE_SHIFT; - unsigned long phys = dma->pagelist[page]; - - DRM_SPINUNLOCK(&dev->dma_lock); - *paddr = phys; - return 0; - } else { - DRM_SPINUNLOCK(&dev->dma_lock); - return -1; - } - } - - /* A sequential search of a linked list is - fine here because: 1) there will only be - about 5-10 entries in the list and, 2) a - DRI client only has to do this mapping - once, so it doesn't have to be optimized - for performance, even if the list was a - bit longer. - */ - DRM_LOCK(); - TAILQ_FOREACH(map, &dev->maplist, link) { - if (offset >> DRM_MAP_HANDLE_SHIFT == - (unsigned long)map->handle >> DRM_MAP_HANDLE_SHIFT) - break; - } - - if (map == NULL) { - DRM_DEBUG("Can't find map, request offset = %016jx\n", offset); - TAILQ_FOREACH(map, &dev->maplist, link) { - DRM_DEBUG("map offset = %016lx, handle = %016lx\n", - map->offset, (unsigned long)map->handle); - } - DRM_UNLOCK(); - return -1; - } - if (((map->flags & _DRM_RESTRICTED) && !DRM_SUSER(DRM_CURPROC))) { - DRM_UNLOCK(); - DRM_DEBUG("restricted map\n"); - return -1; - } - type = map->type; - DRM_UNLOCK(); - - offset = offset & ((1ULL << DRM_MAP_HANDLE_SHIFT) - 1); - - switch (type) { - case _DRM_FRAME_BUFFER: - case _DRM_AGP: - *memattr = VM_MEMATTR_WRITE_COMBINING; - /* FALLTHROUGH */ - case _DRM_REGISTERS: - phys = map->offset + offset; - break; - case _DRM_SCATTER_GATHER: - *memattr = VM_MEMATTR_WRITE_COMBINING; - /* FALLTHROUGH */ - case _DRM_CONSISTENT: - case _DRM_SHM: - phys = vtophys((char *)map->virtual + offset); - break; - default: - DRM_ERROR("bad map type %d\n", type); - return -1; /* This should never happen. */ - } - - *paddr = phys; - return 0; -} - diff --git a/sys/dev/drm/mach64_dma.c b/sys/dev/drm/mach64_dma.c deleted file mode 100644 index e35f75ccb778..000000000000 --- a/sys/dev/drm/mach64_dma.c +++ /dev/null @@ -1,1733 +0,0 @@ -/* mach64_dma.c -- DMA support for mach64 (Rage Pro) driver -*- linux-c -*- */ -/** - * \file mach64_dma.c - * DMA support for mach64 (Rage Pro) driver - * - * \author Gareth Hughes <gareth@valinux.com> - * \author Frank C. Earl <fearl@airmail.net> - * \author Leif Delgass <ldelgass@retinalburn.net> - * \author José Fonseca <j_r_fonseca@yahoo.co.uk> - */ - -/*- - * Copyright 2000 Gareth Hughes - * Copyright 2002 Frank C. Earl - * Copyright 2002-2003 Leif Delgass - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/mach64_drm.h" -#include "dev/drm/mach64_drv.h" - -/*******************************************************************/ -/** \name Engine, FIFO control */ -/*@{*/ - -/** - * Waits for free entries in the FIFO. - * - * \note Most writes to Mach64 registers are automatically routed through - * command FIFO which is 16 entry deep. Prior to writing to any draw engine - * register one has to ensure that enough FIFO entries are available by calling - * this function. Failure to do so may cause the engine to lock. - * - * \param dev_priv pointer to device private data structure. - * \param entries number of free entries in the FIFO to wait for. - * - * \returns zero on success, or -EBUSY if the timeout (specificed by - * drm_mach64_private::usec_timeout) occurs. - */ -int mach64_do_wait_for_fifo(drm_mach64_private_t *dev_priv, int entries) -{ - int slots = 0, i; - - for (i = 0; i < dev_priv->usec_timeout; i++) { - slots = (MACH64_READ(MACH64_FIFO_STAT) & MACH64_FIFO_SLOT_MASK); - if (slots <= (0x8000 >> entries)) - return 0; - DRM_UDELAY(1); - } - - DRM_INFO("failed! slots=%d entries=%d\n", slots, entries); - return -EBUSY; -} - -/** - * Wait for the draw engine to be idle. - */ -int mach64_do_wait_for_idle(drm_mach64_private_t *dev_priv) -{ - int i, ret; - - ret = mach64_do_wait_for_fifo(dev_priv, 16); - if (ret < 0) - return ret; - - for (i = 0; i < dev_priv->usec_timeout; i++) { - if (!(MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE)) - return 0; - DRM_UDELAY(1); - } - - DRM_INFO("failed! GUI_STAT=0x%08x\n", MACH64_READ(MACH64_GUI_STAT)); - mach64_dump_ring_info(dev_priv); - return -EBUSY; -} - -/** - * Wait for free entries in the ring buffer. - * - * The Mach64 bus master can be configured to act as a virtual FIFO, using a - * circular buffer (commonly referred as "ring buffer" in other drivers) with - * pointers to engine commands. This allows the CPU to do other things while - * the graphics engine is busy, i.e., DMA mode. - * - * This function should be called before writing new entries to the ring - * buffer. - * - * \param dev_priv pointer to device private data structure. - * \param n number of free entries in the ring buffer to wait for. - * - * \returns zero on success, or -EBUSY if the timeout (specificed by - * drm_mach64_private_t::usec_timeout) occurs. - * - * \sa mach64_dump_ring_info() - */ -int mach64_wait_ring(drm_mach64_private_t *dev_priv, int n) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - int i; - - for (i = 0; i < dev_priv->usec_timeout; i++) { - mach64_update_ring_snapshot(dev_priv); - if (ring->space >= n) { - if (i > 0) - DRM_DEBUG("%d usecs\n", i); - return 0; - } - DRM_UDELAY(1); - } - - /* FIXME: This is being ignored... */ - DRM_ERROR("failed!\n"); - mach64_dump_ring_info(dev_priv); - return -EBUSY; -} - -/** - * Wait until all DMA requests have been processed... - * - * \sa mach64_wait_ring() - */ -static int mach64_ring_idle(drm_mach64_private_t *dev_priv) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - u32 head; - int i; - - head = ring->head; - i = 0; - while (i < dev_priv->usec_timeout) { - mach64_update_ring_snapshot(dev_priv); - if (ring->head == ring->tail && - !(MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE)) { - if (i > 0) - DRM_DEBUG("%d usecs\n", i); - return 0; - } - if (ring->head == head) { - ++i; - } else { - head = ring->head; - i = 0; - } - DRM_UDELAY(1); - } - - DRM_INFO("failed! GUI_STAT=0x%08x\n", MACH64_READ(MACH64_GUI_STAT)); - mach64_dump_ring_info(dev_priv); - return -EBUSY; -} - -/** - * Reset the ring buffer descriptors. - * - * \sa mach64_do_engine_reset() - */ -static void mach64_ring_reset(drm_mach64_private_t *dev_priv) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - - mach64_do_release_used_buffers(dev_priv); - ring->head_addr = ring->start_addr; - ring->head = ring->tail = 0; - ring->space = ring->size; - - MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD, - ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB); - - dev_priv->ring_running = 0; -} - -/** - * Ensure the all the queued commands will be processed. - */ -int mach64_do_dma_flush(drm_mach64_private_t *dev_priv) -{ - /* FIXME: It's not necessary to wait for idle when flushing - * we just need to ensure the ring will be completely processed - * in finite time without another ioctl - */ - return mach64_ring_idle(dev_priv); -} - -/** - * Stop all DMA activity. - */ -int mach64_do_dma_idle(drm_mach64_private_t *dev_priv) -{ - int ret; - - /* wait for completion */ - if ((ret = mach64_ring_idle(dev_priv)) < 0) { - DRM_ERROR("failed BM_GUI_TABLE=0x%08x tail: %u\n", - MACH64_READ(MACH64_BM_GUI_TABLE), - dev_priv->ring.tail); - return ret; - } - - mach64_ring_stop(dev_priv); - - /* clean up after pass */ - mach64_do_release_used_buffers(dev_priv); - return 0; -} - -/** - * Reset the engine. This will stop the DMA if it is running. - */ -int mach64_do_engine_reset(drm_mach64_private_t *dev_priv) -{ - u32 tmp; - - DRM_DEBUG("\n"); - - /* Kill off any outstanding DMA transfers. - */ - tmp = MACH64_READ(MACH64_BUS_CNTL); - MACH64_WRITE(MACH64_BUS_CNTL, tmp | MACH64_BUS_MASTER_DIS); - - /* Reset the GUI engine (high to low transition). - */ - tmp = MACH64_READ(MACH64_GEN_TEST_CNTL); - MACH64_WRITE(MACH64_GEN_TEST_CNTL, tmp & ~MACH64_GUI_ENGINE_ENABLE); - /* Enable the GUI engine - */ - tmp = MACH64_READ(MACH64_GEN_TEST_CNTL); - MACH64_WRITE(MACH64_GEN_TEST_CNTL, tmp | MACH64_GUI_ENGINE_ENABLE); - - /* ensure engine is not locked up by clearing any FIFO or HOST errors - */ - tmp = MACH64_READ(MACH64_BUS_CNTL); - MACH64_WRITE(MACH64_BUS_CNTL, tmp | 0x00a00000); - - /* Once GUI engine is restored, disable bus mastering */ - MACH64_WRITE(MACH64_SRC_CNTL, 0); - - /* Reset descriptor ring */ - mach64_ring_reset(dev_priv); - - return 0; -} - -/*@}*/ - - -/*******************************************************************/ -/** \name Debugging output */ -/*@{*/ - -/** - * Dump engine registers values. - */ -void mach64_dump_engine_info(drm_mach64_private_t *dev_priv) -{ - DRM_INFO("\n"); - if (!dev_priv->is_pci) { - DRM_INFO(" AGP_BASE = 0x%08x\n", - MACH64_READ(MACH64_AGP_BASE)); - DRM_INFO(" AGP_CNTL = 0x%08x\n", - MACH64_READ(MACH64_AGP_CNTL)); - } - DRM_INFO(" ALPHA_TST_CNTL = 0x%08x\n", - MACH64_READ(MACH64_ALPHA_TST_CNTL)); - DRM_INFO("\n"); - DRM_INFO(" BM_COMMAND = 0x%08x\n", - MACH64_READ(MACH64_BM_COMMAND)); - DRM_INFO("BM_FRAME_BUF_OFFSET = 0x%08x\n", - MACH64_READ(MACH64_BM_FRAME_BUF_OFFSET)); - DRM_INFO(" BM_GUI_TABLE = 0x%08x\n", - MACH64_READ(MACH64_BM_GUI_TABLE)); - DRM_INFO(" BM_STATUS = 0x%08x\n", - MACH64_READ(MACH64_BM_STATUS)); - DRM_INFO(" BM_SYSTEM_MEM_ADDR = 0x%08x\n", - MACH64_READ(MACH64_BM_SYSTEM_MEM_ADDR)); - DRM_INFO(" BM_SYSTEM_TABLE = 0x%08x\n", - MACH64_READ(MACH64_BM_SYSTEM_TABLE)); - DRM_INFO(" BUS_CNTL = 0x%08x\n", - MACH64_READ(MACH64_BUS_CNTL)); - DRM_INFO("\n"); - /* DRM_INFO( " CLOCK_CNTL = 0x%08x\n", MACH64_READ( MACH64_CLOCK_CNTL ) ); */ - DRM_INFO(" CLR_CMP_CLR = 0x%08x\n", - MACH64_READ(MACH64_CLR_CMP_CLR)); - DRM_INFO(" CLR_CMP_CNTL = 0x%08x\n", - MACH64_READ(MACH64_CLR_CMP_CNTL)); - /* DRM_INFO( " CLR_CMP_MSK = 0x%08x\n", MACH64_READ( MACH64_CLR_CMP_MSK ) ); */ - DRM_INFO(" CONFIG_CHIP_ID = 0x%08x\n", - MACH64_READ(MACH64_CONFIG_CHIP_ID)); - DRM_INFO(" CONFIG_CNTL = 0x%08x\n", - MACH64_READ(MACH64_CONFIG_CNTL)); - DRM_INFO(" CONFIG_STAT0 = 0x%08x\n", - MACH64_READ(MACH64_CONFIG_STAT0)); - DRM_INFO(" CONFIG_STAT1 = 0x%08x\n", - MACH64_READ(MACH64_CONFIG_STAT1)); - DRM_INFO(" CONFIG_STAT2 = 0x%08x\n", - MACH64_READ(MACH64_CONFIG_STAT2)); - DRM_INFO(" CRC_SIG = 0x%08x\n", MACH64_READ(MACH64_CRC_SIG)); - DRM_INFO(" CUSTOM_MACRO_CNTL = 0x%08x\n", - MACH64_READ(MACH64_CUSTOM_MACRO_CNTL)); - DRM_INFO("\n"); - /* DRM_INFO( " DAC_CNTL = 0x%08x\n", MACH64_READ( MACH64_DAC_CNTL ) ); */ - /* DRM_INFO( " DAC_REGS = 0x%08x\n", MACH64_READ( MACH64_DAC_REGS ) ); */ - DRM_INFO(" DP_BKGD_CLR = 0x%08x\n", - MACH64_READ(MACH64_DP_BKGD_CLR)); - DRM_INFO(" DP_FRGD_CLR = 0x%08x\n", - MACH64_READ(MACH64_DP_FRGD_CLR)); - DRM_INFO(" DP_MIX = 0x%08x\n", MACH64_READ(MACH64_DP_MIX)); - DRM_INFO(" DP_PIX_WIDTH = 0x%08x\n", - MACH64_READ(MACH64_DP_PIX_WIDTH)); - DRM_INFO(" DP_SRC = 0x%08x\n", MACH64_READ(MACH64_DP_SRC)); - DRM_INFO(" DP_WRITE_MASK = 0x%08x\n", - MACH64_READ(MACH64_DP_WRITE_MASK)); - DRM_INFO(" DSP_CONFIG = 0x%08x\n", - MACH64_READ(MACH64_DSP_CONFIG)); - DRM_INFO(" DSP_ON_OFF = 0x%08x\n", - MACH64_READ(MACH64_DSP_ON_OFF)); - DRM_INFO(" DST_CNTL = 0x%08x\n", - MACH64_READ(MACH64_DST_CNTL)); - DRM_INFO(" DST_OFF_PITCH = 0x%08x\n", - MACH64_READ(MACH64_DST_OFF_PITCH)); - DRM_INFO("\n"); - /* DRM_INFO( " EXT_DAC_REGS = 0x%08x\n", MACH64_READ( MACH64_EXT_DAC_REGS ) ); */ - DRM_INFO(" EXT_MEM_CNTL = 0x%08x\n", - MACH64_READ(MACH64_EXT_MEM_CNTL)); - DRM_INFO("\n"); - DRM_INFO(" FIFO_STAT = 0x%08x\n", - MACH64_READ(MACH64_FIFO_STAT)); - DRM_INFO("\n"); - DRM_INFO(" GEN_TEST_CNTL = 0x%08x\n", - MACH64_READ(MACH64_GEN_TEST_CNTL)); - /* DRM_INFO( " GP_IO = 0x%08x\n", MACH64_READ( MACH64_GP_IO ) ); */ - DRM_INFO(" GUI_CMDFIFO_DATA = 0x%08x\n", - MACH64_READ(MACH64_GUI_CMDFIFO_DATA)); - DRM_INFO(" GUI_CMDFIFO_DEBUG = 0x%08x\n", - MACH64_READ(MACH64_GUI_CMDFIFO_DEBUG)); - DRM_INFO(" GUI_CNTL = 0x%08x\n", - MACH64_READ(MACH64_GUI_CNTL)); - DRM_INFO(" GUI_STAT = 0x%08x\n", - MACH64_READ(MACH64_GUI_STAT)); - DRM_INFO(" GUI_TRAJ_CNTL = 0x%08x\n", - MACH64_READ(MACH64_GUI_TRAJ_CNTL)); - DRM_INFO("\n"); - DRM_INFO(" HOST_CNTL = 0x%08x\n", - MACH64_READ(MACH64_HOST_CNTL)); - DRM_INFO(" HW_DEBUG = 0x%08x\n", - MACH64_READ(MACH64_HW_DEBUG)); - DRM_INFO("\n"); - DRM_INFO(" MEM_ADDR_CONFIG = 0x%08x\n", - MACH64_READ(MACH64_MEM_ADDR_CONFIG)); - DRM_INFO(" MEM_BUF_CNTL = 0x%08x\n", - MACH64_READ(MACH64_MEM_BUF_CNTL)); - DRM_INFO("\n"); - DRM_INFO(" PAT_REG0 = 0x%08x\n", - MACH64_READ(MACH64_PAT_REG0)); - DRM_INFO(" PAT_REG1 = 0x%08x\n", - MACH64_READ(MACH64_PAT_REG1)); - DRM_INFO("\n"); - DRM_INFO(" SC_LEFT = 0x%08x\n", MACH64_READ(MACH64_SC_LEFT)); - DRM_INFO(" SC_RIGHT = 0x%08x\n", - MACH64_READ(MACH64_SC_RIGHT)); - DRM_INFO(" SC_TOP = 0x%08x\n", MACH64_READ(MACH64_SC_TOP)); - DRM_INFO(" SC_BOTTOM = 0x%08x\n", - MACH64_READ(MACH64_SC_BOTTOM)); - DRM_INFO("\n"); - DRM_INFO(" SCALE_3D_CNTL = 0x%08x\n", - MACH64_READ(MACH64_SCALE_3D_CNTL)); - DRM_INFO(" SCRATCH_REG0 = 0x%08x\n", - MACH64_READ(MACH64_SCRATCH_REG0)); - DRM_INFO(" SCRATCH_REG1 = 0x%08x\n", - MACH64_READ(MACH64_SCRATCH_REG1)); - DRM_INFO(" SETUP_CNTL = 0x%08x\n", - MACH64_READ(MACH64_SETUP_CNTL)); - DRM_INFO(" SRC_CNTL = 0x%08x\n", - MACH64_READ(MACH64_SRC_CNTL)); - DRM_INFO("\n"); - DRM_INFO(" TEX_CNTL = 0x%08x\n", - MACH64_READ(MACH64_TEX_CNTL)); - DRM_INFO(" TEX_SIZE_PITCH = 0x%08x\n", - MACH64_READ(MACH64_TEX_SIZE_PITCH)); - DRM_INFO(" TIMER_CONFIG = 0x%08x\n", - MACH64_READ(MACH64_TIMER_CONFIG)); - DRM_INFO("\n"); - DRM_INFO(" Z_CNTL = 0x%08x\n", MACH64_READ(MACH64_Z_CNTL)); - DRM_INFO(" Z_OFF_PITCH = 0x%08x\n", - MACH64_READ(MACH64_Z_OFF_PITCH)); - DRM_INFO("\n"); -} - -#define MACH64_DUMP_CONTEXT 3 - -/** - * Used by mach64_dump_ring_info() to dump the contents of the current buffer - * pointed by the ring head. - */ -static void mach64_dump_buf_info(drm_mach64_private_t *dev_priv, - struct drm_buf *buf) -{ - u32 addr = GETBUFADDR(buf); - u32 used = buf->used >> 2; - u32 sys_addr = MACH64_READ(MACH64_BM_SYSTEM_MEM_ADDR); - u32 *p = GETBUFPTR(buf); - int skipped = 0; - - DRM_INFO("buffer contents:\n"); - - while (used) { - u32 reg, count; - - reg = le32_to_cpu(*p++); - if (addr <= GETBUFADDR(buf) + MACH64_DUMP_CONTEXT * 4 || - (addr >= sys_addr - MACH64_DUMP_CONTEXT * 4 && - addr <= sys_addr + MACH64_DUMP_CONTEXT * 4) || - addr >= - GETBUFADDR(buf) + buf->used - MACH64_DUMP_CONTEXT * 4) { - DRM_INFO("%08x: 0x%08x\n", addr, reg); - } - addr += 4; - used--; - - count = (reg >> 16) + 1; - reg = reg & 0xffff; - reg = MMSELECT(reg); - while (count && used) { - if (addr <= GETBUFADDR(buf) + MACH64_DUMP_CONTEXT * 4 || - (addr >= sys_addr - MACH64_DUMP_CONTEXT * 4 && - addr <= sys_addr + MACH64_DUMP_CONTEXT * 4) || - addr >= - GETBUFADDR(buf) + buf->used - - MACH64_DUMP_CONTEXT * 4) { - DRM_INFO("%08x: 0x%04x = 0x%08x\n", addr, - reg, le32_to_cpu(*p)); - skipped = 0; - } else { - if (!skipped) { - DRM_INFO(" ...\n"); - skipped = 1; - } - } - p++; - addr += 4; - used--; - - reg += 4; - count--; - } - } - - DRM_INFO("\n"); -} - -/** - * Dump the ring state and contents, including the contents of the buffer being - * processed by the graphics engine. - */ -void mach64_dump_ring_info(drm_mach64_private_t *dev_priv) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - int i, skipped; - - DRM_INFO("\n"); - - DRM_INFO("ring contents:\n"); - DRM_INFO(" head_addr: 0x%08x head: %u tail: %u\n\n", - ring->head_addr, ring->head, ring->tail); - - skipped = 0; - for (i = 0; i < ring->size / sizeof(u32); i += 4) { - if (i <= MACH64_DUMP_CONTEXT * 4 || - i >= ring->size / sizeof(u32) - MACH64_DUMP_CONTEXT * 4 || - (i >= ring->tail - MACH64_DUMP_CONTEXT * 4 && - i <= ring->tail + MACH64_DUMP_CONTEXT * 4) || - (i >= ring->head - MACH64_DUMP_CONTEXT * 4 && - i <= ring->head + MACH64_DUMP_CONTEXT * 4)) { - DRM_INFO(" 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x%s%s\n", - (u32)(ring->start_addr + i * sizeof(u32)), - le32_to_cpu(((u32 *) ring->start)[i + 0]), - le32_to_cpu(((u32 *) ring->start)[i + 1]), - le32_to_cpu(((u32 *) ring->start)[i + 2]), - le32_to_cpu(((u32 *) ring->start)[i + 3]), - i == ring->head ? " (head)" : "", - i == ring->tail ? " (tail)" : ""); - skipped = 0; - } else { - if (!skipped) { - DRM_INFO(" ...\n"); - skipped = 1; - } - } - } - - DRM_INFO("\n"); - - if (ring->head < ring->size / sizeof(u32)) { - struct list_head *ptr; - u32 addr = le32_to_cpu(((u32 *) ring->start)[ring->head + 1]); - - list_for_each(ptr, &dev_priv->pending) { - drm_mach64_freelist_t *entry = - list_entry(ptr, drm_mach64_freelist_t, list); - struct drm_buf *buf = entry->buf; - - u32 buf_addr = GETBUFADDR(buf); - - if (buf_addr <= addr && addr < buf_addr + buf->used) - mach64_dump_buf_info(dev_priv, buf); - } - } - - DRM_INFO("\n"); - DRM_INFO(" BM_GUI_TABLE = 0x%08x\n", - MACH64_READ(MACH64_BM_GUI_TABLE)); - DRM_INFO("\n"); - DRM_INFO("BM_FRAME_BUF_OFFSET = 0x%08x\n", - MACH64_READ(MACH64_BM_FRAME_BUF_OFFSET)); - DRM_INFO(" BM_SYSTEM_MEM_ADDR = 0x%08x\n", - MACH64_READ(MACH64_BM_SYSTEM_MEM_ADDR)); - DRM_INFO(" BM_COMMAND = 0x%08x\n", - MACH64_READ(MACH64_BM_COMMAND)); - DRM_INFO("\n"); - DRM_INFO(" BM_STATUS = 0x%08x\n", - MACH64_READ(MACH64_BM_STATUS)); - DRM_INFO(" BUS_CNTL = 0x%08x\n", - MACH64_READ(MACH64_BUS_CNTL)); - DRM_INFO(" FIFO_STAT = 0x%08x\n", - MACH64_READ(MACH64_FIFO_STAT)); - DRM_INFO(" GUI_STAT = 0x%08x\n", - MACH64_READ(MACH64_GUI_STAT)); - DRM_INFO(" SRC_CNTL = 0x%08x\n", - MACH64_READ(MACH64_SRC_CNTL)); -} - -/*@}*/ - - -/*******************************************************************/ -/** \name DMA descriptor ring macros */ -/*@{*/ - -/** - * Remove the end mark from the ring's old tail position. - * - * It should be called after calling mach64_set_dma_eol to mark the ring's new - * tail position. - * - * We update the end marks while the bus master engine is in operation. Since - * the bus master engine may potentially be reading from the same position - * that we write, we must change atomically to avoid having intermediary bad - * data. - */ -static __inline__ void mach64_clear_dma_eol(volatile u32 *addr) -{ -#if defined(__i386__) - int nr = 31; - - /* Taken from include/asm-i386/bitops.h linux header */ - __asm__ __volatile__("lock;" "btrl %1,%0":"=m"(*addr) - :"Ir"(nr)); -#elif defined(__powerpc__) - u32 old; - u32 mask = cpu_to_le32(MACH64_DMA_EOL); - - /* Taken from the include/asm-ppc/bitops.h linux header */ - __asm__ __volatile__("\n\ -1: lwarx %0,0,%3 \n\ - andc %0,%0,%2 \n\ - stwcx. %0,0,%3 \n\ - bne- 1b":"=&r"(old), "=m"(*addr) - :"r"(mask), "r"(addr), "m"(*addr) - :"cc"); -#elif defined(__alpha__) - u32 temp; - u32 mask = ~MACH64_DMA_EOL; - - /* Taken from the include/asm-alpha/bitops.h linux header */ - __asm__ __volatile__("1: ldl_l %0,%3\n" - " and %0,%2,%0\n" - " stl_c %0,%1\n" - " beq %0,2f\n" - ".subsection 2\n" - "2: br 1b\n" - ".previous":"=&r"(temp), "=m"(*addr) - :"Ir"(mask), "m"(*addr)); -#else - u32 mask = cpu_to_le32(~MACH64_DMA_EOL); - - *addr &= mask; -#endif -} - -#define RING_LOCALS \ - int _ring_tail, _ring_write; unsigned int _ring_mask; volatile u32 *_ring - -#define RING_WRITE_OFS _ring_write - -#define BEGIN_RING(n) \ - do { \ - if (MACH64_VERBOSE) { \ - DRM_INFO( "BEGIN_RING( %d ) \n", \ - (n) ); \ - } \ - if (dev_priv->ring.space <= (n) * sizeof(u32)) { \ - int ret; \ - if ((ret = mach64_wait_ring( dev_priv, (n) * sizeof(u32))) < 0 ) { \ - DRM_ERROR( "wait_ring failed, resetting engine\n"); \ - mach64_dump_engine_info( dev_priv ); \ - mach64_do_engine_reset( dev_priv ); \ - return ret; \ - } \ - } \ - dev_priv->ring.space -= (n) * sizeof(u32); \ - _ring = (u32 *) dev_priv->ring.start; \ - _ring_tail = _ring_write = dev_priv->ring.tail; \ - _ring_mask = dev_priv->ring.tail_mask; \ - } while (0) - -#define OUT_RING( x ) \ -do { \ - if (MACH64_VERBOSE) { \ - DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ - (unsigned int)(x), _ring_write ); \ - } \ - _ring[_ring_write++] = cpu_to_le32( x ); \ - _ring_write &= _ring_mask; \ -} while (0) - -#define ADVANCE_RING() \ -do { \ - if (MACH64_VERBOSE) { \ - DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ - _ring_write, _ring_tail ); \ - } \ - DRM_MEMORYBARRIER(); \ - mach64_clear_dma_eol( &_ring[(_ring_tail - 2) & _ring_mask] ); \ - DRM_MEMORYBARRIER(); \ - dev_priv->ring.tail = _ring_write; \ - mach64_ring_tick( dev_priv, &(dev_priv)->ring ); \ -} while (0) - -/** - * Queue a DMA buffer of registers writes into the ring buffer. - */ -int mach64_add_buf_to_ring(drm_mach64_private_t *dev_priv, - drm_mach64_freelist_t *entry) -{ - int bytes, pages, remainder; - u32 address, page; - int i; - struct drm_buf *buf = entry->buf; - RING_LOCALS; - - bytes = buf->used; - address = GETBUFADDR( buf ); - pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE; - - BEGIN_RING( pages * 4 ); - - for ( i = 0 ; i < pages-1 ; i++ ) { - page = address + i * MACH64_DMA_CHUNKSIZE; - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); - OUT_RING( page ); - OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET ); - OUT_RING( 0 ); - } - - /* generate the final descriptor for any remaining commands in this buffer */ - page = address + i * MACH64_DMA_CHUNKSIZE; - remainder = bytes - i * MACH64_DMA_CHUNKSIZE; - - /* Save dword offset of last descriptor for this buffer. - * This is needed to check for completion of the buffer in freelist_get - */ - entry->ring_ofs = RING_WRITE_OFS; - - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); - OUT_RING( page ); - OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL ); - OUT_RING( 0 ); - - ADVANCE_RING(); - - return 0; -} - -/** - * Queue DMA buffer controlling host data tranfers (e.g., blit). - * - * Almost identical to mach64_add_buf_to_ring. - */ -int mach64_add_hostdata_buf_to_ring(drm_mach64_private_t *dev_priv, - drm_mach64_freelist_t *entry) -{ - int bytes, pages, remainder; - u32 address, page; - int i; - struct drm_buf *buf = entry->buf; - RING_LOCALS; - - bytes = buf->used - MACH64_HOSTDATA_BLIT_OFFSET; - pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE; - address = GETBUFADDR( buf ); - - BEGIN_RING( 4 + pages * 4 ); - - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); - OUT_RING( address ); - OUT_RING( MACH64_HOSTDATA_BLIT_OFFSET | MACH64_DMA_HOLD_OFFSET ); - OUT_RING( 0 ); - address += MACH64_HOSTDATA_BLIT_OFFSET; - - for ( i = 0 ; i < pages-1 ; i++ ) { - page = address + i * MACH64_DMA_CHUNKSIZE; - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA ); - OUT_RING( page ); - OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET ); - OUT_RING( 0 ); - } - - /* generate the final descriptor for any remaining commands in this buffer */ - page = address + i * MACH64_DMA_CHUNKSIZE; - remainder = bytes - i * MACH64_DMA_CHUNKSIZE; - - /* Save dword offset of last descriptor for this buffer. - * This is needed to check for completion of the buffer in freelist_get - */ - entry->ring_ofs = RING_WRITE_OFS; - - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA ); - OUT_RING( page ); - OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL ); - OUT_RING( 0 ); - - ADVANCE_RING(); - - return 0; -} - -/*@}*/ - - -/*******************************************************************/ -/** \name DMA test and initialization */ -/*@{*/ - -/** - * Perform a simple DMA operation using the pattern registers to test whether - * DMA works. - * - * \return zero if successful. - * - * \note This function was the testbed for many experiences regarding Mach64 - * DMA operation. It is left here since it so tricky to get DMA operating - * properly in some architectures and hardware. - */ -static int mach64_bm_dma_test(struct drm_device * dev) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_dma_handle_t *cpu_addr_dmah; - u32 data_addr; - u32 *table, *data; - u32 expected[2]; - u32 src_cntl, pat_reg0, pat_reg1; - int i, count, failed; - - DRM_DEBUG("\n"); - - table = (u32 *) dev_priv->ring.start; - - /* FIXME: get a dma buffer from the freelist here */ - DRM_DEBUG("Allocating data memory ...\n"); -#ifdef __FreeBSD__ - DRM_UNLOCK(); -#endif - cpu_addr_dmah = - drm_pci_alloc(dev, 0x1000, 0x1000, 0xfffffffful); -#ifdef __FreeBSD__ - DRM_LOCK(); -#endif - if (!cpu_addr_dmah) { - DRM_INFO("data-memory allocation failed!\n"); - return -ENOMEM; - } else { - data = (u32 *) cpu_addr_dmah->vaddr; - data_addr = (u32) cpu_addr_dmah->busaddr; - } - - /* Save the X server's value for SRC_CNTL and restore it - * in case our test fails. This prevents the X server - * from disabling it's cache for this register - */ - src_cntl = MACH64_READ(MACH64_SRC_CNTL); - pat_reg0 = MACH64_READ(MACH64_PAT_REG0); - pat_reg1 = MACH64_READ(MACH64_PAT_REG1); - - mach64_do_wait_for_fifo(dev_priv, 3); - - MACH64_WRITE(MACH64_SRC_CNTL, 0); - MACH64_WRITE(MACH64_PAT_REG0, 0x11111111); - MACH64_WRITE(MACH64_PAT_REG1, 0x11111111); - - mach64_do_wait_for_idle(dev_priv); - - for (i = 0; i < 2; i++) { - u32 reg; - reg = MACH64_READ((MACH64_PAT_REG0 + i * 4)); - DRM_DEBUG("(Before DMA Transfer) reg %d = 0x%08x\n", i, reg); - if (reg != 0x11111111) { - DRM_INFO("Error initializing test registers\n"); - DRM_INFO("resetting engine ...\n"); - mach64_do_engine_reset(dev_priv); - DRM_INFO("freeing data buffer memory.\n"); - drm_pci_free(dev, cpu_addr_dmah); - return -EIO; - } - } - - /* fill up a buffer with sets of 2 consecutive writes starting with PAT_REG0 */ - count = 0; - - data[count++] = cpu_to_le32(DMAREG(MACH64_PAT_REG0) | (1 << 16)); - data[count++] = expected[0] = 0x22222222; - data[count++] = expected[1] = 0xaaaaaaaa; - - while (count < 1020) { - data[count++] = - cpu_to_le32(DMAREG(MACH64_PAT_REG0) | (1 << 16)); - data[count++] = 0x22222222; - data[count++] = 0xaaaaaaaa; - } - data[count++] = cpu_to_le32(DMAREG(MACH64_SRC_CNTL) | (0 << 16)); - data[count++] = 0; - - DRM_DEBUG("Preparing table ...\n"); - table[MACH64_DMA_FRAME_BUF_OFFSET] = cpu_to_le32(MACH64_BM_ADDR + - MACH64_APERTURE_OFFSET); - table[MACH64_DMA_SYS_MEM_ADDR] = cpu_to_le32(data_addr); - table[MACH64_DMA_COMMAND] = cpu_to_le32(count * sizeof(u32) - | MACH64_DMA_HOLD_OFFSET - | MACH64_DMA_EOL); - table[MACH64_DMA_RESERVED] = 0; - - DRM_DEBUG("table[0] = 0x%08x\n", table[0]); - DRM_DEBUG("table[1] = 0x%08x\n", table[1]); - DRM_DEBUG("table[2] = 0x%08x\n", table[2]); - DRM_DEBUG("table[3] = 0x%08x\n", table[3]); - - for (i = 0; i < 6; i++) { - DRM_DEBUG(" data[%d] = 0x%08x\n", i, data[i]); - } - DRM_DEBUG(" ...\n"); - for (i = count - 5; i < count; i++) { - DRM_DEBUG(" data[%d] = 0x%08x\n", i, data[i]); - } - - DRM_MEMORYBARRIER(); - - DRM_DEBUG("waiting for idle...\n"); - if ((i = mach64_do_wait_for_idle(dev_priv))) { - DRM_INFO("mach64_do_wait_for_idle failed (result=%d)\n", i); - DRM_INFO("resetting engine ...\n"); - mach64_do_engine_reset(dev_priv); - mach64_do_wait_for_fifo(dev_priv, 3); - MACH64_WRITE(MACH64_SRC_CNTL, src_cntl); - MACH64_WRITE(MACH64_PAT_REG0, pat_reg0); - MACH64_WRITE(MACH64_PAT_REG1, pat_reg1); - DRM_INFO("freeing data buffer memory.\n"); - drm_pci_free(dev, cpu_addr_dmah); - return i; - } - DRM_DEBUG("waiting for idle...done\n"); - - DRM_DEBUG("BUS_CNTL = 0x%08x\n", MACH64_READ(MACH64_BUS_CNTL)); - DRM_DEBUG("SRC_CNTL = 0x%08x\n", MACH64_READ(MACH64_SRC_CNTL)); - DRM_DEBUG("\n"); - DRM_DEBUG("data bus addr = 0x%08x\n", data_addr); - DRM_DEBUG("table bus addr = 0x%08x\n", dev_priv->ring.start_addr); - - DRM_DEBUG("starting DMA transfer...\n"); - MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD, - dev_priv->ring.start_addr | MACH64_CIRCULAR_BUF_SIZE_16KB); - - MACH64_WRITE(MACH64_SRC_CNTL, - MACH64_SRC_BM_ENABLE | MACH64_SRC_BM_SYNC | - MACH64_SRC_BM_OP_SYSTEM_TO_REG); - - /* Kick off the transfer */ - DRM_DEBUG("starting DMA transfer... done.\n"); - MACH64_WRITE(MACH64_DST_HEIGHT_WIDTH, 0); - - DRM_DEBUG("waiting for idle...\n"); - - if ((i = mach64_do_wait_for_idle(dev_priv))) { - /* engine locked up, dump register state and reset */ - DRM_INFO("mach64_do_wait_for_idle failed (result=%d)\n", i); - mach64_dump_engine_info(dev_priv); - DRM_INFO("resetting engine ...\n"); - mach64_do_engine_reset(dev_priv); - mach64_do_wait_for_fifo(dev_priv, 3); - MACH64_WRITE(MACH64_SRC_CNTL, src_cntl); - MACH64_WRITE(MACH64_PAT_REG0, pat_reg0); - MACH64_WRITE(MACH64_PAT_REG1, pat_reg1); - DRM_INFO("freeing data buffer memory.\n"); - drm_pci_free(dev, cpu_addr_dmah); - return i; - } - - DRM_DEBUG("waiting for idle...done\n"); - - /* restore SRC_CNTL */ - mach64_do_wait_for_fifo(dev_priv, 1); - MACH64_WRITE(MACH64_SRC_CNTL, src_cntl); - - failed = 0; - - /* Check register values to see if the GUI master operation succeeded */ - for (i = 0; i < 2; i++) { - u32 reg; - reg = MACH64_READ((MACH64_PAT_REG0 + i * 4)); - DRM_DEBUG("(After DMA Transfer) reg %d = 0x%08x\n", i, reg); - if (reg != expected[i]) { - failed = -1; - } - } - - /* restore pattern registers */ - mach64_do_wait_for_fifo(dev_priv, 2); - MACH64_WRITE(MACH64_PAT_REG0, pat_reg0); - MACH64_WRITE(MACH64_PAT_REG1, pat_reg1); - - DRM_DEBUG("freeing data buffer memory.\n"); - drm_pci_free(dev, cpu_addr_dmah); - DRM_DEBUG("returning ...\n"); - - return failed; -} - -/** - * Called during the DMA initialization ioctl to initialize all the necessary - * software and hardware state for DMA operation. - */ -static int mach64_do_dma_init(struct drm_device * dev, drm_mach64_init_t * init) -{ - drm_mach64_private_t *dev_priv; - u32 tmp; - int i, ret; - - DRM_DEBUG("\n"); - - dev_priv = drm_alloc(sizeof(drm_mach64_private_t), DRM_MEM_DRIVER); - if (dev_priv == NULL) - return -ENOMEM; - - memset(dev_priv, 0, sizeof(drm_mach64_private_t)); - - dev_priv->is_pci = init->is_pci; - - dev_priv->fb_bpp = init->fb_bpp; - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - - dev_priv->depth_bpp = init->depth_bpp; - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - - dev_priv->front_offset_pitch = (((dev_priv->front_pitch / 8) << 22) | - (dev_priv->front_offset >> 3)); - dev_priv->back_offset_pitch = (((dev_priv->back_pitch / 8) << 22) | - (dev_priv->back_offset >> 3)); - dev_priv->depth_offset_pitch = (((dev_priv->depth_pitch / 8) << 22) | - (dev_priv->depth_offset >> 3)); - - dev_priv->usec_timeout = 1000000; - - /* Set up the freelist, placeholder list and pending list */ - INIT_LIST_HEAD(&dev_priv->free_list); - INIT_LIST_HEAD(&dev_priv->placeholders); - INIT_LIST_HEAD(&dev_priv->pending); - - dev_priv->sarea = drm_getsarea(dev); - if (!dev_priv->sarea) { - DRM_ERROR("can not find sarea!\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return -EINVAL; - } - dev_priv->fb = drm_core_findmap(dev, init->fb_offset); - if (!dev_priv->fb) { - DRM_ERROR("can not find frame buffer map!\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return -EINVAL; - } - dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset); - if (!dev_priv->mmio) { - DRM_ERROR("can not find mmio map!\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return -EINVAL; - } - - dev_priv->ring_map = drm_core_findmap(dev, init->ring_offset); - if (!dev_priv->ring_map) { - DRM_ERROR("can not find ring map!\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return -EINVAL; - } - - dev_priv->sarea_priv = (drm_mach64_sarea_t *) - ((u8 *) dev_priv->sarea->virtual + init->sarea_priv_offset); - - if (!dev_priv->is_pci) { - drm_core_ioremap(dev_priv->ring_map, dev); - if (!dev_priv->ring_map->virtual) { - DRM_ERROR("can not ioremap virtual address for" - " descriptor ring\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return -ENOMEM; - } - dev->agp_buffer_token = init->buffers_offset; - dev->agp_buffer_map = - drm_core_findmap(dev, init->buffers_offset); - if (!dev->agp_buffer_map) { - DRM_ERROR("can not find dma buffer map!\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return -EINVAL; - } - /* there might be a nicer way to do this - - dev isn't passed all the way though the mach64 - DA */ - dev_priv->dev_buffers = dev->agp_buffer_map; - - drm_core_ioremap(dev->agp_buffer_map, dev); - if (!dev->agp_buffer_map->virtual) { - DRM_ERROR("can not ioremap virtual address for" - " dma buffer\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return -ENOMEM; - } - dev_priv->agp_textures = - drm_core_findmap(dev, init->agp_textures_offset); - if (!dev_priv->agp_textures) { - DRM_ERROR("can not find agp texture region!\n"); - dev->dev_private = (void *)dev_priv; - mach64_do_cleanup_dma(dev); - return -EINVAL; - } - } - - dev->dev_private = (void *)dev_priv; - - dev_priv->driver_mode = init->dma_mode; - - /* changing the FIFO size from the default causes problems with DMA */ - tmp = MACH64_READ(MACH64_GUI_CNTL); - if ((tmp & MACH64_CMDFIFO_SIZE_MASK) != MACH64_CMDFIFO_SIZE_128) { - DRM_INFO("Setting FIFO size to 128 entries\n"); - /* FIFO must be empty to change the FIFO depth */ - if ((ret = mach64_do_wait_for_idle(dev_priv))) { - DRM_ERROR - ("wait for idle failed before changing FIFO depth!\n"); - mach64_do_cleanup_dma(dev); - return ret; - } - MACH64_WRITE(MACH64_GUI_CNTL, ((tmp & ~MACH64_CMDFIFO_SIZE_MASK) - | MACH64_CMDFIFO_SIZE_128)); - /* need to read GUI_STAT for proper sync according to docs */ - if ((ret = mach64_do_wait_for_idle(dev_priv))) { - DRM_ERROR - ("wait for idle failed when changing FIFO depth!\n"); - mach64_do_cleanup_dma(dev); - return ret; - } - } - - dev_priv->ring.size = 0x4000; /* 16KB */ - dev_priv->ring.start = dev_priv->ring_map->virtual; - dev_priv->ring.start_addr = (u32) dev_priv->ring_map->offset; - - memset(dev_priv->ring.start, 0, dev_priv->ring.size); - DRM_INFO("descriptor ring: cpu addr %p, bus addr: 0x%08x\n", - dev_priv->ring.start, dev_priv->ring.start_addr); - - ret = 0; - if (dev_priv->driver_mode != MACH64_MODE_MMIO) { - - /* enable block 1 registers and bus mastering */ - MACH64_WRITE(MACH64_BUS_CNTL, ((MACH64_READ(MACH64_BUS_CNTL) - | MACH64_BUS_EXT_REG_EN) - & ~MACH64_BUS_MASTER_DIS)); - - /* try a DMA GUI-mastering pass and fall back to MMIO if it fails */ - DRM_DEBUG("Starting DMA test...\n"); - if ((ret = mach64_bm_dma_test(dev))) { - dev_priv->driver_mode = MACH64_MODE_MMIO; - } - } - - switch (dev_priv->driver_mode) { - case MACH64_MODE_MMIO: - MACH64_WRITE(MACH64_BUS_CNTL, (MACH64_READ(MACH64_BUS_CNTL) - | MACH64_BUS_EXT_REG_EN - | MACH64_BUS_MASTER_DIS)); - if (init->dma_mode == MACH64_MODE_MMIO) - DRM_INFO("Forcing pseudo-DMA mode\n"); - else - DRM_INFO - ("DMA test failed (ret=%d), using pseudo-DMA mode\n", - ret); - break; - case MACH64_MODE_DMA_SYNC: - DRM_INFO("DMA test succeeded, using synchronous DMA mode\n"); - break; - case MACH64_MODE_DMA_ASYNC: - default: - DRM_INFO("DMA test succeeded, using asynchronous DMA mode\n"); - } - - dev_priv->ring_running = 0; - - /* setup offsets for physical address of table start and end */ - dev_priv->ring.head_addr = dev_priv->ring.start_addr; - dev_priv->ring.head = dev_priv->ring.tail = 0; - dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1; - dev_priv->ring.space = dev_priv->ring.size; - - /* setup physical address and size of descriptor table */ - mach64_do_wait_for_fifo(dev_priv, 1); - MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD, - (dev_priv->ring. - head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB)); - - /* init frame counter */ - dev_priv->sarea_priv->frames_queued = 0; - for (i = 0; i < MACH64_MAX_QUEUED_FRAMES; i++) { - dev_priv->frame_ofs[i] = ~0; /* All ones indicates placeholder */ - } - - /* Allocate the DMA buffer freelist */ - if ((ret = mach64_init_freelist(dev))) { - DRM_ERROR("Freelist allocation failed\n"); - mach64_do_cleanup_dma(dev); - return ret; - } - - return 0; -} - -/*******************************************************************/ -/** MMIO Pseudo-DMA (intended primarily for debugging, not performance) - */ - -int mach64_do_dispatch_pseudo_dma(drm_mach64_private_t *dev_priv) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - volatile u32 *ring_read; - struct list_head *ptr; - drm_mach64_freelist_t *entry; - struct drm_buf *buf = NULL; - u32 *buf_ptr; - u32 used, reg, target; - int fifo, count, found, ret, no_idle_wait; - - fifo = count = reg = no_idle_wait = 0; - target = MACH64_BM_ADDR; - - if ((ret = mach64_do_wait_for_idle(dev_priv)) < 0) { - DRM_INFO("idle failed before pseudo-dma dispatch, resetting engine\n"); - mach64_dump_engine_info(dev_priv); - mach64_do_engine_reset(dev_priv); - return ret; - } - - ring_read = (u32 *) ring->start; - - while (ring->tail != ring->head) { - u32 buf_addr, new_target, offset; - u32 bytes, remaining, head, eol; - - head = ring->head; - - new_target = - le32_to_cpu(ring_read[head++]) - MACH64_APERTURE_OFFSET; - buf_addr = le32_to_cpu(ring_read[head++]); - eol = le32_to_cpu(ring_read[head]) & MACH64_DMA_EOL; - bytes = le32_to_cpu(ring_read[head++]) - & ~(MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL); - head++; - head &= ring->tail_mask; - - /* can't wait for idle between a blit setup descriptor - * and a HOSTDATA descriptor or the engine will lock - */ - if (new_target == MACH64_BM_HOSTDATA - && target == MACH64_BM_ADDR) - no_idle_wait = 1; - - target = new_target; - - found = 0; - offset = 0; - list_for_each(ptr, &dev_priv->pending) { - entry = list_entry(ptr, drm_mach64_freelist_t, list); - buf = entry->buf; - offset = buf_addr - GETBUFADDR(buf); - if (offset < MACH64_BUFFER_SIZE) { - found = 1; - break; - } - } - - if (!found || buf == NULL) { - DRM_ERROR - ("Couldn't find pending buffer: head: %u tail: %u buf_addr: 0x%08x %s\n", - head, ring->tail, buf_addr, (eol ? "eol" : "")); - mach64_dump_ring_info(dev_priv); - mach64_do_engine_reset(dev_priv); - return -EINVAL; - } - - /* Hand feed the buffer to the card via MMIO, waiting for the fifo - * every 16 writes - */ - DRM_DEBUG("target: (0x%08x) %s\n", target, - (target == - MACH64_BM_HOSTDATA ? "BM_HOSTDATA" : "BM_ADDR")); - DRM_DEBUG("offset: %u bytes: %u used: %u\n", offset, bytes, - buf->used); - - remaining = (buf->used - offset) >> 2; /* dwords remaining in buffer */ - used = bytes >> 2; /* dwords in buffer for this descriptor */ - buf_ptr = (u32 *) ((char *)GETBUFPTR(buf) + offset); - - while (used) { - - if (count == 0) { - if (target == MACH64_BM_HOSTDATA) { - reg = DMAREG(MACH64_HOST_DATA0); - count = - (remaining > 16) ? 16 : remaining; - fifo = 0; - } else { - reg = le32_to_cpu(*buf_ptr++); - used--; - count = (reg >> 16) + 1; - } - - reg = reg & 0xffff; - reg = MMSELECT(reg); - } - while (count && used) { - if (!fifo) { - if (no_idle_wait) { - if ((ret = - mach64_do_wait_for_fifo - (dev_priv, 16)) < 0) { - no_idle_wait = 0; - return ret; - } - } else { - if ((ret = - mach64_do_wait_for_idle - (dev_priv)) < 0) { - return ret; - } - } - fifo = 16; - } - --fifo; - MACH64_WRITE(reg, le32_to_cpu(*buf_ptr++)); - used--; - remaining--; - - reg += 4; - count--; - } - } - ring->head = head; - ring->head_addr = ring->start_addr + (ring->head * sizeof(u32)); - ring->space += (4 * sizeof(u32)); - } - - if ((ret = mach64_do_wait_for_idle(dev_priv)) < 0) { - return ret; - } - MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD, - ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB); - - DRM_DEBUG("completed\n"); - return 0; -} - -/*@}*/ - - -/*******************************************************************/ -/** \name DMA cleanup */ -/*@{*/ - -int mach64_do_cleanup_dma(struct drm_device * dev) -{ - DRM_DEBUG("\n"); - - /* Make sure interrupts are disabled here because the uninstall ioctl - * may not have been called from userspace and after dev_private - * is freed, it's too late. - */ - if (dev->irq) - drm_irq_uninstall(dev); - - if (dev->dev_private) { - drm_mach64_private_t *dev_priv = dev->dev_private; - - if (!dev_priv->is_pci) { - if (dev_priv->ring_map) - drm_core_ioremapfree(dev_priv->ring_map, dev); - - if (dev->agp_buffer_map) { - drm_core_ioremapfree(dev->agp_buffer_map, dev); - dev->agp_buffer_map = NULL; - } - } - - mach64_destroy_freelist(dev); - - drm_free(dev_priv, sizeof(drm_mach64_private_t), - DRM_MEM_DRIVER); - dev->dev_private = NULL; - } - - return 0; -} - -/*@}*/ - - -/*******************************************************************/ -/** \name IOCTL handlers */ -/*@{*/ - -int mach64_dma_init(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mach64_init_t *init = data; - - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - switch (init->func) { - case DRM_MACH64_INIT_DMA: - return mach64_do_dma_init(dev, init); - case DRM_MACH64_CLEANUP_DMA: - return mach64_do_cleanup_dma(dev); - } - - return -EINVAL; -} - -int mach64_dma_idle(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - return mach64_do_dma_idle(dev_priv); -} - -int mach64_dma_flush(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - return mach64_do_dma_flush(dev_priv); -} - -int mach64_engine_reset(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - return mach64_do_engine_reset(dev_priv); -} - -/*@}*/ - - -/*******************************************************************/ -/** \name Freelist management */ -/*@{*/ - -int mach64_init_freelist(struct drm_device * dev) -{ - struct drm_device_dma *dma = dev->dma; - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_freelist_t *entry; - struct list_head *ptr; - int i; - - DRM_DEBUG("adding %d buffers to freelist\n", dma->buf_count); - - for (i = 0; i < dma->buf_count; i++) { - if ((entry = - (drm_mach64_freelist_t *) - drm_alloc(sizeof(drm_mach64_freelist_t), - DRM_MEM_BUFLISTS)) == NULL) - return -ENOMEM; - memset(entry, 0, sizeof(drm_mach64_freelist_t)); - entry->buf = dma->buflist[i]; - ptr = &entry->list; - list_add_tail(ptr, &dev_priv->free_list); - } - - return 0; -} - -void mach64_destroy_freelist(struct drm_device * dev) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_freelist_t *entry; - struct list_head *ptr; - struct list_head *tmp; - - DRM_DEBUG("\n"); - - list_for_each_safe(ptr, tmp, &dev_priv->pending) { - list_del(ptr); - entry = list_entry(ptr, drm_mach64_freelist_t, list); - drm_free(entry, sizeof(*entry), DRM_MEM_BUFLISTS); - } - list_for_each_safe(ptr, tmp, &dev_priv->placeholders) { - list_del(ptr); - entry = list_entry(ptr, drm_mach64_freelist_t, list); - drm_free(entry, sizeof(*entry), DRM_MEM_BUFLISTS); - } - - list_for_each_safe(ptr, tmp, &dev_priv->free_list) { - list_del(ptr); - entry = list_entry(ptr, drm_mach64_freelist_t, list); - drm_free(entry, sizeof(*entry), DRM_MEM_BUFLISTS); - } -} - -/* IMPORTANT: This function should only be called when the engine is idle or locked up, - * as it assumes all buffers in the pending list have been completed by the hardware. - */ -int mach64_do_release_used_buffers(drm_mach64_private_t *dev_priv) -{ - struct list_head *ptr; - struct list_head *tmp; - drm_mach64_freelist_t *entry; - int i; - - if (list_empty(&dev_priv->pending)) - return 0; - - /* Iterate the pending list and move all buffers into the freelist... */ - i = 0; - list_for_each_safe(ptr, tmp, &dev_priv->pending) { - entry = list_entry(ptr, drm_mach64_freelist_t, list); - if (entry->discard) { - entry->buf->pending = 0; - list_del(ptr); - list_add_tail(ptr, &dev_priv->free_list); - i++; - } - } - - DRM_DEBUG("released %d buffers from pending list\n", i); - - return 0; -} - -static int mach64_do_reclaim_completed(drm_mach64_private_t *dev_priv) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - struct list_head *ptr; - struct list_head *tmp; - drm_mach64_freelist_t *entry; - u32 head, tail, ofs; - - mach64_ring_tick(dev_priv, ring); - head = ring->head; - tail = ring->tail; - - if (head == tail) { -#if MACH64_EXTRA_CHECKING - if (MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE) { - DRM_ERROR("Empty ring with non-idle engine!\n"); - mach64_dump_ring_info(dev_priv); - return -1; - } -#endif - /* last pass is complete, so release everything */ - mach64_do_release_used_buffers(dev_priv); - DRM_DEBUG("idle engine, freed all buffers.\n"); - if (list_empty(&dev_priv->free_list)) { - DRM_ERROR("Freelist empty with idle engine\n"); - return -1; - } - return 0; - } - /* Look for a completed buffer and bail out of the loop - * as soon as we find one -- don't waste time trying - * to free extra bufs here, leave that to do_release_used_buffers - */ - list_for_each_safe(ptr, tmp, &dev_priv->pending) { - entry = list_entry(ptr, drm_mach64_freelist_t, list); - ofs = entry->ring_ofs; - if (entry->discard && - ((head < tail && (ofs < head || ofs >= tail)) || - (head > tail && (ofs < head && ofs >= tail)))) { -#if MACH64_EXTRA_CHECKING - int i; - - for (i = head; i != tail; i = (i + 4) & ring->tail_mask) - { - u32 o1 = le32_to_cpu(((u32 *) ring-> - start)[i + 1]); - u32 o2 = GETBUFADDR(entry->buf); - - if (o1 == o2) { - DRM_ERROR - ("Attempting to free used buffer: " - "i=%d buf=0x%08x\n", - i, o1); - mach64_dump_ring_info(dev_priv); - return -1; - } - } -#endif - /* found a processed buffer */ - entry->buf->pending = 0; - list_del(ptr); - list_add_tail(ptr, &dev_priv->free_list); - DRM_DEBUG - ("freed processed buffer (head=%d tail=%d " - "buf ring ofs=%d).\n", - head, tail, ofs); - return 0; - } - } - - return 1; -} - -struct drm_buf *mach64_freelist_get(drm_mach64_private_t *dev_priv) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - drm_mach64_freelist_t *entry; - struct list_head *ptr; - int t; - - if (list_empty(&dev_priv->free_list)) { - if (list_empty(&dev_priv->pending)) { - DRM_ERROR - ("Couldn't get buffer - pending and free lists empty\n"); - t = 0; - list_for_each(ptr, &dev_priv->placeholders) { - t++; - } - DRM_INFO("Placeholders: %d\n", t); - return NULL; - } - - for (t = 0; t < dev_priv->usec_timeout; t++) { - int ret; - - ret = mach64_do_reclaim_completed(dev_priv); - if (ret == 0) - goto _freelist_entry_found; - if (ret < 0) - return NULL; - - DRM_UDELAY(1); - } - mach64_dump_ring_info(dev_priv); - DRM_ERROR - ("timeout waiting for buffers: ring head_addr: 0x%08x head: %d tail: %d\n", - ring->head_addr, ring->head, ring->tail); - return NULL; - } - - _freelist_entry_found: - ptr = dev_priv->free_list.next; - list_del(ptr); - entry = list_entry(ptr, drm_mach64_freelist_t, list); - entry->buf->used = 0; - list_add_tail(ptr, &dev_priv->placeholders); - return entry->buf; -} - -int mach64_freelist_put(drm_mach64_private_t *dev_priv, struct drm_buf *copy_buf) -{ - struct list_head *ptr; - drm_mach64_freelist_t *entry; - -#if MACH64_EXTRA_CHECKING - list_for_each(ptr, &dev_priv->pending) { - entry = list_entry(ptr, drm_mach64_freelist_t, list); - if (copy_buf == entry->buf) { - DRM_ERROR("Trying to release a pending buf\n"); - return -EFAULT; - } - } -#endif - ptr = dev_priv->placeholders.next; - entry = list_entry(ptr, drm_mach64_freelist_t, list); - copy_buf->pending = 0; - copy_buf->used = 0; - entry->buf = copy_buf; - entry->discard = 1; - list_del(ptr); - list_add_tail(ptr, &dev_priv->free_list); - - return 0; -} - -/*@}*/ - - -/*******************************************************************/ -/** \name DMA buffer request and submission IOCTL handler */ -/*@{*/ - -static int mach64_dma_get_buffers(struct drm_device *dev, - struct drm_file *file_priv, - struct drm_dma * d) -{ - int i; - struct drm_buf *buf; - drm_mach64_private_t *dev_priv = dev->dev_private; - - for (i = d->granted_count; i < d->request_count; i++) { - buf = mach64_freelist_get(dev_priv); -#if MACH64_EXTRA_CHECKING - if (!buf) - return -EFAULT; -#else - if (!buf) - return -EAGAIN; -#endif - - buf->file_priv = file_priv; - - if (DRM_COPY_TO_USER(&d->request_indices[i], &buf->idx, - sizeof(buf->idx))) - return -EFAULT; - if (DRM_COPY_TO_USER(&d->request_sizes[i], &buf->total, - sizeof(buf->total))) - return -EFAULT; - - d->granted_count++; - } - return 0; -} - -int mach64_dma_buffers(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_device_dma *dma = dev->dma; - struct drm_dma *d = data; - int ret = 0; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - /* Please don't send us buffers. - */ - if (d->send_count != 0) { - DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n", - DRM_CURRENTPID, d->send_count); - return -EINVAL; - } - - /* We'll send you buffers. - */ - if (d->request_count < 0 || d->request_count > dma->buf_count) { - DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n", - DRM_CURRENTPID, d->request_count, dma->buf_count); - ret = -EINVAL; - } - - d->granted_count = 0; - - if (d->request_count) { - ret = mach64_dma_get_buffers(dev, file_priv, d); - } - - return ret; -} - -void mach64_driver_lastclose(struct drm_device * dev) -{ - mach64_do_cleanup_dma(dev); -} - -/*@}*/ diff --git a/sys/dev/drm/mach64_drm.h b/sys/dev/drm/mach64_drm.h deleted file mode 100644 index 44ba5050be72..000000000000 --- a/sys/dev/drm/mach64_drm.h +++ /dev/null @@ -1,259 +0,0 @@ -/* mach64_drm.h -- Public header for the mach64 driver -*- linux-c -*- - * Created: Thu Nov 30 20:04:32 2000 by gareth@valinux.com - */ -/*- - * Copyright 2000 Gareth Hughes - * Copyright 2002 Frank C. Earl - * Copyright 2002-2003 Leif Delgass - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Frank C. Earl <fearl@airmail.net> - * Leif Delgass <ldelgass@retinalburn.net> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __MACH64_DRM_H__ -#define __MACH64_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (mach64_sarea.h) - */ -#ifndef __MACH64_SAREA_DEFINES__ -#define __MACH64_SAREA_DEFINES__ - -/* What needs to be changed for the current vertex buffer? - * GH: We're going to be pedantic about this. We want the card to do as - * little as possible, so let's avoid having it fetch a whole bunch of - * register values that don't change all that often, if at all. - */ -#define MACH64_UPLOAD_DST_OFF_PITCH 0x0001 -#define MACH64_UPLOAD_Z_OFF_PITCH 0x0002 -#define MACH64_UPLOAD_Z_ALPHA_CNTL 0x0004 -#define MACH64_UPLOAD_SCALE_3D_CNTL 0x0008 -#define MACH64_UPLOAD_DP_FOG_CLR 0x0010 -#define MACH64_UPLOAD_DP_WRITE_MASK 0x0020 -#define MACH64_UPLOAD_DP_PIX_WIDTH 0x0040 -#define MACH64_UPLOAD_SETUP_CNTL 0x0080 -#define MACH64_UPLOAD_MISC 0x0100 -#define MACH64_UPLOAD_TEXTURE 0x0200 -#define MACH64_UPLOAD_TEX0IMAGE 0x0400 -#define MACH64_UPLOAD_TEX1IMAGE 0x0800 -#define MACH64_UPLOAD_CLIPRECTS 0x1000 /* handled client-side */ -#define MACH64_UPLOAD_CONTEXT 0x00ff -#define MACH64_UPLOAD_ALL 0x1fff - -/* DMA buffer size - */ -#define MACH64_BUFFER_SIZE 16384 - -/* Max number of swaps allowed on the ring - * before the client must wait - */ -#define MACH64_MAX_QUEUED_FRAMES 3U - -/* Byte offsets for host blit buffer data - */ -#define MACH64_HOSTDATA_BLIT_OFFSET 104 - -/* Keep these small for testing. - */ -#define MACH64_NR_SAREA_CLIPRECTS 8 - -#define MACH64_CARD_HEAP 0 -#define MACH64_AGP_HEAP 1 -#define MACH64_NR_TEX_HEAPS 2 -#define MACH64_NR_TEX_REGIONS 64 -#define MACH64_LOG_TEX_GRANULARITY 16 - -#define MACH64_TEX_MAXLEVELS 1 - -#define MACH64_NR_CONTEXT_REGS 15 -#define MACH64_NR_TEXTURE_REGS 4 - -#endif /* __MACH64_SAREA_DEFINES__ */ - -typedef struct { - unsigned int dst_off_pitch; - - unsigned int z_off_pitch; - unsigned int z_cntl; - unsigned int alpha_tst_cntl; - - unsigned int scale_3d_cntl; - - unsigned int sc_left_right; - unsigned int sc_top_bottom; - - unsigned int dp_fog_clr; - unsigned int dp_write_mask; - unsigned int dp_pix_width; - unsigned int dp_mix; - unsigned int dp_src; - - unsigned int clr_cmp_cntl; - unsigned int gui_traj_cntl; - - unsigned int setup_cntl; - - unsigned int tex_size_pitch; - unsigned int tex_cntl; - unsigned int secondary_tex_off; - unsigned int tex_offset; -} drm_mach64_context_regs_t; - -typedef struct drm_mach64_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex dma buffer. - */ - drm_mach64_context_regs_t context_state; - unsigned int dirty; - unsigned int vertsize; - - /* The current cliprects, or a subset thereof. - */ - struct drm_clip_rect boxes[MACH64_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Counters for client-side throttling of rendering clients. - */ - unsigned int frames_queued; - - /* Texture memory LRU. - */ - struct drm_tex_region tex_list[MACH64_NR_TEX_HEAPS][MACH64_NR_TEX_REGIONS + - 1]; - unsigned int tex_age[MACH64_NR_TEX_HEAPS]; - int ctx_owner; -} drm_mach64_sarea_t; - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (mach64_common.h) - */ - -/* Mach64 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ - -#define DRM_MACH64_INIT 0x00 -#define DRM_MACH64_IDLE 0x01 -#define DRM_MACH64_RESET 0x02 -#define DRM_MACH64_SWAP 0x03 -#define DRM_MACH64_CLEAR 0x04 -#define DRM_MACH64_VERTEX 0x05 -#define DRM_MACH64_BLIT 0x06 -#define DRM_MACH64_FLUSH 0x07 -#define DRM_MACH64_GETPARAM 0x08 - -#define DRM_IOCTL_MACH64_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_INIT, drm_mach64_init_t) -#define DRM_IOCTL_MACH64_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_IDLE ) -#define DRM_IOCTL_MACH64_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_RESET ) -#define DRM_IOCTL_MACH64_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_SWAP ) -#define DRM_IOCTL_MACH64_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_CLEAR, drm_mach64_clear_t) -#define DRM_IOCTL_MACH64_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_VERTEX, drm_mach64_vertex_t) -#define DRM_IOCTL_MACH64_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_BLIT, drm_mach64_blit_t) -#define DRM_IOCTL_MACH64_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_FLUSH ) -#define DRM_IOCTL_MACH64_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_MACH64_GETPARAM, drm_mach64_getparam_t) - -/* Buffer flags for clears - */ -#define MACH64_FRONT 0x1 -#define MACH64_BACK 0x2 -#define MACH64_DEPTH 0x4 - -/* Primitive types for vertex buffers - */ -#define MACH64_PRIM_POINTS 0x00000000 -#define MACH64_PRIM_LINES 0x00000001 -#define MACH64_PRIM_LINE_LOOP 0x00000002 -#define MACH64_PRIM_LINE_STRIP 0x00000003 -#define MACH64_PRIM_TRIANGLES 0x00000004 -#define MACH64_PRIM_TRIANGLE_STRIP 0x00000005 -#define MACH64_PRIM_TRIANGLE_FAN 0x00000006 -#define MACH64_PRIM_QUADS 0x00000007 -#define MACH64_PRIM_QUAD_STRIP 0x00000008 -#define MACH64_PRIM_POLYGON 0x00000009 - -typedef enum _drm_mach64_dma_mode_t { - MACH64_MODE_DMA_ASYNC, - MACH64_MODE_DMA_SYNC, - MACH64_MODE_MMIO -} drm_mach64_dma_mode_t; - -typedef struct drm_mach64_init { - enum { - DRM_MACH64_INIT_DMA = 0x01, - DRM_MACH64_CLEANUP_DMA = 0x02 - } func; - - unsigned long sarea_priv_offset; - int is_pci; - drm_mach64_dma_mode_t dma_mode; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long ring_offset; - unsigned long buffers_offset; - unsigned long agp_textures_offset; -} drm_mach64_init_t; - -typedef struct drm_mach64_clear { - unsigned int flags; - int x, y, w, h; - unsigned int clear_color; - unsigned int clear_depth; -} drm_mach64_clear_t; - -typedef struct drm_mach64_vertex { - int prim; - void *buf; /* Address of vertex buffer */ - unsigned long used; /* Number of bytes in buffer */ - int discard; /* Client finished with buffer? */ -} drm_mach64_vertex_t; - -typedef struct drm_mach64_blit { - void *buf; - int pitch; - int offset; - int format; - unsigned short x, y; - unsigned short width, height; -} drm_mach64_blit_t; - -typedef struct drm_mach64_getparam { - enum { - MACH64_PARAM_FRAMES_QUEUED = 0x01, - MACH64_PARAM_IRQ_NR = 0x02 - } param; - void *value; -} drm_mach64_getparam_t; - -#endif diff --git a/sys/dev/drm/mach64_drv.c b/sys/dev/drm/mach64_drv.c deleted file mode 100644 index f4f61cdd3e3a..000000000000 --- a/sys/dev/drm/mach64_drv.c +++ /dev/null @@ -1,134 +0,0 @@ -/* mach64_drv.c -- ATI Rage 128 driver -*- linux-c -*- - * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com - */ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - - -#include <sys/types.h> - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/mach64_drm.h" -#include "dev/drm/mach64_drv.h" -#include "dev/drm/drm_pciids.h" - -/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */ -static drm_pci_id_list_t mach64_pciidlist[] = { - mach64_PCI_IDS -}; - -static void mach64_configure(struct drm_device *dev) -{ - dev->driver->driver_features = - DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | - DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ; - - dev->driver->buf_priv_size = 1; /* No dev_priv */ - dev->driver->load = mach64_driver_load; - dev->driver->lastclose = mach64_driver_lastclose; - dev->driver->get_vblank_counter = mach64_get_vblank_counter; - dev->driver->enable_vblank = mach64_enable_vblank; - dev->driver->disable_vblank = mach64_disable_vblank; - dev->driver->irq_preinstall = mach64_driver_irq_preinstall; - dev->driver->irq_postinstall = mach64_driver_irq_postinstall; - dev->driver->irq_uninstall = mach64_driver_irq_uninstall; - dev->driver->irq_handler = mach64_driver_irq_handler; - dev->driver->dma_ioctl = mach64_dma_buffers; - - dev->driver->ioctls = mach64_ioctls; - dev->driver->max_ioctl = mach64_max_ioctl; - - dev->driver->name = DRIVER_NAME; - dev->driver->desc = DRIVER_DESC; - dev->driver->date = DRIVER_DATE; - dev->driver->major = DRIVER_MAJOR; - dev->driver->minor = DRIVER_MINOR; - dev->driver->patchlevel = DRIVER_PATCHLEVEL; -} - -static int -mach64_probe(device_t kdev) -{ - return drm_probe(kdev, mach64_pciidlist); -} - -static int -mach64_attach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - - dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER, - M_WAITOK | M_ZERO); - - mach64_configure(dev); - - return drm_attach(kdev, mach64_pciidlist); -} - -int -mach64_driver_load(struct drm_device * dev, unsigned long flags) -{ - return drm_vblank_init(dev, 1); -} - -static int -mach64_detach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - int ret; - - ret = drm_detach(kdev); - - free(dev->driver, DRM_MEM_DRIVER); - - return ret; -} - -static device_method_t mach64_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mach64_probe), - DEVMETHOD(device_attach, mach64_attach), - DEVMETHOD(device_detach, mach64_detach), - - { 0, 0 } -}; - -static driver_t mach64_driver = { - "drm", - mach64_methods, - sizeof(struct drm_device) -}; - -extern devclass_t drm_devclass; -DRIVER_MODULE(mach64, vgapci, mach64_driver, drm_devclass, 0, 0); -MODULE_DEPEND(mach64, drm, 1, 1, 1); diff --git a/sys/dev/drm/mach64_drv.h b/sys/dev/drm/mach64_drv.h deleted file mode 100644 index 14c590e12633..000000000000 --- a/sys/dev/drm/mach64_drv.h +++ /dev/null @@ -1,863 +0,0 @@ -/* mach64_drv.h -- Private header for mach64 driver -*- linux-c -*- - * Created: Fri Nov 24 22:07:58 2000 by gareth@valinux.com - */ -/*- - * Copyright 2000 Gareth Hughes - * Copyright 2002 Frank C. Earl - * Copyright 2002-2003 Leif Delgass - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Frank C. Earl <fearl@airmail.net> - * Leif Delgass <ldelgass@retinalburn.net> - * José Fonseca <j_r_fonseca@yahoo.co.uk> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __MACH64_DRV_H__ -#define __MACH64_DRV_H__ - -/* General customization: - */ - -#define DRIVER_AUTHOR "Gareth Hughes, Leif Delgass, José Fonseca" - -#define DRIVER_NAME "mach64" -#define DRIVER_DESC "DRM module for the ATI Rage Pro" -#define DRIVER_DATE "20060718" - -#define DRIVER_MAJOR 2 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 0 - -/* FIXME: remove these when not needed */ -/* Development driver options */ -#define MACH64_EXTRA_CHECKING 0 /* Extra sanity checks for DMA/freelist management */ -#define MACH64_VERBOSE 0 /* Verbose debugging output */ - -typedef struct drm_mach64_freelist { - struct list_head list; /* List pointers for free_list, placeholders, or pending list */ - struct drm_buf *buf; /* Pointer to the buffer */ - int discard; /* This flag is set when we're done (re)using a buffer */ - u32 ring_ofs; /* dword offset in ring of last descriptor for this buffer */ -} drm_mach64_freelist_t; - -typedef struct drm_mach64_descriptor_ring { - void *start; /* write pointer (cpu address) to start of descriptor ring */ - u32 start_addr; /* bus address of beginning of descriptor ring */ - int size; /* size of ring in bytes */ - - u32 head_addr; /* bus address of descriptor ring head */ - u32 head; /* dword offset of descriptor ring head */ - u32 tail; /* dword offset of descriptor ring tail */ - u32 tail_mask; /* mask used to wrap ring */ - int space; /* number of free bytes in ring */ -} drm_mach64_descriptor_ring_t; - -typedef struct drm_mach64_private { - drm_mach64_sarea_t *sarea_priv; - - int is_pci; - drm_mach64_dma_mode_t driver_mode; /* Async DMA, sync DMA, or MMIO */ - - int usec_timeout; /* Timeout for the wait functions */ - - drm_mach64_descriptor_ring_t ring; /* DMA descriptor table (ring buffer) */ - int ring_running; /* Is bus mastering is enabled */ - - struct list_head free_list; /* Free-list head */ - struct list_head placeholders; /* Placeholder list for buffers held by clients */ - struct list_head pending; /* Buffers pending completion */ - - u32 frame_ofs[MACH64_MAX_QUEUED_FRAMES]; /* dword ring offsets of most recent frame swaps */ - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - atomic_t vbl_received; /**< Number of vblanks received. */ - - u32 front_offset_pitch; - u32 back_offset_pitch; - u32 depth_offset_pitch; - - drm_local_map_t *sarea; - drm_local_map_t *fb; - drm_local_map_t *mmio; - drm_local_map_t *ring_map; - drm_local_map_t *dev_buffers; /* this is a pointer to a structure in dev */ - drm_local_map_t *agp_textures; -} drm_mach64_private_t; - -extern struct drm_ioctl_desc mach64_ioctls[]; -extern int mach64_max_ioctl; - - /* mach64_dma.c */ -extern int mach64_dma_init(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mach64_dma_idle(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mach64_dma_flush(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mach64_engine_reset(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mach64_dma_buffers(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern void mach64_driver_lastclose(struct drm_device * dev); - -extern int mach64_init_freelist(struct drm_device * dev); -extern void mach64_destroy_freelist(struct drm_device * dev); -extern struct drm_buf *mach64_freelist_get(drm_mach64_private_t * dev_priv); -extern int mach64_freelist_put(drm_mach64_private_t * dev_priv, - struct drm_buf * copy_buf); - -extern int mach64_do_wait_for_fifo(drm_mach64_private_t * dev_priv, - int entries); -extern int mach64_do_wait_for_idle(drm_mach64_private_t * dev_priv); -extern int mach64_wait_ring(drm_mach64_private_t * dev_priv, int n); -extern int mach64_do_dispatch_pseudo_dma(drm_mach64_private_t * dev_priv); -extern int mach64_do_release_used_buffers(drm_mach64_private_t * dev_priv); -extern void mach64_dump_engine_info(drm_mach64_private_t * dev_priv); -extern void mach64_dump_ring_info(drm_mach64_private_t * dev_priv); -extern int mach64_do_engine_reset(drm_mach64_private_t * dev_priv); - -extern int mach64_add_buf_to_ring(drm_mach64_private_t *dev_priv, - drm_mach64_freelist_t *_entry); -extern int mach64_add_hostdata_buf_to_ring(drm_mach64_private_t *dev_priv, - drm_mach64_freelist_t *_entry); - -extern int mach64_do_dma_idle(drm_mach64_private_t * dev_priv); -extern int mach64_do_dma_flush(drm_mach64_private_t * dev_priv); -extern int mach64_do_cleanup_dma(struct drm_device * dev); - - /* mach64_state.c */ -extern int mach64_dma_clear(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mach64_dma_swap(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mach64_dma_vertex(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mach64_dma_blit(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mach64_get_param(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -extern int mach64_driver_load(struct drm_device * dev, unsigned long flags); -extern u32 mach64_get_vblank_counter(struct drm_device *dev, int crtc); -extern int mach64_enable_vblank(struct drm_device *dev, int crtc); -extern void mach64_disable_vblank(struct drm_device *dev, int crtc); -extern irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS); -extern void mach64_driver_irq_preinstall(struct drm_device *dev); -extern int mach64_driver_irq_postinstall(struct drm_device *dev); -extern void mach64_driver_irq_uninstall(struct drm_device *dev); - -/* ================================================================ - * Registers - */ - -#define MACH64_AGP_BASE 0x0148 -#define MACH64_AGP_CNTL 0x014c -#define MACH64_ALPHA_TST_CNTL 0x0550 - -#define MACH64_DSP_CONFIG 0x0420 -#define MACH64_DSP_ON_OFF 0x0424 -#define MACH64_EXT_MEM_CNTL 0x04ac -#define MACH64_GEN_TEST_CNTL 0x04d0 -#define MACH64_HW_DEBUG 0x047c -#define MACH64_MEM_ADDR_CONFIG 0x0434 -#define MACH64_MEM_BUF_CNTL 0x042c -#define MACH64_MEM_CNTL 0x04b0 - -#define MACH64_BM_ADDR 0x0648 -#define MACH64_BM_COMMAND 0x0188 -#define MACH64_BM_DATA 0x0648 -#define MACH64_BM_FRAME_BUF_OFFSET 0x0180 -#define MACH64_BM_GUI_TABLE 0x01b8 -#define MACH64_BM_GUI_TABLE_CMD 0x064c -# define MACH64_CIRCULAR_BUF_SIZE_16KB (0 << 0) -# define MACH64_CIRCULAR_BUF_SIZE_32KB (1 << 0) -# define MACH64_CIRCULAR_BUF_SIZE_64KB (2 << 0) -# define MACH64_CIRCULAR_BUF_SIZE_128KB (3 << 0) -# define MACH64_LAST_DESCRIPTOR (1U << 31) -#define MACH64_BM_HOSTDATA 0x0644 -#define MACH64_BM_STATUS 0x018c -#define MACH64_BM_SYSTEM_MEM_ADDR 0x0184 -#define MACH64_BM_SYSTEM_TABLE 0x01bc -#define MACH64_BUS_CNTL 0x04a0 -# define MACH64_BUS_MSTR_RESET (1 << 1) -# define MACH64_BUS_APER_REG_DIS (1 << 4) -# define MACH64_BUS_FLUSH_BUF (1 << 2) -# define MACH64_BUS_MASTER_DIS (1 << 6) -# define MACH64_BUS_EXT_REG_EN (1 << 27) - -#define MACH64_CLR_CMP_CLR 0x0700 -#define MACH64_CLR_CMP_CNTL 0x0708 -#define MACH64_CLR_CMP_MASK 0x0704 -#define MACH64_CONFIG_CHIP_ID 0x04e0 -#define MACH64_CONFIG_CNTL 0x04dc -#define MACH64_CONFIG_STAT0 0x04e4 -#define MACH64_CONFIG_STAT1 0x0494 -#define MACH64_CONFIG_STAT2 0x0498 -#define MACH64_CONTEXT_LOAD_CNTL 0x072c -#define MACH64_CONTEXT_MASK 0x0720 -#define MACH64_COMPOSITE_SHADOW_ID 0x0798 -#define MACH64_CRC_SIG 0x04e8 -#define MACH64_CUSTOM_MACRO_CNTL 0x04d4 - -#define MACH64_DP_BKGD_CLR 0x06c0 -#define MACH64_DP_FOG_CLR 0x06c4 -#define MACH64_DP_FGRD_BKGD_CLR 0x06e0 -#define MACH64_DP_FRGD_CLR 0x06c4 -#define MACH64_DP_FGRD_CLR_MIX 0x06dc - -#define MACH64_DP_MIX 0x06d4 -# define BKGD_MIX_NOT_D (0 << 0) -# define BKGD_MIX_ZERO (1 << 0) -# define BKGD_MIX_ONE (2 << 0) -# define MACH64_BKGD_MIX_D (3 << 0) -# define BKGD_MIX_NOT_S (4 << 0) -# define BKGD_MIX_D_XOR_S (5 << 0) -# define BKGD_MIX_NOT_D_XOR_S (6 << 0) -# define MACH64_BKGD_MIX_S (7 << 0) -# define BKGD_MIX_NOT_D_OR_NOT_S (8 << 0) -# define BKGD_MIX_D_OR_NOT_S (9 << 0) -# define BKGD_MIX_NOT_D_OR_S (10 << 0) -# define BKGD_MIX_D_OR_S (11 << 0) -# define BKGD_MIX_D_AND_S (12 << 0) -# define BKGD_MIX_NOT_D_AND_S (13 << 0) -# define BKGD_MIX_D_AND_NOT_S (14 << 0) -# define BKGD_MIX_NOT_D_AND_NOT_S (15 << 0) -# define BKGD_MIX_D_PLUS_S_DIV2 (23 << 0) -# define FRGD_MIX_NOT_D (0 << 16) -# define FRGD_MIX_ZERO (1 << 16) -# define FRGD_MIX_ONE (2 << 16) -# define FRGD_MIX_D (3 << 16) -# define FRGD_MIX_NOT_S (4 << 16) -# define FRGD_MIX_D_XOR_S (5 << 16) -# define FRGD_MIX_NOT_D_XOR_S (6 << 16) -# define MACH64_FRGD_MIX_S (7 << 16) -# define FRGD_MIX_NOT_D_OR_NOT_S (8 << 16) -# define FRGD_MIX_D_OR_NOT_S (9 << 16) -# define FRGD_MIX_NOT_D_OR_S (10 << 16) -# define FRGD_MIX_D_OR_S (11 << 16) -# define FRGD_MIX_D_AND_S (12 << 16) -# define FRGD_MIX_NOT_D_AND_S (13 << 16) -# define FRGD_MIX_D_AND_NOT_S (14 << 16) -# define FRGD_MIX_NOT_D_AND_NOT_S (15 << 16) -# define FRGD_MIX_D_PLUS_S_DIV2 (23 << 16) - -#define MACH64_DP_PIX_WIDTH 0x06d0 -# define MACH64_HOST_TRIPLE_ENABLE (1 << 13) -# define MACH64_BYTE_ORDER_MSB_TO_LSB (0 << 24) -# define MACH64_BYTE_ORDER_LSB_TO_MSB (1 << 24) - -#define MACH64_DP_SRC 0x06d8 -# define MACH64_BKGD_SRC_BKGD_CLR (0 << 0) -# define MACH64_BKGD_SRC_FRGD_CLR (1 << 0) -# define MACH64_BKGD_SRC_HOST (2 << 0) -# define MACH64_BKGD_SRC_BLIT (3 << 0) -# define MACH64_BKGD_SRC_PATTERN (4 << 0) -# define MACH64_BKGD_SRC_3D (5 << 0) -# define MACH64_FRGD_SRC_BKGD_CLR (0 << 8) -# define MACH64_FRGD_SRC_FRGD_CLR (1 << 8) -# define MACH64_FRGD_SRC_HOST (2 << 8) -# define MACH64_FRGD_SRC_BLIT (3 << 8) -# define MACH64_FRGD_SRC_PATTERN (4 << 8) -# define MACH64_FRGD_SRC_3D (5 << 8) -# define MACH64_MONO_SRC_ONE (0 << 16) -# define MACH64_MONO_SRC_PATTERN (1 << 16) -# define MACH64_MONO_SRC_HOST (2 << 16) -# define MACH64_MONO_SRC_BLIT (3 << 16) - -#define MACH64_DP_WRITE_MASK 0x06c8 - -#define MACH64_DST_CNTL 0x0530 -# define MACH64_DST_X_RIGHT_TO_LEFT (0 << 0) -# define MACH64_DST_X_LEFT_TO_RIGHT (1 << 0) -# define MACH64_DST_Y_BOTTOM_TO_TOP (0 << 1) -# define MACH64_DST_Y_TOP_TO_BOTTOM (1 << 1) -# define MACH64_DST_X_MAJOR (0 << 2) -# define MACH64_DST_Y_MAJOR (1 << 2) -# define MACH64_DST_X_TILE (1 << 3) -# define MACH64_DST_Y_TILE (1 << 4) -# define MACH64_DST_LAST_PEL (1 << 5) -# define MACH64_DST_POLYGON_ENABLE (1 << 6) -# define MACH64_DST_24_ROTATION_ENABLE (1 << 7) - -#define MACH64_DST_HEIGHT_WIDTH 0x0518 -#define MACH64_DST_OFF_PITCH 0x0500 -#define MACH64_DST_WIDTH_HEIGHT 0x06ec -#define MACH64_DST_X_Y 0x06e8 -#define MACH64_DST_Y_X 0x050c - -#define MACH64_FIFO_STAT 0x0710 -# define MACH64_FIFO_SLOT_MASK 0x0000ffff -# define MACH64_FIFO_ERR (1U << 31) - -#define MACH64_GEN_TEST_CNTL 0x04d0 -# define MACH64_GUI_ENGINE_ENABLE (1 << 8) -#define MACH64_GUI_CMDFIFO_DEBUG 0x0170 -#define MACH64_GUI_CMDFIFO_DATA 0x0174 -#define MACH64_GUI_CNTL 0x0178 -# define MACH64_CMDFIFO_SIZE_MASK 0x00000003ul -# define MACH64_CMDFIFO_SIZE_192 0x00000000ul -# define MACH64_CMDFIFO_SIZE_128 0x00000001ul -# define MACH64_CMDFIFO_SIZE_64 0x00000002ul -#define MACH64_GUI_STAT 0x0738 -# define MACH64_GUI_ACTIVE (1 << 0) -#define MACH64_GUI_TRAJ_CNTL 0x0730 - -#define MACH64_HOST_CNTL 0x0640 -#define MACH64_HOST_DATA0 0x0600 - -#define MACH64_ONE_OVER_AREA 0x029c -#define MACH64_ONE_OVER_AREA_UC 0x0300 - -#define MACH64_PAT_REG0 0x0680 -#define MACH64_PAT_REG1 0x0684 - -#define MACH64_SC_LEFT 0x06a0 -#define MACH64_SC_RIGHT 0x06a4 -#define MACH64_SC_LEFT_RIGHT 0x06a8 -#define MACH64_SC_TOP 0x06ac -#define MACH64_SC_BOTTOM 0x06b0 -#define MACH64_SC_TOP_BOTTOM 0x06b4 - -#define MACH64_SCALE_3D_CNTL 0x05fc -#define MACH64_SCRATCH_REG0 0x0480 -#define MACH64_SCRATCH_REG1 0x0484 -#define MACH64_SECONDARY_TEX_OFF 0x0778 -#define MACH64_SETUP_CNTL 0x0304 -#define MACH64_SRC_CNTL 0x05b4 -# define MACH64_SRC_BM_ENABLE (1 << 8) -# define MACH64_SRC_BM_SYNC (1 << 9) -# define MACH64_SRC_BM_OP_FRAME_TO_SYSTEM (0 << 10) -# define MACH64_SRC_BM_OP_SYSTEM_TO_FRAME (1 << 10) -# define MACH64_SRC_BM_OP_REG_TO_SYSTEM (2 << 10) -# define MACH64_SRC_BM_OP_SYSTEM_TO_REG (3 << 10) -#define MACH64_SRC_HEIGHT1 0x0594 -#define MACH64_SRC_HEIGHT2 0x05ac -#define MACH64_SRC_HEIGHT1_WIDTH1 0x0598 -#define MACH64_SRC_HEIGHT2_WIDTH2 0x05b0 -#define MACH64_SRC_OFF_PITCH 0x0580 -#define MACH64_SRC_WIDTH1 0x0590 -#define MACH64_SRC_Y_X 0x058c - -#define MACH64_TEX_0_OFF 0x05c0 -#define MACH64_TEX_CNTL 0x0774 -#define MACH64_TEX_SIZE_PITCH 0x0770 -#define MACH64_TIMER_CONFIG 0x0428 - -#define MACH64_VERTEX_1_ARGB 0x0254 -#define MACH64_VERTEX_1_S 0x0240 -#define MACH64_VERTEX_1_SECONDARY_S 0x0328 -#define MACH64_VERTEX_1_SECONDARY_T 0x032c -#define MACH64_VERTEX_1_SECONDARY_W 0x0330 -#define MACH64_VERTEX_1_SPEC_ARGB 0x024c -#define MACH64_VERTEX_1_T 0x0244 -#define MACH64_VERTEX_1_W 0x0248 -#define MACH64_VERTEX_1_X_Y 0x0258 -#define MACH64_VERTEX_1_Z 0x0250 -#define MACH64_VERTEX_2_ARGB 0x0274 -#define MACH64_VERTEX_2_S 0x0260 -#define MACH64_VERTEX_2_SECONDARY_S 0x0334 -#define MACH64_VERTEX_2_SECONDARY_T 0x0338 -#define MACH64_VERTEX_2_SECONDARY_W 0x033c -#define MACH64_VERTEX_2_SPEC_ARGB 0x026c -#define MACH64_VERTEX_2_T 0x0264 -#define MACH64_VERTEX_2_W 0x0268 -#define MACH64_VERTEX_2_X_Y 0x0278 -#define MACH64_VERTEX_2_Z 0x0270 -#define MACH64_VERTEX_3_ARGB 0x0294 -#define MACH64_VERTEX_3_S 0x0280 -#define MACH64_VERTEX_3_SECONDARY_S 0x02a0 -#define MACH64_VERTEX_3_SECONDARY_T 0x02a4 -#define MACH64_VERTEX_3_SECONDARY_W 0x02a8 -#define MACH64_VERTEX_3_SPEC_ARGB 0x028c -#define MACH64_VERTEX_3_T 0x0284 -#define MACH64_VERTEX_3_W 0x0288 -#define MACH64_VERTEX_3_X_Y 0x0298 -#define MACH64_VERTEX_3_Z 0x0290 - -#define MACH64_Z_CNTL 0x054c -#define MACH64_Z_OFF_PITCH 0x0548 - -#define MACH64_CRTC_VLINE_CRNT_VLINE 0x0410 -# define MACH64_CRTC_VLINE_MASK 0x000007ff -# define MACH64_CRTC_CRNT_VLINE_MASK 0x07ff0000 -#define MACH64_CRTC_OFF_PITCH 0x0414 -#define MACH64_CRTC_INT_CNTL 0x0418 -# define MACH64_CRTC_VBLANK (1 << 0) -# define MACH64_CRTC_VBLANK_INT_EN (1 << 1) -# define MACH64_CRTC_VBLANK_INT (1 << 2) -# define MACH64_CRTC_VLINE_INT_EN (1 << 3) -# define MACH64_CRTC_VLINE_INT (1 << 4) -# define MACH64_CRTC_VLINE_SYNC (1 << 5) /* 0=even, 1=odd */ -# define MACH64_CRTC_FRAME (1 << 6) /* 0=even, 1=odd */ -# define MACH64_CRTC_SNAPSHOT_INT_EN (1 << 7) -# define MACH64_CRTC_SNAPSHOT_INT (1 << 8) -# define MACH64_CRTC_I2C_INT_EN (1 << 9) -# define MACH64_CRTC_I2C_INT (1 << 10) -# define MACH64_CRTC2_VBLANK (1 << 11) /* LT Pro */ -# define MACH64_CRTC2_VBLANK_INT_EN (1 << 12) /* LT Pro */ -# define MACH64_CRTC2_VBLANK_INT (1 << 13) /* LT Pro */ -# define MACH64_CRTC2_VLINE_INT_EN (1 << 14) /* LT Pro */ -# define MACH64_CRTC2_VLINE_INT (1 << 15) /* LT Pro */ -# define MACH64_CRTC_CAPBUF0_INT_EN (1 << 16) -# define MACH64_CRTC_CAPBUF0_INT (1 << 17) -# define MACH64_CRTC_CAPBUF1_INT_EN (1 << 18) -# define MACH64_CRTC_CAPBUF1_INT (1 << 19) -# define MACH64_CRTC_OVERLAY_EOF_INT_EN (1 << 20) -# define MACH64_CRTC_OVERLAY_EOF_INT (1 << 21) -# define MACH64_CRTC_ONESHOT_CAP_INT_EN (1 << 22) -# define MACH64_CRTC_ONESHOT_CAP_INT (1 << 23) -# define MACH64_CRTC_BUSMASTER_EOL_INT_EN (1 << 24) -# define MACH64_CRTC_BUSMASTER_EOL_INT (1 << 25) -# define MACH64_CRTC_GP_INT_EN (1 << 26) -# define MACH64_CRTC_GP_INT (1 << 27) -# define MACH64_CRTC2_VLINE_SYNC (1 << 28) /* LT Pro */ /* 0=even, 1=odd */ -# define MACH64_CRTC_SNAPSHOT2_INT_EN (1 << 29) /* LT Pro */ -# define MACH64_CRTC_SNAPSHOT2_INT (1 << 30) /* LT Pro */ -# define MACH64_CRTC_VBLANK2_INT (1U << 31) -# define MACH64_CRTC_INT_ENS \ - ( \ - MACH64_CRTC_VBLANK_INT_EN | \ - MACH64_CRTC_VLINE_INT_EN | \ - MACH64_CRTC_SNAPSHOT_INT_EN | \ - MACH64_CRTC_I2C_INT_EN | \ - MACH64_CRTC2_VBLANK_INT_EN | \ - MACH64_CRTC2_VLINE_INT_EN | \ - MACH64_CRTC_CAPBUF0_INT_EN | \ - MACH64_CRTC_CAPBUF1_INT_EN | \ - MACH64_CRTC_OVERLAY_EOF_INT_EN | \ - MACH64_CRTC_ONESHOT_CAP_INT_EN | \ - MACH64_CRTC_BUSMASTER_EOL_INT_EN | \ - MACH64_CRTC_GP_INT_EN | \ - MACH64_CRTC_SNAPSHOT2_INT_EN | \ - 0 \ - ) -# define MACH64_CRTC_INT_ACKS \ - ( \ - MACH64_CRTC_VBLANK_INT | \ - MACH64_CRTC_VLINE_INT | \ - MACH64_CRTC_SNAPSHOT_INT | \ - MACH64_CRTC_I2C_INT | \ - MACH64_CRTC2_VBLANK_INT | \ - MACH64_CRTC2_VLINE_INT | \ - MACH64_CRTC_CAPBUF0_INT | \ - MACH64_CRTC_CAPBUF1_INT | \ - MACH64_CRTC_OVERLAY_EOF_INT | \ - MACH64_CRTC_ONESHOT_CAP_INT | \ - MACH64_CRTC_BUSMASTER_EOL_INT | \ - MACH64_CRTC_GP_INT | \ - MACH64_CRTC_SNAPSHOT2_INT | \ - MACH64_CRTC_VBLANK2_INT | \ - 0 \ - ) - -#define MACH64_DATATYPE_CI8 2 -#define MACH64_DATATYPE_ARGB1555 3 -#define MACH64_DATATYPE_RGB565 4 -#define MACH64_DATATYPE_ARGB8888 6 -#define MACH64_DATATYPE_RGB332 7 -#define MACH64_DATATYPE_Y8 8 -#define MACH64_DATATYPE_RGB8 9 -#define MACH64_DATATYPE_VYUY422 11 -#define MACH64_DATATYPE_YVYU422 12 -#define MACH64_DATATYPE_AYUV444 14 -#define MACH64_DATATYPE_ARGB4444 15 - -#define MACH64_READ(reg) DRM_READ32(dev_priv->mmio, (reg) ) -#define MACH64_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio, (reg), (val) ) - -#define DWMREG0 0x0400 -#define DWMREG0_END 0x07ff -#define DWMREG1 0x0000 -#define DWMREG1_END 0x03ff - -#define ISREG0(r) (((r) >= DWMREG0) && ((r) <= DWMREG0_END)) -#define DMAREG0(r) (((r) - DWMREG0) >> 2) -#define DMAREG1(r) ((((r) - DWMREG1) >> 2 ) | 0x0100) -#define DMAREG(r) (ISREG0(r) ? DMAREG0(r) : DMAREG1(r)) - -#define MMREG0 0x0000 -#define MMREG0_END 0x00ff - -#define ISMMREG0(r) (((r) >= MMREG0) && ((r) <= MMREG0_END)) -#define MMSELECT0(r) (((r) << 2) + DWMREG0) -#define MMSELECT1(r) (((((r) & 0xff) << 2) + DWMREG1)) -#define MMSELECT(r) (ISMMREG0(r) ? MMSELECT0(r) : MMSELECT1(r)) - -/* ================================================================ - * DMA constants - */ - -/* DMA descriptor field indices: - * The descriptor fields are loaded into the read-only - * BM_* system bus master registers during a bus-master operation - */ -#define MACH64_DMA_FRAME_BUF_OFFSET 0 /* BM_FRAME_BUF_OFFSET */ -#define MACH64_DMA_SYS_MEM_ADDR 1 /* BM_SYSTEM_MEM_ADDR */ -#define MACH64_DMA_COMMAND 2 /* BM_COMMAND */ -#define MACH64_DMA_RESERVED 3 /* BM_STATUS */ - -/* BM_COMMAND descriptor field flags */ -#define MACH64_DMA_HOLD_OFFSET (1<<30) /* Don't increment DMA_FRAME_BUF_OFFSET */ -#define MACH64_DMA_EOL (1<<31) /* End of descriptor list flag */ - -#define MACH64_DMA_CHUNKSIZE 0x1000 /* 4kB per DMA descriptor */ -#define MACH64_APERTURE_OFFSET 0x7ff800 /* frame-buffer offset for gui-masters */ - -/* ================================================================ - * Ring operations - * - * Since the Mach64 bus master engine requires polling, these functions end - * up being called frequently, hence being inline. - */ - -static __inline__ void mach64_ring_start(drm_mach64_private_t * dev_priv) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - - DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n", - ring->head_addr, ring->head, ring->tail, ring->space); - - if (mach64_do_wait_for_idle(dev_priv) < 0) { - mach64_do_engine_reset(dev_priv); - } - - if (dev_priv->driver_mode != MACH64_MODE_MMIO) { - /* enable bus mastering and block 1 registers */ - MACH64_WRITE(MACH64_BUS_CNTL, - (MACH64_READ(MACH64_BUS_CNTL) & - ~MACH64_BUS_MASTER_DIS) - | MACH64_BUS_EXT_REG_EN); - mach64_do_wait_for_idle(dev_priv); - } - - /* reset descriptor table ring head */ - MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD, - ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB); - - dev_priv->ring_running = 1; -} - -static __inline__ void mach64_ring_resume(drm_mach64_private_t * dev_priv, - drm_mach64_descriptor_ring_t * ring) -{ - DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n", - ring->head_addr, ring->head, ring->tail, ring->space); - - /* reset descriptor table ring head */ - MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD, - ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB); - - if (dev_priv->driver_mode == MACH64_MODE_MMIO) { - mach64_do_dispatch_pseudo_dma(dev_priv); - } else { - /* enable GUI bus mastering, and sync the bus master to the GUI */ - MACH64_WRITE(MACH64_SRC_CNTL, - MACH64_SRC_BM_ENABLE | MACH64_SRC_BM_SYNC | - MACH64_SRC_BM_OP_SYSTEM_TO_REG); - - /* kick off the transfer */ - MACH64_WRITE(MACH64_DST_HEIGHT_WIDTH, 0); - if (dev_priv->driver_mode == MACH64_MODE_DMA_SYNC) { - if ((mach64_do_wait_for_idle(dev_priv)) < 0) { - DRM_ERROR("idle failed, resetting engine\n"); - mach64_dump_engine_info(dev_priv); - mach64_do_engine_reset(dev_priv); - return; - } - mach64_do_release_used_buffers(dev_priv); - } - } -} - -/** - * Poll the ring head and make sure the bus master is alive. - * - * Mach64's bus master engine will stop if there are no more entries to process. - * This function polls the engine for the last processed entry and calls - * mach64_ring_resume if there is an unprocessed entry. - * - * Note also that, since we update the ring tail while the bus master engine is - * in operation, it is possible that the last tail update was too late to be - * processed, and the bus master engine stops at the previous tail position. - * Therefore it is important to call this function frequently. - */ -static __inline__ void mach64_ring_tick(drm_mach64_private_t * dev_priv, - drm_mach64_descriptor_ring_t * ring) -{ - DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n", - ring->head_addr, ring->head, ring->tail, ring->space); - - if (!dev_priv->ring_running) { - mach64_ring_start(dev_priv); - - if (ring->head != ring->tail) { - mach64_ring_resume(dev_priv, ring); - } - } else { - /* GUI_ACTIVE must be read before BM_GUI_TABLE to - * correctly determine the ring head - */ - int gui_active = - MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE; - - ring->head_addr = MACH64_READ(MACH64_BM_GUI_TABLE) & 0xfffffff0; - - if (gui_active) { - /* If not idle, BM_GUI_TABLE points one descriptor - * past the current head - */ - if (ring->head_addr == ring->start_addr) { - ring->head_addr += ring->size; - } - ring->head_addr -= 4 * sizeof(u32); - } - - if (ring->head_addr < ring->start_addr || - ring->head_addr >= ring->start_addr + ring->size) { - DRM_ERROR("bad ring head address: 0x%08x\n", - ring->head_addr); - mach64_dump_ring_info(dev_priv); - mach64_do_engine_reset(dev_priv); - return; - } - - ring->head = (ring->head_addr - ring->start_addr) / sizeof(u32); - - if (!gui_active && ring->head != ring->tail) { - mach64_ring_resume(dev_priv, ring); - } - } -} - -static __inline__ void mach64_ring_stop(drm_mach64_private_t * dev_priv) -{ - DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n", - dev_priv->ring.head_addr, dev_priv->ring.head, - dev_priv->ring.tail, dev_priv->ring.space); - - /* restore previous SRC_CNTL to disable busmastering */ - mach64_do_wait_for_fifo(dev_priv, 1); - MACH64_WRITE(MACH64_SRC_CNTL, 0); - - /* disable busmastering but keep the block 1 registers enabled */ - mach64_do_wait_for_idle(dev_priv); - MACH64_WRITE(MACH64_BUS_CNTL, MACH64_READ(MACH64_BUS_CNTL) - | MACH64_BUS_MASTER_DIS | MACH64_BUS_EXT_REG_EN); - - dev_priv->ring_running = 0; -} - -static __inline__ void -mach64_update_ring_snapshot(drm_mach64_private_t * dev_priv) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - - DRM_DEBUG("\n"); - - mach64_ring_tick(dev_priv, ring); - - ring->space = (ring->head - ring->tail) * sizeof(u32); - if (ring->space <= 0) { - ring->space += ring->size; - } -} - -/* ================================================================ - * DMA macros - * - * Mach64's ring buffer doesn't take register writes directly. These - * have to be written indirectly in DMA buffers. These macros simplify - * the task of setting up a buffer, writing commands to it, and - * queuing the buffer in the ring. - */ - -#define DMALOCALS \ - drm_mach64_freelist_t *_entry = NULL; \ - struct drm_buf *_buf = NULL; \ - u32 *_buf_wptr; int _outcount - -#define GETBUFPTR( __buf ) \ -((dev_priv->is_pci) ? \ - ((u32 *)(__buf)->address) : \ - ((u32 *)((char *)dev_priv->dev_buffers->handle + (__buf)->offset))) - -#define GETBUFADDR( __buf ) ((u32)(__buf)->bus_address) - -#define GETRINGOFFSET() (_entry->ring_ofs) - -static __inline__ int mach64_find_pending_buf_entry(drm_mach64_private_t * - dev_priv, - drm_mach64_freelist_t ** - entry, struct drm_buf * buf) -{ - struct list_head *ptr; -#if MACH64_EXTRA_CHECKING - if (list_empty(&dev_priv->pending)) { - DRM_ERROR("Empty pending list in \n"); - return -EINVAL; - } -#endif - ptr = dev_priv->pending.prev; - *entry = list_entry(ptr, drm_mach64_freelist_t, list); - while ((*entry)->buf != buf) { - if (ptr == &dev_priv->pending) { - return -EFAULT; - } - ptr = ptr->prev; - *entry = list_entry(ptr, drm_mach64_freelist_t, list); - } - return 0; -} - -#define DMASETPTR( _p ) \ -do { \ - _buf = (_p); \ - _outcount = 0; \ - _buf_wptr = GETBUFPTR( _buf ); \ -} while(0) - -/* FIXME: use a private set of smaller buffers for state emits, clears, and swaps? */ -#define DMAGETPTR( file_priv, dev_priv, n ) \ -do { \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "DMAGETPTR( %d )\n", (n) ); \ - } \ - _buf = mach64_freelist_get( dev_priv ); \ - if (_buf == NULL) { \ - DRM_ERROR("couldn't get buffer in DMAGETPTR\n"); \ - return -EAGAIN; \ - } \ - if (_buf->pending) { \ - DRM_ERROR("pending buf in DMAGETPTR\n"); \ - return -EFAULT; \ - } \ - _buf->file_priv = file_priv; \ - _outcount = 0; \ - \ - _buf_wptr = GETBUFPTR( _buf ); \ -} while (0) - -#define DMAOUTREG( reg, val ) \ -do { \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( " DMAOUTREG( 0x%x = 0x%08x )\n", \ - reg, val ); \ - } \ - _buf_wptr[_outcount++] = cpu_to_le32(DMAREG(reg)); \ - _buf_wptr[_outcount++] = cpu_to_le32((val)); \ - _buf->used += 8; \ -} while (0) - -#define DMAADVANCE( dev_priv, _discard ) \ - do { \ - struct list_head *ptr; \ - int ret; \ - \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "DMAADVANCE() in \n" ); \ - } \ - \ - if (_buf->used <= 0) { \ - DRM_ERROR( "DMAADVANCE(): sending empty buf %d\n", \ - _buf->idx ); \ - return -EFAULT; \ - } \ - if (_buf->pending) { \ - /* This is a resued buffer, so we need to find it in the pending list */ \ - if ((ret = mach64_find_pending_buf_entry(dev_priv, &_entry, _buf))) { \ - DRM_ERROR( "DMAADVANCE(): couldn't find pending buf %d\n", _buf->idx ); \ - return ret; \ - } \ - if (_entry->discard) { \ - DRM_ERROR( "DMAADVANCE(): sending discarded pending buf %d\n", _buf->idx ); \ - return -EFAULT; \ - } \ - } else { \ - if (list_empty(&dev_priv->placeholders)) { \ - DRM_ERROR( "DMAADVANCE(): empty placeholder list\n"); \ - return -EFAULT; \ - } \ - ptr = dev_priv->placeholders.next; \ - list_del(ptr); \ - _entry = list_entry(ptr, drm_mach64_freelist_t, list); \ - _buf->pending = 1; \ - _entry->buf = _buf; \ - list_add_tail(ptr, &dev_priv->pending); \ - } \ - _entry->discard = (_discard); \ - if ((ret = mach64_add_buf_to_ring( dev_priv, _entry ))) \ - return ret; \ - } while (0) - -#define DMADISCARDBUF() \ - do { \ - if (_entry == NULL) { \ - int ret; \ - if ((ret = mach64_find_pending_buf_entry(dev_priv, &_entry, _buf))) { \ - DRM_ERROR( "couldn't find pending buf %d\n", \ - _buf->idx ); \ - return ret; \ - } \ - } \ - _entry->discard = 1; \ - } while(0) - -#define DMAADVANCEHOSTDATA( dev_priv ) \ - do { \ - struct list_head *ptr; \ - int ret; \ - \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "DMAADVANCEHOSTDATA() in \n" ); \ - } \ - \ - if (_buf->used <= 0) { \ - DRM_ERROR( "DMAADVANCEHOSTDATA(): sending empty buf %d\n", _buf->idx ); \ - return -EFAULT; \ - } \ - if (list_empty(&dev_priv->placeholders)) { \ - DRM_ERROR( "empty placeholder list in DMAADVANCEHOSTDATA()\n" ); \ - return -EFAULT; \ - } \ - \ - ptr = dev_priv->placeholders.next; \ - list_del(ptr); \ - _entry = list_entry(ptr, drm_mach64_freelist_t, list); \ - _entry->buf = _buf; \ - _entry->buf->pending = 1; \ - list_add_tail(ptr, &dev_priv->pending); \ - _entry->discard = 1; \ - if ((ret = mach64_add_hostdata_buf_to_ring( dev_priv, _entry ))) \ - return ret; \ - } while (0) - -#endif /* __MACH64_DRV_H__ */ diff --git a/sys/dev/drm/mach64_irq.c b/sys/dev/drm/mach64_irq.c deleted file mode 100644 index d4458d6cb87c..000000000000 --- a/sys/dev/drm/mach64_irq.c +++ /dev/null @@ -1,162 +0,0 @@ -/* mach64_irq.c -- IRQ handling for ATI Mach64 -*- linux-c -*- - * Created: Tue Feb 25, 2003 by Leif Delgass, based on radeon_irq.c/r128_irq.c - */ -/*- - * Copyright (C) The Weather Channel, Inc. 2002. - * Copyright 2003 Leif Delgass - * All Rights Reserved. - * - * The Weather Channel (TM) funded Tungsten Graphics to develop the - * initial release of the Radeon 8500 driver under the XFree86 license. - * This notice must be preserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Eric Anholt <anholt@FreeBSD.org> - * Leif Delgass <ldelgass@retinalburn.net> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/mach64_drm.h" -#include "dev/drm/mach64_drv.h" - -irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS) -{ - struct drm_device *dev = arg; - drm_mach64_private_t *dev_priv = dev->dev_private; - int status; - - status = MACH64_READ(MACH64_CRTC_INT_CNTL); - - /* VBLANK interrupt */ - if (status & MACH64_CRTC_VBLANK_INT) { - /* Mask off all interrupt ack bits before setting the ack bit, since - * there may be other handlers outside the DRM. - * - * NOTE: On mach64, you need to keep the enable bits set when doing - * the ack, despite what the docs say about not acking and enabling - * in a single write. - */ - MACH64_WRITE(MACH64_CRTC_INT_CNTL, - (status & ~MACH64_CRTC_INT_ACKS) - | MACH64_CRTC_VBLANK_INT); - - atomic_inc(&dev_priv->vbl_received); - drm_handle_vblank(dev, 0); - return IRQ_HANDLED; - } - return IRQ_NONE; -} - -u32 mach64_get_vblank_counter(struct drm_device * dev, int crtc) -{ - const drm_mach64_private_t *const dev_priv = dev->dev_private; - - if (crtc != 0) - return 0; - - return atomic_read(&dev_priv->vbl_received); -} - -int mach64_enable_vblank(struct drm_device * dev, int crtc) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL); - - if (crtc != 0) { - DRM_ERROR("tried to enable vblank on non-existent crtc %d\n", - crtc); - return -EINVAL; - } - - DRM_DEBUG("before enable vblank CRTC_INT_CTNL: 0x%08x\n", status); - - /* Turn on VBLANK interrupt */ - MACH64_WRITE(MACH64_CRTC_INT_CNTL, MACH64_READ(MACH64_CRTC_INT_CNTL) - | MACH64_CRTC_VBLANK_INT_EN); - - return 0; -} - -void mach64_disable_vblank(struct drm_device * dev, int crtc) -{ - if (crtc != 0) { - DRM_ERROR("tried to disable vblank on non-existent crtc %d\n", - crtc); - return; - } - - /* - * FIXME: implement proper interrupt disable by using the vblank - * counter register (if available). - */ -} - -static void mach64_disable_vblank_local(struct drm_device * dev, int crtc) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL); - - if (crtc != 0) { - DRM_ERROR("tried to disable vblank on non-existent crtc %d\n", - crtc); - return; - } - - DRM_DEBUG("before disable vblank CRTC_INT_CTNL: 0x%08x\n", status); - - /* Disable and clear VBLANK interrupt */ - MACH64_WRITE(MACH64_CRTC_INT_CNTL, (status & ~MACH64_CRTC_VBLANK_INT_EN) - | MACH64_CRTC_VBLANK_INT); -} - -void mach64_driver_irq_preinstall(struct drm_device * dev) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - - u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL); - - DRM_DEBUG("before install CRTC_INT_CTNL: 0x%08x\n", status); - - mach64_disable_vblank_local(dev, 0); -} - -int mach64_driver_irq_postinstall(struct drm_device * dev) -{ - return 0; -} - -void mach64_driver_irq_uninstall(struct drm_device * dev) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - if (!dev_priv) - return; - - mach64_disable_vblank_local(dev, 0); - - DRM_DEBUG("after uninstall CRTC_INT_CTNL: 0x%08x\n", - MACH64_READ(MACH64_CRTC_INT_CNTL)); -} diff --git a/sys/dev/drm/mach64_state.c b/sys/dev/drm/mach64_state.c deleted file mode 100644 index a72244fb1fd9..000000000000 --- a/sys/dev/drm/mach64_state.c +++ /dev/null @@ -1,914 +0,0 @@ -/* mach64_state.c -- State support for mach64 (Rage Pro) driver -*- linux-c -*- - * Created: Sun Dec 03 19:20:26 2000 by gareth@valinux.com - */ -/*- - * Copyright 2000 Gareth Hughes - * Copyright 2002-2003 Leif Delgass - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Leif Delgass <ldelgass@retinalburn.net> - * José Fonseca <j_r_fonseca@yahoo.co.uk> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/mach64_drm.h" -#include "dev/drm/mach64_drv.h" - -/* Interface history: - * - * 1.0 - Initial mach64 DRM - * - */ -struct drm_ioctl_desc mach64_ioctls[] = { - DRM_IOCTL_DEF(DRM_MACH64_INIT, mach64_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_MACH64_CLEAR, mach64_dma_clear, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MACH64_SWAP, mach64_dma_swap, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MACH64_IDLE, mach64_dma_idle, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MACH64_RESET, mach64_engine_reset, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MACH64_VERTEX, mach64_dma_vertex, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MACH64_BLIT, mach64_dma_blit, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MACH64_FLUSH, mach64_dma_flush, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MACH64_GETPARAM, mach64_get_param, DRM_AUTH), -}; - -int mach64_max_ioctl = DRM_ARRAY_SIZE(mach64_ioctls); - -/* ================================================================ - * DMA hardware state programming functions - */ - -static void mach64_print_dirty(const char *msg, unsigned int flags) -{ - DRM_DEBUG("%s: (0x%x) %s%s%s%s%s%s%s%s%s%s%s%s\n", - msg, - flags, - (flags & MACH64_UPLOAD_DST_OFF_PITCH) ? "dst_off_pitch, " : - "", - (flags & MACH64_UPLOAD_Z_ALPHA_CNTL) ? "z_alpha_cntl, " : "", - (flags & MACH64_UPLOAD_SCALE_3D_CNTL) ? "scale_3d_cntl, " : - "", (flags & MACH64_UPLOAD_DP_FOG_CLR) ? "dp_fog_clr, " : "", - (flags & MACH64_UPLOAD_DP_WRITE_MASK) ? "dp_write_mask, " : - "", - (flags & MACH64_UPLOAD_DP_PIX_WIDTH) ? "dp_pix_width, " : "", - (flags & MACH64_UPLOAD_SETUP_CNTL) ? "setup_cntl, " : "", - (flags & MACH64_UPLOAD_MISC) ? "misc, " : "", - (flags & MACH64_UPLOAD_TEXTURE) ? "texture, " : "", - (flags & MACH64_UPLOAD_TEX0IMAGE) ? "tex0 image, " : "", - (flags & MACH64_UPLOAD_TEX1IMAGE) ? "tex1 image, " : "", - (flags & MACH64_UPLOAD_CLIPRECTS) ? "cliprects, " : ""); -} - -/* Mach64 doesn't have hardware cliprects, just one hardware scissor, - * so the GL scissor is intersected with each cliprect here - */ -/* This function returns 0 on success, 1 for no intersection, and - * negative for an error - */ -static int mach64_emit_cliprect(struct drm_file *file_priv, - drm_mach64_private_t * dev_priv, - struct drm_clip_rect * box) -{ - u32 sc_left_right, sc_top_bottom; - struct drm_clip_rect scissor; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_context_regs_t *regs = &sarea_priv->context_state; - DMALOCALS; - - DRM_DEBUG("box=%p\n", box); - - /* Get GL scissor */ - /* FIXME: store scissor in SAREA as a cliprect instead of in - * hardware format, or do intersection client-side - */ - scissor.x1 = regs->sc_left_right & 0xffff; - scissor.x2 = (regs->sc_left_right & 0xffff0000) >> 16; - scissor.y1 = regs->sc_top_bottom & 0xffff; - scissor.y2 = (regs->sc_top_bottom & 0xffff0000) >> 16; - - /* Intersect GL scissor with cliprect */ - if (box->x1 > scissor.x1) - scissor.x1 = box->x1; - if (box->y1 > scissor.y1) - scissor.y1 = box->y1; - if (box->x2 < scissor.x2) - scissor.x2 = box->x2; - if (box->y2 < scissor.y2) - scissor.y2 = box->y2; - /* positive return means skip */ - if (scissor.x1 >= scissor.x2) - return 1; - if (scissor.y1 >= scissor.y2) - return 1; - - DMAGETPTR(file_priv, dev_priv, 2); /* returns on failure to get buffer */ - - sc_left_right = ((scissor.x1 << 0) | (scissor.x2 << 16)); - sc_top_bottom = ((scissor.y1 << 0) | (scissor.y2 << 16)); - - DMAOUTREG(MACH64_SC_LEFT_RIGHT, sc_left_right); - DMAOUTREG(MACH64_SC_TOP_BOTTOM, sc_top_bottom); - - DMAADVANCE(dev_priv, 1); - - return 0; -} - -static __inline__ int mach64_emit_state(struct drm_file *file_priv, - drm_mach64_private_t * dev_priv) -{ - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_context_regs_t *regs = &sarea_priv->context_state; - unsigned int dirty = sarea_priv->dirty; - u32 offset = ((regs->tex_size_pitch & 0xf0) >> 2); - DMALOCALS; - - if (MACH64_VERBOSE) { - mach64_print_dirty(__FUNCTION__, dirty); - } else { - DRM_DEBUG("dirty=0x%08x\n", dirty); - } - - DMAGETPTR(file_priv, dev_priv, 17); /* returns on failure to get buffer */ - - if (dirty & MACH64_UPLOAD_MISC) { - DMAOUTREG(MACH64_DP_MIX, regs->dp_mix); - DMAOUTREG(MACH64_DP_SRC, regs->dp_src); - DMAOUTREG(MACH64_CLR_CMP_CNTL, regs->clr_cmp_cntl); - DMAOUTREG(MACH64_GUI_TRAJ_CNTL, regs->gui_traj_cntl); - sarea_priv->dirty &= ~MACH64_UPLOAD_MISC; - } - - if (dirty & MACH64_UPLOAD_DST_OFF_PITCH) { - DMAOUTREG(MACH64_DST_OFF_PITCH, regs->dst_off_pitch); - sarea_priv->dirty &= ~MACH64_UPLOAD_DST_OFF_PITCH; - } - if (dirty & MACH64_UPLOAD_Z_OFF_PITCH) { - DMAOUTREG(MACH64_Z_OFF_PITCH, regs->z_off_pitch); - sarea_priv->dirty &= ~MACH64_UPLOAD_Z_OFF_PITCH; - } - if (dirty & MACH64_UPLOAD_Z_ALPHA_CNTL) { - DMAOUTREG(MACH64_Z_CNTL, regs->z_cntl); - DMAOUTREG(MACH64_ALPHA_TST_CNTL, regs->alpha_tst_cntl); - sarea_priv->dirty &= ~MACH64_UPLOAD_Z_ALPHA_CNTL; - } - if (dirty & MACH64_UPLOAD_SCALE_3D_CNTL) { - DMAOUTREG(MACH64_SCALE_3D_CNTL, regs->scale_3d_cntl); - sarea_priv->dirty &= ~MACH64_UPLOAD_SCALE_3D_CNTL; - } - if (dirty & MACH64_UPLOAD_DP_FOG_CLR) { - DMAOUTREG(MACH64_DP_FOG_CLR, regs->dp_fog_clr); - sarea_priv->dirty &= ~MACH64_UPLOAD_DP_FOG_CLR; - } - if (dirty & MACH64_UPLOAD_DP_WRITE_MASK) { - DMAOUTREG(MACH64_DP_WRITE_MASK, regs->dp_write_mask); - sarea_priv->dirty &= ~MACH64_UPLOAD_DP_WRITE_MASK; - } - if (dirty & MACH64_UPLOAD_DP_PIX_WIDTH) { - DMAOUTREG(MACH64_DP_PIX_WIDTH, regs->dp_pix_width); - sarea_priv->dirty &= ~MACH64_UPLOAD_DP_PIX_WIDTH; - } - if (dirty & MACH64_UPLOAD_SETUP_CNTL) { - DMAOUTREG(MACH64_SETUP_CNTL, regs->setup_cntl); - sarea_priv->dirty &= ~MACH64_UPLOAD_SETUP_CNTL; - } - - if (dirty & MACH64_UPLOAD_TEXTURE) { - DMAOUTREG(MACH64_TEX_SIZE_PITCH, regs->tex_size_pitch); - DMAOUTREG(MACH64_TEX_CNTL, regs->tex_cntl); - DMAOUTREG(MACH64_SECONDARY_TEX_OFF, regs->secondary_tex_off); - DMAOUTREG(MACH64_TEX_0_OFF + offset, regs->tex_offset); - sarea_priv->dirty &= ~MACH64_UPLOAD_TEXTURE; - } - - DMAADVANCE(dev_priv, 1); - - sarea_priv->dirty &= MACH64_UPLOAD_CLIPRECTS; - - return 0; - -} - -/* ================================================================ - * DMA command dispatch functions - */ - -static int mach64_dma_dispatch_clear(struct drm_device * dev, - struct drm_file *file_priv, - unsigned int flags, - int cx, int cy, int cw, int ch, - unsigned int clear_color, - unsigned int clear_depth) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_context_regs_t *ctx = &sarea_priv->context_state; - int nbox = sarea_priv->nbox; - struct drm_clip_rect *pbox = sarea_priv->boxes; - u32 fb_bpp, depth_bpp; - int i; - DMALOCALS; - - DRM_DEBUG("\n"); - - switch (dev_priv->fb_bpp) { - case 16: - fb_bpp = MACH64_DATATYPE_RGB565; - break; - case 32: - fb_bpp = MACH64_DATATYPE_ARGB8888; - break; - default: - return -EINVAL; - } - switch (dev_priv->depth_bpp) { - case 16: - depth_bpp = MACH64_DATATYPE_RGB565; - break; - case 24: - case 32: - depth_bpp = MACH64_DATATYPE_ARGB8888; - break; - default: - return -EINVAL; - } - - if (!nbox) - return 0; - - DMAGETPTR(file_priv, dev_priv, nbox * 31); /* returns on failure to get buffer */ - - for (i = 0; i < nbox; i++) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG("dispatch clear %d,%d-%d,%d flags 0x%x\n", - pbox[i].x1, pbox[i].y1, - pbox[i].x2, pbox[i].y2, flags); - - if (flags & (MACH64_FRONT | MACH64_BACK)) { - /* Setup for color buffer clears - */ - - DMAOUTREG(MACH64_Z_CNTL, 0); - DMAOUTREG(MACH64_SCALE_3D_CNTL, 0); - - DMAOUTREG(MACH64_SC_LEFT_RIGHT, ctx->sc_left_right); - DMAOUTREG(MACH64_SC_TOP_BOTTOM, ctx->sc_top_bottom); - - DMAOUTREG(MACH64_CLR_CMP_CNTL, 0); - DMAOUTREG(MACH64_GUI_TRAJ_CNTL, - (MACH64_DST_X_LEFT_TO_RIGHT | - MACH64_DST_Y_TOP_TO_BOTTOM)); - - DMAOUTREG(MACH64_DP_PIX_WIDTH, ((fb_bpp << 0) | - (fb_bpp << 4) | - (fb_bpp << 8) | - (fb_bpp << 16) | - (fb_bpp << 28))); - - DMAOUTREG(MACH64_DP_FRGD_CLR, clear_color); - DMAOUTREG(MACH64_DP_WRITE_MASK, ctx->dp_write_mask); - DMAOUTREG(MACH64_DP_MIX, (MACH64_BKGD_MIX_D | - MACH64_FRGD_MIX_S)); - DMAOUTREG(MACH64_DP_SRC, (MACH64_BKGD_SRC_FRGD_CLR | - MACH64_FRGD_SRC_FRGD_CLR | - MACH64_MONO_SRC_ONE)); - - } - - if (flags & MACH64_FRONT) { - - DMAOUTREG(MACH64_DST_OFF_PITCH, - dev_priv->front_offset_pitch); - DMAOUTREG(MACH64_DST_X_Y, (y << 16) | x); - DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w); - - } - - if (flags & MACH64_BACK) { - - DMAOUTREG(MACH64_DST_OFF_PITCH, - dev_priv->back_offset_pitch); - DMAOUTREG(MACH64_DST_X_Y, (y << 16) | x); - DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w); - - } - - if (flags & MACH64_DEPTH) { - /* Setup for depth buffer clear - */ - DMAOUTREG(MACH64_Z_CNTL, 0); - DMAOUTREG(MACH64_SCALE_3D_CNTL, 0); - - DMAOUTREG(MACH64_SC_LEFT_RIGHT, ctx->sc_left_right); - DMAOUTREG(MACH64_SC_TOP_BOTTOM, ctx->sc_top_bottom); - - DMAOUTREG(MACH64_CLR_CMP_CNTL, 0); - DMAOUTREG(MACH64_GUI_TRAJ_CNTL, - (MACH64_DST_X_LEFT_TO_RIGHT | - MACH64_DST_Y_TOP_TO_BOTTOM)); - - DMAOUTREG(MACH64_DP_PIX_WIDTH, ((depth_bpp << 0) | - (depth_bpp << 4) | - (depth_bpp << 8) | - (depth_bpp << 16) | - (depth_bpp << 28))); - - DMAOUTREG(MACH64_DP_FRGD_CLR, clear_depth); - DMAOUTREG(MACH64_DP_WRITE_MASK, 0xffffffff); - DMAOUTREG(MACH64_DP_MIX, (MACH64_BKGD_MIX_D | - MACH64_FRGD_MIX_S)); - DMAOUTREG(MACH64_DP_SRC, (MACH64_BKGD_SRC_FRGD_CLR | - MACH64_FRGD_SRC_FRGD_CLR | - MACH64_MONO_SRC_ONE)); - - DMAOUTREG(MACH64_DST_OFF_PITCH, - dev_priv->depth_offset_pitch); - DMAOUTREG(MACH64_DST_X_Y, (y << 16) | x); - DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w); - } - } - - DMAADVANCE(dev_priv, 1); - - return 0; -} - -static int mach64_dma_dispatch_swap(struct drm_device * dev, - struct drm_file *file_priv) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - struct drm_clip_rect *pbox = sarea_priv->boxes; - u32 fb_bpp; - int i; - DMALOCALS; - - DRM_DEBUG("\n"); - - switch (dev_priv->fb_bpp) { - case 16: - fb_bpp = MACH64_DATATYPE_RGB565; - break; - case 32: - default: - fb_bpp = MACH64_DATATYPE_ARGB8888; - break; - } - - if (!nbox) - return 0; - - DMAGETPTR(file_priv, dev_priv, 13 + nbox * 4); /* returns on failure to get buffer */ - - DMAOUTREG(MACH64_Z_CNTL, 0); - DMAOUTREG(MACH64_SCALE_3D_CNTL, 0); - - DMAOUTREG(MACH64_SC_LEFT_RIGHT, 0 | (8191 << 16)); /* no scissor */ - DMAOUTREG(MACH64_SC_TOP_BOTTOM, 0 | (16383 << 16)); - - DMAOUTREG(MACH64_CLR_CMP_CNTL, 0); - DMAOUTREG(MACH64_GUI_TRAJ_CNTL, (MACH64_DST_X_LEFT_TO_RIGHT | - MACH64_DST_Y_TOP_TO_BOTTOM)); - - DMAOUTREG(MACH64_DP_PIX_WIDTH, ((fb_bpp << 0) | - (fb_bpp << 4) | - (fb_bpp << 8) | - (fb_bpp << 16) | (fb_bpp << 28))); - - DMAOUTREG(MACH64_DP_WRITE_MASK, 0xffffffff); - DMAOUTREG(MACH64_DP_MIX, (MACH64_BKGD_MIX_D | MACH64_FRGD_MIX_S)); - DMAOUTREG(MACH64_DP_SRC, (MACH64_BKGD_SRC_BKGD_CLR | - MACH64_FRGD_SRC_BLIT | MACH64_MONO_SRC_ONE)); - - DMAOUTREG(MACH64_SRC_OFF_PITCH, dev_priv->back_offset_pitch); - DMAOUTREG(MACH64_DST_OFF_PITCH, dev_priv->front_offset_pitch); - - for (i = 0; i < nbox; i++) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG("dispatch swap %d,%d-%d,%d\n", - pbox[i].x1, pbox[i].y1, pbox[i].x2, pbox[i].y2); - - DMAOUTREG(MACH64_SRC_WIDTH1, w); - DMAOUTREG(MACH64_SRC_Y_X, (x << 16) | y); - DMAOUTREG(MACH64_DST_Y_X, (x << 16) | y); - DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w); - - } - - DMAADVANCE(dev_priv, 1); - - if (dev_priv->driver_mode == MACH64_MODE_DMA_ASYNC) { - for (i = 0; i < MACH64_MAX_QUEUED_FRAMES - 1; i++) { - dev_priv->frame_ofs[i] = dev_priv->frame_ofs[i + 1]; - } - dev_priv->frame_ofs[i] = GETRINGOFFSET(); - - dev_priv->sarea_priv->frames_queued++; - } - - return 0; -} - -static int mach64_do_get_frames_queued(drm_mach64_private_t * dev_priv) -{ - drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - int i, start; - u32 head, tail, ofs; - - DRM_DEBUG("\n"); - - if (sarea_priv->frames_queued == 0) - return 0; - - tail = ring->tail; - mach64_ring_tick(dev_priv, ring); - head = ring->head; - - start = (MACH64_MAX_QUEUED_FRAMES - - DRM_MIN(MACH64_MAX_QUEUED_FRAMES, sarea_priv->frames_queued)); - - if (head == tail) { - sarea_priv->frames_queued = 0; - for (i = start; i < MACH64_MAX_QUEUED_FRAMES; i++) { - dev_priv->frame_ofs[i] = ~0; - } - return 0; - } - - for (i = start; i < MACH64_MAX_QUEUED_FRAMES; i++) { - ofs = dev_priv->frame_ofs[i]; - DRM_DEBUG("frame_ofs[%d] ofs: %d\n", i, ofs); - if (ofs == ~0 || - (head < tail && (ofs < head || ofs >= tail)) || - (head > tail && (ofs < head && ofs >= tail))) { - sarea_priv->frames_queued = - (MACH64_MAX_QUEUED_FRAMES - 1) - i; - dev_priv->frame_ofs[i] = ~0; - } - } - - return sarea_priv->frames_queued; -} - -/* Copy and verify a client submited buffer. - * FIXME: Make an assembly optimized version - */ -static __inline__ int copy_from_user_vertex(u32 *to, - const u32 __user *ufrom, - unsigned long bytes) -{ - unsigned long n = bytes; /* dwords remaining in buffer */ - u32 *from, *orig_from; - - from = drm_alloc(bytes, DRM_MEM_DRIVER); - if (from == NULL) - return -ENOMEM; - - if (DRM_COPY_FROM_USER(from, ufrom, bytes)) { - drm_free(from, bytes, DRM_MEM_DRIVER); - return -EFAULT; - } - orig_from = from; /* we'll be modifying the "from" ptr, so save it */ - - n >>= 2; - - while (n > 1) { - u32 data, reg, count; - - data = *from++; - - n--; - - reg = le32_to_cpu(data); - count = (reg >> 16) + 1; - if (count <= n) { - n -= count; - reg &= 0xffff; - - /* This is an exact match of Mach64's Setup Engine registers, - * excluding SETUP_CNTL (1_C1). - */ - if ((reg >= 0x0190 && reg < 0x01c1) || - (reg >= 0x01ca && reg <= 0x01cf)) { - *to++ = data; - memcpy(to, from, count << 2); - from += count; - to += count; - } else { - DRM_ERROR("Got bad command: 0x%04x\n", reg); - drm_free(orig_from, bytes, DRM_MEM_DRIVER); - return -EACCES; - } - } else { - DRM_ERROR - ("Got bad command count(=%u) dwords remaining=%lu\n", - count, n); - drm_free(orig_from, bytes, DRM_MEM_DRIVER); - return -EINVAL; - } - } - - drm_free(orig_from, bytes, DRM_MEM_DRIVER); - if (n == 0) - return 0; - else { - DRM_ERROR("Bad buf->used(=%lu)\n", bytes); - return -EINVAL; - } -} - -static int mach64_dma_dispatch_vertex(struct drm_device * dev, - struct drm_file *file_priv, - drm_mach64_vertex_t * vertex) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - struct drm_buf *copy_buf; - void *buf = vertex->buf; - unsigned long used = vertex->used; - int ret = 0; - int i = 0; - int done = 0; - int verify_ret = 0; - DMALOCALS; - - DRM_DEBUG("buf=%p used=%lu nbox=%d\n", - buf, used, sarea_priv->nbox); - - if (!used) - goto _vertex_done; - - copy_buf = mach64_freelist_get(dev_priv); - if (copy_buf == NULL) { - DRM_ERROR("couldn't get buffer\n"); - return -EAGAIN; - } - - /* Mach64's vertex data is actually register writes. To avoid security - * compromises these register writes have to be verified and copied from - * user space into a private DMA buffer. - */ - verify_ret = copy_from_user_vertex(GETBUFPTR(copy_buf), buf, used); - - if (verify_ret != 0) { - mach64_freelist_put(dev_priv, copy_buf); - goto _vertex_done; - } - - copy_buf->used = used; - - DMASETPTR(copy_buf); - - if (sarea_priv->dirty & ~MACH64_UPLOAD_CLIPRECTS) { - ret = mach64_emit_state(file_priv, dev_priv); - if (ret < 0) - return ret; - } - - do { - /* Emit the next cliprect */ - if (i < sarea_priv->nbox) { - ret = mach64_emit_cliprect(file_priv, dev_priv, - &sarea_priv->boxes[i]); - if (ret < 0) { - /* failed to get buffer */ - return ret; - } else if (ret != 0) { - /* null intersection with scissor */ - continue; - } - } - if ((i >= sarea_priv->nbox - 1)) - done = 1; - - /* Add the buffer to the DMA queue */ - DMAADVANCE(dev_priv, done); - - } while (++i < sarea_priv->nbox); - - if (!done) { - if (copy_buf->pending) { - DMADISCARDBUF(); - } else { - /* This buffer wasn't used (no cliprects), so place it - * back on the free list - */ - mach64_freelist_put(dev_priv, copy_buf); - } - } - -_vertex_done: - sarea_priv->dirty &= ~MACH64_UPLOAD_CLIPRECTS; - sarea_priv->nbox = 0; - - return verify_ret; -} - -static __inline__ int copy_from_user_blit(u32 *to, - const u32 __user *ufrom, - unsigned long bytes) -{ - to = (u32 *)((char *)to + MACH64_HOSTDATA_BLIT_OFFSET); - - if (DRM_COPY_FROM_USER(to, ufrom, bytes)) { - return -EFAULT; - } - - return 0; -} - -static int mach64_dma_dispatch_blit(struct drm_device * dev, - struct drm_file *file_priv, - drm_mach64_blit_t * blit) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - int dword_shift, dwords; - unsigned long used; - struct drm_buf *copy_buf; - int verify_ret = 0; - DMALOCALS; - - /* The compiler won't optimize away a division by a variable, - * even if the only legal values are powers of two. Thus, we'll - * use a shift instead. - */ - switch (blit->format) { - case MACH64_DATATYPE_ARGB8888: - dword_shift = 0; - break; - case MACH64_DATATYPE_ARGB1555: - case MACH64_DATATYPE_RGB565: - case MACH64_DATATYPE_VYUY422: - case MACH64_DATATYPE_YVYU422: - case MACH64_DATATYPE_ARGB4444: - dword_shift = 1; - break; - case MACH64_DATATYPE_CI8: - case MACH64_DATATYPE_RGB8: - dword_shift = 2; - break; - default: - DRM_ERROR("invalid blit format %d\n", blit->format); - return -EINVAL; - } - - /* Set buf->used to the bytes of blit data based on the blit dimensions - * and verify the size. When the setup is emitted to the buffer with - * the DMA* macros below, buf->used is incremented to include the bytes - * used for setup as well as the blit data. - */ - dwords = (blit->width * blit->height) >> dword_shift; - used = dwords << 2; - if (used <= 0 || - used > MACH64_BUFFER_SIZE - MACH64_HOSTDATA_BLIT_OFFSET) { - DRM_ERROR("Invalid blit size: %lu bytes\n", used); - return -EINVAL; - } - - copy_buf = mach64_freelist_get(dev_priv); - if (copy_buf == NULL) { - DRM_ERROR("couldn't get buffer\n"); - return -EAGAIN; - } - - /* Copy the blit data from userspace. - * - * XXX: This is overkill. The most efficient solution would be having - * two sets of buffers (one set private for vertex data, the other set - * client-writable for blits). However that would bring more complexity - * and would break backward compatibility. The solution currently - * implemented is keeping all buffers private, allowing to secure the - * driver, without increasing complexity at the expense of some speed - * transferring data. - */ - verify_ret = copy_from_user_blit(GETBUFPTR(copy_buf), blit->buf, used); - - if (verify_ret != 0) { - mach64_freelist_put(dev_priv, copy_buf); - goto _blit_done; - } - - copy_buf->used = used; - - /* FIXME: Use a last buffer flag and reduce the state emitted for subsequent, - * continuation buffers? - */ - - /* Blit via BM_HOSTDATA (gui-master) - like HOST_DATA[0-15], but doesn't require - * a register command every 16 dwords. State setup is added at the start of the - * buffer -- the client leaves space for this based on MACH64_HOSTDATA_BLIT_OFFSET - */ - DMASETPTR(copy_buf); - - DMAOUTREG(MACH64_Z_CNTL, 0); - DMAOUTREG(MACH64_SCALE_3D_CNTL, 0); - - DMAOUTREG(MACH64_SC_LEFT_RIGHT, 0 | (8191 << 16)); /* no scissor */ - DMAOUTREG(MACH64_SC_TOP_BOTTOM, 0 | (16383 << 16)); - - DMAOUTREG(MACH64_CLR_CMP_CNTL, 0); /* disable */ - DMAOUTREG(MACH64_GUI_TRAJ_CNTL, - MACH64_DST_X_LEFT_TO_RIGHT | MACH64_DST_Y_TOP_TO_BOTTOM); - - DMAOUTREG(MACH64_DP_PIX_WIDTH, (blit->format << 0) /* dst pix width */ - |(blit->format << 4) /* composite pix width */ - |(blit->format << 8) /* src pix width */ - |(blit->format << 16) /* host data pix width */ - |(blit->format << 28) /* scaler/3D pix width */ - ); - - DMAOUTREG(MACH64_DP_WRITE_MASK, 0xffffffff); /* enable all planes */ - DMAOUTREG(MACH64_DP_MIX, MACH64_BKGD_MIX_D | MACH64_FRGD_MIX_S); - DMAOUTREG(MACH64_DP_SRC, - MACH64_BKGD_SRC_BKGD_CLR - | MACH64_FRGD_SRC_HOST | MACH64_MONO_SRC_ONE); - - DMAOUTREG(MACH64_DST_OFF_PITCH, - (blit->pitch << 22) | (blit->offset >> 3)); - DMAOUTREG(MACH64_DST_X_Y, (blit->y << 16) | blit->x); - DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (blit->height << 16) | blit->width); - - DRM_DEBUG("%lu bytes\n", used); - - /* Add the buffer to the queue */ - DMAADVANCEHOSTDATA(dev_priv); - -_blit_done: - return verify_ret; -} - -/* ================================================================ - * IOCTL functions - */ - -int mach64_dma_clear(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_clear_t *clear = data; - int ret; - - DRM_DEBUG("pid=%d\n", DRM_CURRENTPID); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS) - sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS; - - ret = mach64_dma_dispatch_clear(dev, file_priv, clear->flags, - clear->x, clear->y, clear->w, clear->h, - clear->clear_color, - clear->clear_depth); - - /* Make sure we restore the 3D state next time. - */ - sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT | MACH64_UPLOAD_MISC); - return ret; -} - -int mach64_dma_swap(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - int ret; - - DRM_DEBUG("pid=%d\n", DRM_CURRENTPID); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS) - sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS; - - ret = mach64_dma_dispatch_swap(dev, file_priv); - - /* Make sure we restore the 3D state next time. - */ - sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT | MACH64_UPLOAD_MISC); - return ret; -} - -int mach64_dma_vertex(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv; - drm_mach64_vertex_t *vertex = data; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } - sarea_priv = dev_priv->sarea_priv; - - DRM_DEBUG("pid=%d buf=%p used=%lu discard=%d\n", - DRM_CURRENTPID, - vertex->buf, vertex->used, vertex->discard); - - if (vertex->prim < 0 || vertex->prim > MACH64_PRIM_POLYGON) { - DRM_ERROR("buffer prim %d\n", vertex->prim); - return -EINVAL; - } - - if (vertex->used > MACH64_BUFFER_SIZE || (vertex->used & 3) != 0) { - DRM_ERROR("Invalid vertex buffer size: %lu bytes\n", - vertex->used); - return -EINVAL; - } - - if (sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS) - sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS; - - return mach64_dma_dispatch_vertex(dev, file_priv, vertex); -} - -int mach64_dma_blit(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mach64_blit_t *blit = data; - int ret; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - ret = mach64_dma_dispatch_blit(dev, file_priv, blit); - - /* Make sure we restore the 3D state next time. - */ - sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT | - MACH64_UPLOAD_MISC | MACH64_UPLOAD_CLIPRECTS); - - return ret; -} - -int mach64_get_param(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mach64_private_t *dev_priv = dev->dev_private; - drm_mach64_getparam_t *param = data; - int value; - - DRM_DEBUG("\n"); - - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } - - switch (param->param) { - case MACH64_PARAM_FRAMES_QUEUED: - /* Needs lock since it calls mach64_ring_tick() */ - LOCK_TEST_WITH_RETURN(dev, file_priv); - value = mach64_do_get_frames_queued(dev_priv); - break; - case MACH64_PARAM_IRQ_NR: - value = dev->irq; - break; - default: - return -EINVAL; - } - - if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) { - DRM_ERROR("copy_to_user\n"); - return -EFAULT; - } - - return 0; -} diff --git a/sys/dev/drm/mga_dma.c b/sys/dev/drm/mga_dma.c deleted file mode 100644 index b3a7a98a5d07..000000000000 --- a/sys/dev/drm/mga_dma.c +++ /dev/null @@ -1,1172 +0,0 @@ -/* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - */ -/* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/** - * \file mga_dma.c - * DMA support for MGA G200 / G400. - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Jeff Hartmann <jhartmann@valinux.com> - * \author Keith Whitwell <keith@tungstengraphics.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/drm_sarea.h" -#include "dev/drm/mga_drm.h" -#include "dev/drm/mga_drv.h" - -#define MGA_DEFAULT_USEC_TIMEOUT 10000 -#define MGA_FREELIST_DEBUG 0 - -#define MINIMAL_CLEANUP 0 -#define FULL_CLEANUP 1 -static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup); - -/* ================================================================ - * Engine control - */ - -int mga_do_wait_for_idle(drm_mga_private_t * dev_priv) -{ - u32 status = 0; - int i; - DRM_DEBUG("\n"); - - for (i = 0; i < dev_priv->usec_timeout; i++) { - status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK; - if (status == MGA_ENDPRDMASTS) { - MGA_WRITE8(MGA_CRTC_INDEX, 0); - return 0; - } - DRM_UDELAY(1); - } - -#if MGA_DMA_DEBUG - DRM_ERROR("failed!\n"); - DRM_INFO(" status=0x%08x\n", status); -#endif - return -EBUSY; -} - -static int mga_do_dma_reset(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - - DRM_DEBUG("\n"); - - /* The primary DMA stream should look like new right about now. - */ - primary->tail = 0; - primary->space = primary->size; - primary->last_flush = 0; - - sarea_priv->last_wrap = 0; - - /* FIXME: Reset counters, buffer ages etc... - */ - - /* FIXME: What else do we need to reinitialize? WARP stuff? - */ - - return 0; -} - -/* ================================================================ - * Primary DMA stream - */ - -void mga_do_dma_flush(drm_mga_private_t * dev_priv) -{ - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - u32 head, tail; - u32 status = 0; - int i; - DMA_LOCALS; - DRM_DEBUG("\n"); - - /* We need to wait so that we can do an safe flush */ - for (i = 0; i < dev_priv->usec_timeout; i++) { - status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK; - if (status == MGA_ENDPRDMASTS) - break; - DRM_UDELAY(1); - } - - if (primary->tail == primary->last_flush) { - DRM_DEBUG(" bailing out...\n"); - return; - } - - tail = primary->tail + dev_priv->primary->offset; - - /* We need to pad the stream between flushes, as the card - * actually (partially?) reads the first of these commands. - * See page 4-16 in the G400 manual, middle of the page or so. - */ - BEGIN_DMA(1); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000); - - ADVANCE_DMA(); - - primary->last_flush = primary->tail; - - head = MGA_READ(MGA_PRIMADDRESS); - - if (head <= tail) { - primary->space = primary->size - primary->tail; - } else { - primary->space = head - tail; - } - - DRM_DEBUG(" head = 0x%06lx\n", head - dev_priv->primary->offset); - DRM_DEBUG(" tail = 0x%06lx\n", tail - dev_priv->primary->offset); - DRM_DEBUG(" space = 0x%06x\n", primary->space); - - mga_flush_write_combine(); - MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access); - - DRM_DEBUG("done.\n"); -} - -void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv) -{ - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - u32 head, tail; - DMA_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_DMA_WRAP(); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000); - - ADVANCE_DMA(); - - tail = primary->tail + dev_priv->primary->offset; - - primary->tail = 0; - primary->last_flush = 0; - primary->last_wrap++; - - head = MGA_READ(MGA_PRIMADDRESS); - - if (head == dev_priv->primary->offset) { - primary->space = primary->size; - } else { - primary->space = head - dev_priv->primary->offset; - } - - DRM_DEBUG(" head = 0x%06lx\n", head - dev_priv->primary->offset); - DRM_DEBUG(" tail = 0x%06x\n", primary->tail); - DRM_DEBUG(" wrap = %d\n", primary->last_wrap); - DRM_DEBUG(" space = 0x%06x\n", primary->space); - - mga_flush_write_combine(); - MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access); - - set_bit(0, &primary->wrapped); - DRM_DEBUG("done.\n"); -} - -void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv) -{ - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - u32 head = dev_priv->primary->offset; - DRM_DEBUG("\n"); - - sarea_priv->last_wrap++; - DRM_DEBUG(" wrap = %d\n", sarea_priv->last_wrap); - - mga_flush_write_combine(); - MGA_WRITE(MGA_PRIMADDRESS, head | MGA_DMA_GENERAL); - - clear_bit(0, &primary->wrapped); - DRM_DEBUG("done.\n"); -} - -/* ================================================================ - * Freelist management - */ - -#define MGA_BUFFER_USED ~0 -#define MGA_BUFFER_FREE 0 - -#if MGA_FREELIST_DEBUG -static void mga_freelist_print(struct drm_device * dev) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_freelist_t *entry; - - DRM_INFO("\n"); - DRM_INFO("current dispatch: last=0x%x done=0x%x\n", - dev_priv->sarea_priv->last_dispatch, - (unsigned int)(MGA_READ(MGA_PRIMADDRESS) - - dev_priv->primary->offset)); - DRM_INFO("current freelist:\n"); - - for (entry = dev_priv->head->next; entry; entry = entry->next) { - DRM_INFO(" %p idx=%2d age=0x%x 0x%06lx\n", - entry, entry->buf->idx, entry->age.head, - entry->age.head - dev_priv->primary->offset); - } - DRM_INFO("\n"); -} -#endif - -static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_priv) -{ - struct drm_device_dma *dma = dev->dma; - struct drm_buf *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_freelist_t *entry; - int i; - DRM_DEBUG("count=%d\n", dma->buf_count); - - dev_priv->head = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER); - if (dev_priv->head == NULL) - return -ENOMEM; - - memset(dev_priv->head, 0, sizeof(drm_mga_freelist_t)); - SET_AGE(&dev_priv->head->age, MGA_BUFFER_USED, 0); - - for (i = 0; i < dma->buf_count; i++) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - - entry = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER); - if (entry == NULL) - return -ENOMEM; - - memset(entry, 0, sizeof(drm_mga_freelist_t)); - - entry->next = dev_priv->head->next; - entry->prev = dev_priv->head; - SET_AGE(&entry->age, MGA_BUFFER_FREE, 0); - entry->buf = buf; - - if (dev_priv->head->next != NULL) - dev_priv->head->next->prev = entry; - if (entry->next == NULL) - dev_priv->tail = entry; - - buf_priv->list_entry = entry; - buf_priv->discard = 0; - buf_priv->dispatched = 0; - - dev_priv->head->next = entry; - } - - return 0; -} - -static void mga_freelist_cleanup(struct drm_device * dev) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_freelist_t *entry; - drm_mga_freelist_t *next; - DRM_DEBUG("\n"); - - entry = dev_priv->head; - while (entry) { - next = entry->next; - drm_free(entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER); - entry = next; - } - - dev_priv->head = dev_priv->tail = NULL; -} - -#if 0 -/* FIXME: Still needed? - */ -static void mga_freelist_reset(struct drm_device * dev) -{ - drm_device_dma_t *dma = dev->dma; - struct drm_buf *buf; - drm_mga_buf_priv_t *buf_priv; - int i; - - for (i = 0; i < dma->buf_count; i++) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - SET_AGE(&buf_priv->list_entry->age, MGA_BUFFER_FREE, 0); - } -} -#endif - -static struct drm_buf *mga_freelist_get(struct drm_device * dev) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_freelist_t *next; - drm_mga_freelist_t *prev; - drm_mga_freelist_t *tail = dev_priv->tail; - u32 head, wrap; - DRM_DEBUG("\n"); - - head = MGA_READ(MGA_PRIMADDRESS); - wrap = dev_priv->sarea_priv->last_wrap; - - DRM_DEBUG(" tail=0x%06lx %d\n", - tail->age.head ? - tail->age.head - dev_priv->primary->offset : 0, - tail->age.wrap); - DRM_DEBUG(" head=0x%06lx %d\n", - head - dev_priv->primary->offset, wrap); - - if (TEST_AGE(&tail->age, head, wrap)) { - prev = dev_priv->tail->prev; - next = dev_priv->tail; - prev->next = NULL; - next->prev = next->next = NULL; - dev_priv->tail = prev; - SET_AGE(&next->age, MGA_BUFFER_USED, 0); - return next->buf; - } - - DRM_DEBUG("returning NULL!\n"); - return NULL; -} - -int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_freelist_t *head, *entry, *prev; - - DRM_DEBUG("age=0x%06lx wrap=%d\n", - buf_priv->list_entry->age.head - - dev_priv->primary->offset, buf_priv->list_entry->age.wrap); - - entry = buf_priv->list_entry; - head = dev_priv->head; - - if (buf_priv->list_entry->age.head == MGA_BUFFER_USED) { - SET_AGE(&entry->age, MGA_BUFFER_FREE, 0); - prev = dev_priv->tail; - prev->next = entry; - entry->prev = prev; - entry->next = NULL; - } else { - prev = head->next; - head->next = entry; - prev->prev = entry; - entry->prev = head; - entry->next = prev; - } - - return 0; -} - -/* ================================================================ - * DMA initialization, cleanup - */ - -int mga_driver_load(struct drm_device *dev, unsigned long flags) -{ - drm_mga_private_t *dev_priv; - int ret; - - dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER); - if (!dev_priv) - return -ENOMEM; - - dev->dev_private = (void *)dev_priv; - memset(dev_priv, 0, sizeof(drm_mga_private_t)); - - dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT; - dev_priv->chipset = flags; - - dev_priv->mmio_base = drm_get_resource_start(dev, 1); - dev_priv->mmio_size = drm_get_resource_len(dev, 1); - - dev->counters += 3; - dev->types[6] = _DRM_STAT_IRQ; - dev->types[7] = _DRM_STAT_PRIMARY; - dev->types[8] = _DRM_STAT_SECONDARY; - - ret = drm_vblank_init(dev, 1); - - if (ret) { - (void) mga_driver_unload(dev); - return ret; - } - - return 0; -} - -/** - * Bootstrap the driver for AGP DMA. - * - * \todo - * Investigate whether there is any benefit to storing the WARP microcode in - * AGP memory. If not, the microcode may as well always be put in PCI - * memory. - * - * \todo - * This routine needs to set dma_bs->agp_mode to the mode actually configured - * in the hardware. Looking just at the Linux AGP driver code, I don't see - * an easy way to determine this. - * - * \sa mga_do_dma_bootstrap, mga_do_pci_dma_bootstrap - */ -static int mga_do_agp_dma_bootstrap(struct drm_device *dev, - drm_mga_dma_bootstrap_t * dma_bs) -{ - drm_mga_private_t *const dev_priv = - (drm_mga_private_t *)dev->dev_private; - unsigned int warp_size = mga_warp_microcode_size(dev_priv); - int err; - unsigned offset; - const unsigned secondary_size = dma_bs->secondary_bin_count - * dma_bs->secondary_bin_size; - const unsigned agp_size = (dma_bs->agp_size << 20); - struct drm_buf_desc req; - struct drm_agp_mode mode; - struct drm_agp_info info; - struct drm_agp_buffer agp_req; - struct drm_agp_binding bind_req; - - /* Acquire AGP. */ - err = drm_agp_acquire(dev); - if (err) { - DRM_ERROR("Unable to acquire AGP: %d\n", err); - return err; - } - - err = drm_agp_info(dev, &info); - if (err) { - DRM_ERROR("Unable to get AGP info: %d\n", err); - return err; - } - - mode.mode = (info.mode & ~0x07) | dma_bs->agp_mode; - err = drm_agp_enable(dev, mode); - if (err) { - DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); - return err; - } - - /* In addition to the usual AGP mode configuration, the G200 AGP cards - * need to have the AGP mode "manually" set. - */ - - if (dev_priv->chipset == MGA_CARD_TYPE_G200) { - if (mode.mode & 0x02) { - MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_ENABLE); - } else { - MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_DISABLE); - } - } - - /* Allocate and bind AGP memory. */ - agp_req.size = agp_size; - agp_req.type = 0; - err = drm_agp_alloc(dev, &agp_req); - if (err) { - dev_priv->agp_size = 0; - DRM_ERROR("Unable to allocate %uMB AGP memory\n", - dma_bs->agp_size); - return err; - } - - dev_priv->agp_size = agp_size; - dev_priv->agp_handle = agp_req.handle; - - bind_req.handle = agp_req.handle; - bind_req.offset = 0; - err = drm_agp_bind( dev, &bind_req ); - if (err) { - DRM_ERROR("Unable to bind AGP memory: %d\n", err); - return err; - } - - /* Make drm_addbufs happy by not trying to create a mapping for less - * than a page. - */ - if (warp_size < PAGE_SIZE) - warp_size = PAGE_SIZE; - - offset = 0; - err = drm_addmap(dev, offset, warp_size, - _DRM_AGP, _DRM_READ_ONLY, &dev_priv->warp); - if (err) { - DRM_ERROR("Unable to map WARP microcode: %d\n", err); - return err; - } - - offset += warp_size; - err = drm_addmap(dev, offset, dma_bs->primary_size, - _DRM_AGP, _DRM_READ_ONLY, & dev_priv->primary); - if (err) { - DRM_ERROR("Unable to map primary DMA region: %d\n", err); - return err; - } - - offset += dma_bs->primary_size; - err = drm_addmap(dev, offset, secondary_size, - _DRM_AGP, 0, & dev->agp_buffer_map); - if (err) { - DRM_ERROR("Unable to map secondary DMA region: %d\n", err); - return err; - } - - (void)memset( &req, 0, sizeof(req) ); - req.count = dma_bs->secondary_bin_count; - req.size = dma_bs->secondary_bin_size; - req.flags = _DRM_AGP_BUFFER; - req.agp_start = offset; - - err = drm_addbufs_agp(dev, &req); - if (err) { - DRM_ERROR("Unable to add secondary DMA buffers: %d\n", err); - return err; - } - -#ifdef __linux__ - { - struct drm_map_list *_entry; - unsigned long agp_token = 0; - - list_for_each_entry(_entry, &dev->maplist, head) { - if (_entry->map == dev->agp_buffer_map) - agp_token = _entry->user_token; - } - if (!agp_token) - return -EFAULT; - - dev->agp_buffer_token = agp_token; - } -#endif - - offset += secondary_size; - err = drm_addmap(dev, offset, agp_size - offset, - _DRM_AGP, 0, & dev_priv->agp_textures); - if (err) { - DRM_ERROR("Unable to map AGP texture region: %d\n", err); - return err; - } - - drm_core_ioremap(dev_priv->warp, dev); - drm_core_ioremap(dev_priv->primary, dev); - drm_core_ioremap(dev->agp_buffer_map, dev); - - if (!dev_priv->warp->virtual || - !dev_priv->primary->virtual || !dev->agp_buffer_map->virtual) { - DRM_ERROR("failed to ioremap agp regions! (%p, %p, %p)\n", - dev_priv->warp->virtual, dev_priv->primary->virtual, - dev->agp_buffer_map->virtual); - return -ENOMEM; - } - - dev_priv->dma_access = MGA_PAGPXFER; - dev_priv->wagp_enable = MGA_WAGP_ENABLE; - - DRM_INFO("Initialized card for AGP DMA.\n"); - return 0; -} - -/** - * Bootstrap the driver for PCI DMA. - * - * \todo - * The algorithm for decreasing the size of the primary DMA buffer could be - * better. The size should be rounded up to the nearest page size, then - * decrease the request size by a single page each pass through the loop. - * - * \todo - * Determine whether the maximum address passed to drm_pci_alloc is correct. - * The same goes for drm_addbufs_pci. - * - * \sa mga_do_dma_bootstrap, mga_do_agp_dma_bootstrap - */ -static int mga_do_pci_dma_bootstrap(struct drm_device * dev, - drm_mga_dma_bootstrap_t * dma_bs) -{ - drm_mga_private_t *const dev_priv = - (drm_mga_private_t *) dev->dev_private; - unsigned int warp_size = mga_warp_microcode_size(dev_priv); - unsigned int primary_size; - unsigned int bin_count; - int err; - struct drm_buf_desc req; - - - if (dev->dma == NULL) { - DRM_ERROR("dev->dma is NULL\n"); - return -EFAULT; - } - - /* Make drm_addbufs happy by not trying to create a mapping for less - * than a page. - */ - if (warp_size < PAGE_SIZE) - warp_size = PAGE_SIZE; - - /* The proper alignment is 0x100 for this mapping */ - err = drm_addmap(dev, 0, warp_size, _DRM_CONSISTENT, - _DRM_READ_ONLY, &dev_priv->warp); - if (err != 0) { - DRM_ERROR("Unable to create mapping for WARP microcode: %d\n", - err); - return err; - } - - /* Other than the bottom two bits being used to encode other - * information, there don't appear to be any restrictions on the - * alignment of the primary or secondary DMA buffers. - */ - - for (primary_size = dma_bs->primary_size; primary_size != 0; - primary_size >>= 1 ) { - /* The proper alignment for this mapping is 0x04 */ - err = drm_addmap(dev, 0, primary_size, _DRM_CONSISTENT, - _DRM_READ_ONLY, &dev_priv->primary); - if (!err) - break; - } - - if (err != 0) { - DRM_ERROR("Unable to allocate primary DMA region: %d\n", err); - return -ENOMEM; - } - - if (dev_priv->primary->size != dma_bs->primary_size) { - DRM_INFO("Primary DMA buffer size reduced from %u to %u.\n", - dma_bs->primary_size, - (unsigned)dev_priv->primary->size); - dma_bs->primary_size = dev_priv->primary->size; - } - - for (bin_count = dma_bs->secondary_bin_count; bin_count > 0; - bin_count-- ) { - (void)memset(&req, 0, sizeof(req)); - req.count = bin_count; - req.size = dma_bs->secondary_bin_size; - - err = drm_addbufs_pci(dev, &req); - if (!err) { - break; - } - } - - if (bin_count == 0) { - DRM_ERROR("Unable to add secondary DMA buffers: %d\n", err); - return err; - } - - if (bin_count != dma_bs->secondary_bin_count) { - DRM_INFO("Secondary PCI DMA buffer bin count reduced from %u " - "to %u.\n", dma_bs->secondary_bin_count, bin_count); - - dma_bs->secondary_bin_count = bin_count; - } - - dev_priv->dma_access = 0; - dev_priv->wagp_enable = 0; - - dma_bs->agp_mode = 0; - - DRM_INFO("Initialized card for PCI DMA.\n"); - return 0; -} - - -static int mga_do_dma_bootstrap(struct drm_device *dev, - drm_mga_dma_bootstrap_t *dma_bs) -{ - const int is_agp = (dma_bs->agp_mode != 0) && drm_device_is_agp(dev); - int err; - drm_mga_private_t *const dev_priv = - (drm_mga_private_t *) dev->dev_private; - - - dev_priv->used_new_dma_init = 1; - - /* The first steps are the same for both PCI and AGP based DMA. Map - * the cards MMIO registers and map a status page. - */ - err = drm_addmap(dev, dev_priv->mmio_base, dev_priv->mmio_size, - _DRM_REGISTERS, _DRM_READ_ONLY, & dev_priv->mmio); - if (err) { - DRM_ERROR("Unable to map MMIO region: %d\n", err); - return err; - } - - - err = drm_addmap(dev, 0, SAREA_MAX, _DRM_SHM, - _DRM_READ_ONLY | _DRM_LOCKED | _DRM_KERNEL, - & dev_priv->status); - if (err) { - DRM_ERROR("Unable to map status region: %d\n", err); - return err; - } - - - /* The DMA initialization procedure is slightly different for PCI and - * AGP cards. AGP cards just allocate a large block of AGP memory and - * carve off portions of it for internal uses. The remaining memory - * is returned to user-mode to be used for AGP textures. - */ - - if (is_agp) { - err = mga_do_agp_dma_bootstrap(dev, dma_bs); - } - - /* If we attempted to initialize the card for AGP DMA but failed, - * clean-up any mess that may have been created. - */ - - if (err) { - mga_do_cleanup_dma(dev, MINIMAL_CLEANUP); - } - - - /* Not only do we want to try and initialized PCI cards for PCI DMA, - * but we also try to initialized AGP cards that could not be - * initialized for AGP DMA. This covers the case where we have an AGP - * card in a system with an unsupported AGP chipset. In that case the - * card will be detected as AGP, but we won't be able to allocate any - * AGP memory, etc. - */ - - if (!is_agp || err) { - err = mga_do_pci_dma_bootstrap(dev, dma_bs); - } - - - return err; -} - -int mga_dma_bootstrap(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mga_dma_bootstrap_t *bootstrap = data; - int err; - static const int modes[] = { 0, 1, 2, 2, 4, 4, 4, 4 }; - const drm_mga_private_t *const dev_priv = - (drm_mga_private_t *) dev->dev_private; - - - err = mga_do_dma_bootstrap(dev, bootstrap); - if (err) { - mga_do_cleanup_dma(dev, FULL_CLEANUP); - return err; - } - - if (dev_priv->agp_textures != NULL) { - bootstrap->texture_handle = dev_priv->agp_textures->offset; - bootstrap->texture_size = dev_priv->agp_textures->size; - } else { - bootstrap->texture_handle = 0; - bootstrap->texture_size = 0; - } - - bootstrap->agp_mode = modes[bootstrap->agp_mode & 0x07]; - - return 0; -} - - -static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init) -{ - drm_mga_private_t *dev_priv; - int ret; - DRM_DEBUG("\n"); - - - dev_priv = dev->dev_private; - - if (init->sgram) { - dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK; - } else { - dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR; - } - dev_priv->maccess = init->maccess; - - dev_priv->fb_cpp = init->fb_cpp; - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - - dev_priv->depth_cpp = init->depth_cpp; - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - - /* FIXME: Need to support AGP textures... - */ - dev_priv->texture_offset = init->texture_offset[0]; - dev_priv->texture_size = init->texture_size[0]; - - dev_priv->sarea = drm_getsarea(dev); - if (!dev_priv->sarea) { - DRM_ERROR("failed to find sarea!\n"); - return -EINVAL; - } - - if (!dev_priv->used_new_dma_init) { - - dev_priv->dma_access = MGA_PAGPXFER; - dev_priv->wagp_enable = MGA_WAGP_ENABLE; - - dev_priv->status = drm_core_findmap(dev, init->status_offset); - if (!dev_priv->status) { - DRM_ERROR("failed to find status page!\n"); - return -EINVAL; - } - dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset); - if (!dev_priv->mmio) { - DRM_ERROR("failed to find mmio region!\n"); - return -EINVAL; - } - dev_priv->warp = drm_core_findmap(dev, init->warp_offset); - if (!dev_priv->warp) { - DRM_ERROR("failed to find warp microcode region!\n"); - return -EINVAL; - } - dev_priv->primary = drm_core_findmap(dev, init->primary_offset); - if (!dev_priv->primary) { - DRM_ERROR("failed to find primary dma region!\n"); - return -EINVAL; - } - dev->agp_buffer_token = init->buffers_offset; - dev->agp_buffer_map = - drm_core_findmap(dev, init->buffers_offset); - if (!dev->agp_buffer_map) { - DRM_ERROR("failed to find dma buffer region!\n"); - return -EINVAL; - } - - drm_core_ioremap(dev_priv->warp, dev); - drm_core_ioremap(dev_priv->primary, dev); - drm_core_ioremap(dev->agp_buffer_map, dev); - } - - dev_priv->sarea_priv = - (drm_mga_sarea_t *) ((u8 *) dev_priv->sarea->virtual + - init->sarea_priv_offset); - - if (!dev_priv->warp->virtual || - !dev_priv->primary->virtual || - ((dev_priv->dma_access != 0) && - ((dev->agp_buffer_map == NULL) || - (dev->agp_buffer_map->virtual == NULL)))) { - DRM_ERROR("failed to ioremap agp regions!\n"); - return -ENOMEM; - } - - ret = mga_warp_install_microcode(dev_priv); - if (ret != 0) { - DRM_ERROR("failed to install WARP ucode: %d!\n", ret); - return ret; - } - - ret = mga_warp_init(dev_priv); - if (ret != 0) { - DRM_ERROR("failed to init WARP engine: %d!\n", ret); - return ret; - } - - dev_priv->prim.status = (u32 *) dev_priv->status->virtual; - - mga_do_wait_for_idle(dev_priv); - - /* Init the primary DMA registers. - */ - MGA_WRITE(MGA_PRIMADDRESS, dev_priv->primary->offset | MGA_DMA_GENERAL); - - dev_priv->prim.start = (u8 *) dev_priv->primary->virtual; - dev_priv->prim.end = ((u8 *) dev_priv->primary->virtual - + dev_priv->primary->size); - dev_priv->prim.size = dev_priv->primary->size; - - dev_priv->prim.tail = 0; - dev_priv->prim.space = dev_priv->prim.size; - dev_priv->prim.wrapped = 0; - - dev_priv->prim.last_flush = 0; - dev_priv->prim.last_wrap = 0; - - dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE; - - dev_priv->prim.status[0] = dev_priv->primary->offset; - dev_priv->prim.status[1] = 0; - - dev_priv->sarea_priv->last_wrap = 0; - dev_priv->sarea_priv->last_frame.head = 0; - dev_priv->sarea_priv->last_frame.wrap = 0; - - if (mga_freelist_init(dev, dev_priv) < 0) { - DRM_ERROR("could not initialize freelist\n"); - return -ENOMEM; - } - - return 0; -} - -static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup) -{ - int err = 0; - DRM_DEBUG("\n"); - - /* Make sure interrupts are disabled here because the uninstall ioctl - * may not have been called from userspace and after dev_private - * is freed, it's too late. - */ - if (dev->irq_enabled) - drm_irq_uninstall(dev); - - if (dev->dev_private) { - drm_mga_private_t *dev_priv = dev->dev_private; - - if ((dev_priv->warp != NULL) - && (dev_priv->warp->type != _DRM_CONSISTENT)) - drm_core_ioremapfree(dev_priv->warp, dev); - - if ((dev_priv->primary != NULL) - && (dev_priv->primary->type != _DRM_CONSISTENT)) - drm_core_ioremapfree(dev_priv->primary, dev); - - if (dev->agp_buffer_map != NULL) - drm_core_ioremapfree(dev->agp_buffer_map, dev); - - if (dev_priv->used_new_dma_init) { - if (dev_priv->agp_handle != 0) { - struct drm_agp_binding unbind_req; - struct drm_agp_buffer free_req; - - unbind_req.handle = dev_priv->agp_handle; - drm_agp_unbind(dev, &unbind_req); - - free_req.handle = dev_priv->agp_handle; - drm_agp_free(dev, &free_req); - - dev_priv->agp_textures = NULL; - dev_priv->agp_size = 0; - dev_priv->agp_handle = 0; - } - - if ((dev->agp != NULL) && dev->agp->acquired) { - err = drm_agp_release(dev); - } - } - - dev_priv->warp = NULL; - dev_priv->primary = NULL; - dev_priv->sarea = NULL; - dev_priv->sarea_priv = NULL; - dev->agp_buffer_map = NULL; - - if (full_cleanup) { - dev_priv->mmio = NULL; - dev_priv->status = NULL; - dev_priv->used_new_dma_init = 0; - } - - memset(&dev_priv->prim, 0, sizeof(dev_priv->prim)); - dev_priv->warp_pipe = 0; - memset(dev_priv->warp_pipe_phys, 0, - sizeof(dev_priv->warp_pipe_phys)); - - if (dev_priv->head != NULL) { - mga_freelist_cleanup(dev); - } - } - - return err; -} - -int mga_dma_init(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mga_init_t *init = data; - int err; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - switch (init->func) { - case MGA_INIT_DMA: - err = mga_do_init_dma(dev, init); - if (err) { - (void)mga_do_cleanup_dma(dev, FULL_CLEANUP); - } - return err; - case MGA_CLEANUP_DMA: - return mga_do_cleanup_dma(dev, FULL_CLEANUP); - } - - return -EINVAL; -} - -/* ================================================================ - * Primary DMA stream management - */ - -int mga_dma_flush(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; - struct drm_lock *lock = data; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - DRM_DEBUG("%s%s%s\n", - (lock->flags & _DRM_LOCK_FLUSH) ? "flush, " : "", - (lock->flags & _DRM_LOCK_FLUSH_ALL) ? "flush all, " : "", - (lock->flags & _DRM_LOCK_QUIESCENT) ? "idle, " : ""); - - WRAP_WAIT_WITH_RETURN(dev_priv); - - if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL)) { - mga_do_dma_flush(dev_priv); - } - - if (lock->flags & _DRM_LOCK_QUIESCENT) { -#if MGA_DMA_DEBUG - int ret = mga_do_wait_for_idle(dev_priv); - if (ret < 0) - DRM_INFO("-EBUSY\n"); - return ret; -#else - return mga_do_wait_for_idle(dev_priv); -#endif - } else { - return 0; - } -} - -int mga_dma_reset(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - return mga_do_dma_reset(dev_priv); -} - -/* ================================================================ - * DMA buffer management - */ - -static int mga_dma_get_buffers(struct drm_device * dev, - struct drm_file *file_priv, struct drm_dma * d) -{ - struct drm_buf *buf; - int i; - - for (i = d->granted_count; i < d->request_count; i++) { - buf = mga_freelist_get(dev); - if (!buf) - return -EAGAIN; - - buf->file_priv = file_priv; - - if (DRM_COPY_TO_USER(&d->request_indices[i], - &buf->idx, sizeof(buf->idx))) - return -EFAULT; - if (DRM_COPY_TO_USER(&d->request_sizes[i], - &buf->total, sizeof(buf->total))) - return -EFAULT; - - d->granted_count++; - } - return 0; -} - -int mga_dma_buffers(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - struct drm_device_dma *dma = dev->dma; - drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; - struct drm_dma *d = data; - int ret = 0; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - /* Please don't send us buffers. - */ - if (d->send_count != 0) { - DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n", - DRM_CURRENTPID, d->send_count); - return -EINVAL; - } - - /* We'll send you buffers. - */ - if (d->request_count < 0 || d->request_count > dma->buf_count) { - DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n", - DRM_CURRENTPID, d->request_count, dma->buf_count); - return -EINVAL; - } - - WRAP_TEST_WITH_RETURN(dev_priv); - - d->granted_count = 0; - - if (d->request_count) { - ret = mga_dma_get_buffers(dev, file_priv, d); - } - - return ret; -} - -/** - * Called just before the module is unloaded. - */ -int mga_driver_unload(struct drm_device * dev) -{ - drm_free(dev->dev_private, sizeof(drm_mga_private_t), DRM_MEM_DRIVER); - dev->dev_private = NULL; - - return 0; -} - -/** - * Called when the last opener of the device is closed. - */ -void mga_driver_lastclose(struct drm_device * dev) -{ - mga_do_cleanup_dma(dev, FULL_CLEANUP); -} - -int mga_driver_dma_quiescent(struct drm_device * dev) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - return mga_do_wait_for_idle(dev_priv); -} diff --git a/sys/dev/drm/mga_drm.h b/sys/dev/drm/mga_drm.h deleted file mode 100644 index 2754c934413a..000000000000 --- a/sys/dev/drm/mga_drm.h +++ /dev/null @@ -1,428 +0,0 @@ -/* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*- - * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - * - * Rewritten by: - * Gareth Hughes <gareth@valinux.com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __MGA_DRM_H__ -#define __MGA_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (mga_sarea.h) - */ - -#ifndef __MGA_SAREA_DEFINES__ -#define __MGA_SAREA_DEFINES__ - -/* WARP pipe flags - */ -#define MGA_F 0x1 /* fog */ -#define MGA_A 0x2 /* alpha */ -#define MGA_S 0x4 /* specular */ -#define MGA_T2 0x8 /* multitexture */ - -#define MGA_WARP_TGZ 0 -#define MGA_WARP_TGZF (MGA_F) -#define MGA_WARP_TGZA (MGA_A) -#define MGA_WARP_TGZAF (MGA_F|MGA_A) -#define MGA_WARP_TGZS (MGA_S) -#define MGA_WARP_TGZSF (MGA_S|MGA_F) -#define MGA_WARP_TGZSA (MGA_S|MGA_A) -#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) -#define MGA_WARP_T2GZ (MGA_T2) -#define MGA_WARP_T2GZF (MGA_T2|MGA_F) -#define MGA_WARP_T2GZA (MGA_T2|MGA_A) -#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) -#define MGA_WARP_T2GZS (MGA_T2|MGA_S) -#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) -#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) -#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) - -#define MGA_MAX_G200_PIPES 8 /* no multitex */ -#define MGA_MAX_G400_PIPES 16 -#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES -#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ - -#define MGA_CARD_TYPE_G200 1 -#define MGA_CARD_TYPE_G400 2 -#define MGA_CARD_TYPE_G450 3 /* not currently used */ -#define MGA_CARD_TYPE_G550 4 - -#define MGA_FRONT 0x1 -#define MGA_BACK 0x2 -#define MGA_DEPTH 0x4 - -/* What needs to be changed for the current vertex dma buffer? - */ -#define MGA_UPLOAD_CONTEXT 0x1 -#define MGA_UPLOAD_TEX0 0x2 -#define MGA_UPLOAD_TEX1 0x4 -#define MGA_UPLOAD_PIPE 0x8 -#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ -#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ -#define MGA_UPLOAD_2D 0x40 -#define MGA_WAIT_AGE 0x80 /* handled client-side */ -#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ -#if 0 -#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock - quiescent */ -#endif - -/* 32 buffers of 64k each, total 2 meg. - */ -#define MGA_BUFFER_SIZE (1 << 16) -#define MGA_NUM_BUFFERS 128 - -/* Keep these small for testing. - */ -#define MGA_NR_SAREA_CLIPRECTS 8 - -/* 2 heaps (1 for card, 1 for agp), each divided into up to 128 - * regions, subject to a minimum region size of (1<<16) == 64k. - * - * Clients may subdivide regions internally, but when sharing between - * clients, the region size is the minimum granularity. - */ - -#define MGA_CARD_HEAP 0 -#define MGA_AGP_HEAP 1 -#define MGA_NR_TEX_HEAPS 2 -#define MGA_NR_TEX_REGIONS 16 -#define MGA_LOG_MIN_TEX_REGION_SIZE 16 - -#define DRM_MGA_IDLE_RETRY 2048 - -#endif /* __MGA_SAREA_DEFINES__ */ - -/* Setup registers for 3D context - */ -typedef struct { - unsigned int dstorg; - unsigned int maccess; - unsigned int plnwt; - unsigned int dwgctl; - unsigned int alphactrl; - unsigned int fogcolor; - unsigned int wflag; - unsigned int tdualstage0; - unsigned int tdualstage1; - unsigned int fcol; - unsigned int stencil; - unsigned int stencilctl; -} drm_mga_context_regs_t; - -/* Setup registers for 2D, X server - */ -typedef struct { - unsigned int pitch; -} drm_mga_server_regs_t; - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int texctl; - unsigned int texctl2; - unsigned int texfilter; - unsigned int texbordercol; - unsigned int texorg; - unsigned int texwidth; - unsigned int texheight; - unsigned int texorg1; - unsigned int texorg2; - unsigned int texorg3; - unsigned int texorg4; -} drm_mga_texture_regs_t; - -/* General aging mechanism - */ -typedef struct { - unsigned int head; /* Position of head pointer */ - unsigned int wrap; /* Primary DMA wrap count */ -} drm_mga_age_t; - -typedef struct _drm_mga_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex dma buffer. - */ - drm_mga_context_regs_t context_state; - drm_mga_server_regs_t server_state; - drm_mga_texture_regs_t tex_state[2]; - unsigned int warp_pipe; - unsigned int dirty; - unsigned int vertsize; - - /* The current cliprects, or a subset thereof. - */ - struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Information about the most recently used 3d drawable. The - * client fills in the req_* fields, the server fills in the - * exported_ fields and puts the cliprects into boxes, above. - * - * The client clears the exported_drawable field before - * clobbering the boxes data. - */ - unsigned int req_drawable; /* the X drawable id */ - unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ - - unsigned int exported_drawable; - unsigned int exported_index; - unsigned int exported_stamp; - unsigned int exported_buffers; - unsigned int exported_nfront; - unsigned int exported_nback; - int exported_back_x, exported_front_x, exported_w; - int exported_back_y, exported_front_y, exported_h; - struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS]; - - /* Counters for aging textures and for client-side throttling. - */ - unsigned int status[4]; - unsigned int last_wrap; - - drm_mga_age_t last_frame; - unsigned int last_enqueue; /* last time a buffer was enqueued */ - unsigned int last_dispatch; /* age of the most recently dispatched buffer */ - unsigned int last_quiescent; /* */ - - /* LRU lists for texture memory in agp space and on the card. - */ - struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1]; - unsigned int texAge[MGA_NR_TEX_HEAPS]; - - /* Mechanism to validate card state. - */ - int ctxOwner; -} drm_mga_sarea_t; - - -/* MGA specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_MGA_INIT 0x00 -#define DRM_MGA_FLUSH 0x01 -#define DRM_MGA_RESET 0x02 -#define DRM_MGA_SWAP 0x03 -#define DRM_MGA_CLEAR 0x04 -#define DRM_MGA_VERTEX 0x05 -#define DRM_MGA_INDICES 0x06 -#define DRM_MGA_ILOAD 0x07 -#define DRM_MGA_BLIT 0x08 -#define DRM_MGA_GETPARAM 0x09 - -/* 3.2: - * ioctls for operating on fences. - */ -#define DRM_MGA_SET_FENCE 0x0a -#define DRM_MGA_WAIT_FENCE 0x0b -#define DRM_MGA_DMA_BOOTSTRAP 0x0c - - -#define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) -#define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, drm_lock_t) -#define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET) -#define DRM_IOCTL_MGA_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MGA_SWAP) -#define DRM_IOCTL_MGA_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t) -#define DRM_IOCTL_MGA_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t) -#define DRM_IOCTL_MGA_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t) -#define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t) -#define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t) -#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t) -#define DRM_IOCTL_MGA_SET_FENCE DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, uint32_t) -#define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, uint32_t) -#define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) - -typedef struct _drm_mga_warp_index { - int installed; - unsigned long phys_addr; - int size; -} drm_mga_warp_index_t; - -typedef struct drm_mga_init { - enum { - MGA_INIT_DMA = 0x01, - MGA_CLEANUP_DMA = 0x02 - } func; - - unsigned long sarea_priv_offset; - - int chipset; - int sgram; - - unsigned int maccess; - - unsigned int fb_cpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - - unsigned int depth_cpp; - unsigned int depth_offset, depth_pitch; - - unsigned int texture_offset[MGA_NR_TEX_HEAPS]; - unsigned int texture_size[MGA_NR_TEX_HEAPS]; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long status_offset; - unsigned long warp_offset; - unsigned long primary_offset; - unsigned long buffers_offset; -} drm_mga_init_t; - - -typedef struct drm_mga_dma_bootstrap { - /** - * \name AGP texture region - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, these fields will - * be filled in with the actual AGP texture settings. - * - * \warning - * If these fields are non-zero, but dma_mga_dma_bootstrap::agp_mode - * is zero, it means that PCI memory (most likely through the use of - * an IOMMU) is being used for "AGP" textures. - */ - /*@{*/ - unsigned long texture_handle; /**< Handle used to map AGP textures. */ - uint32_t texture_size; /**< Size of the AGP texture region. */ - /*@}*/ - - - /** - * Requested size of the primary DMA region. - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be - * filled in with the actual AGP mode. If AGP was not available - */ - uint32_t primary_size; - - - /** - * Requested number of secondary DMA buffers. - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be - * filled in with the actual number of secondary DMA buffers - * allocated. Particularly when PCI DMA is used, this may be - * (subtantially) less than the number requested. - */ - uint32_t secondary_bin_count; - - - /** - * Requested size of each secondary DMA buffer. - * - * While the kernel \b is free to reduce - * dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed - * to reduce dma_mga_dma_bootstrap::secondary_bin_size. - */ - uint32_t secondary_bin_size; - - - /** - * Bit-wise mask of AGPSTAT2_* values. Currently only \c AGPSTAT2_1X, - * \c AGPSTAT2_2X, and \c AGPSTAT2_4X are supported. If this value is - * zero, it means that PCI DMA should be used, even if AGP is - * possible. - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be - * filled in with the actual AGP mode. If AGP was not available - * (i.e., PCI DMA was used), this value will be zero. - */ - uint32_t agp_mode; - - - /** - * Desired AGP GART size, measured in megabytes. - */ - uint8_t agp_size; -} drm_mga_dma_bootstrap_t; - -typedef struct drm_mga_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; -} drm_mga_clear_t; - -typedef struct drm_mga_vertex { - int idx; /* buffer to queue */ - int used; /* bytes in use */ - int discard; /* client finished with buffer? */ -} drm_mga_vertex_t; - -typedef struct drm_mga_indices { - int idx; /* buffer to queue */ - unsigned int start; - unsigned int end; - int discard; /* client finished with buffer? */ -} drm_mga_indices_t; - -typedef struct drm_mga_iload { - int idx; - unsigned int dstorg; - unsigned int length; -} drm_mga_iload_t; - -typedef struct _drm_mga_blit { - unsigned int planemask; - unsigned int srcorg; - unsigned int dstorg; - int src_pitch, dst_pitch; - int delta_sx, delta_sy; - int delta_dx, delta_dy; - int height, ydir; /* flip image vertically */ - int source_pitch, dest_pitch; -} drm_mga_blit_t; - -/* 3.1: An ioctl to get parameters that aren't available to the 3d - * client any other way. - */ -#define MGA_PARAM_IRQ_NR 1 - -/* 3.2: Query the actual card type. The DDX only distinguishes between - * G200 chips and non-G200 chips, which it calls G400. It turns out that - * there are some very sublte differences between the G4x0 chips and the G550 - * chips. Using this parameter query, a client-side driver can detect the - * difference between a G4x0 and a G550. - */ -#define MGA_PARAM_CARD_TYPE 2 - -typedef struct drm_mga_getparam { - int param; - void __user *value; -} drm_mga_getparam_t; - -#endif diff --git a/sys/dev/drm/mga_drv.c b/sys/dev/drm/mga_drv.c deleted file mode 100644 index bc585b476096..000000000000 --- a/sys/dev/drm/mga_drv.c +++ /dev/null @@ -1,167 +0,0 @@ -/* mga_drv.c -- Matrox G200/G400 driver -*- linux-c -*- - * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com - */ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/mga_drm.h" -#include "dev/drm/mga_drv.h" -#include "dev/drm/drm_pciids.h" - -/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */ -static drm_pci_id_list_t mga_pciidlist[] = { - mga_PCI_IDS -}; - -/** - * Determine if the device really is AGP or not. - * - * In addition to the usual tests performed by \c drm_device_is_agp, this - * function detects PCI G450 cards that appear to the system exactly like - * AGP G450 cards. - * - * \param dev The device to be tested. - * - * \returns - * If the device is a PCI G450, zero is returned. Otherwise non-zero is - * returned. - * - * \bug - * This function needs to be filled in! The implementation in - * linux-core/mga_drv.c shows what needs to be done. - */ -static int mga_driver_device_is_agp(struct drm_device * dev) -{ - device_t bus; - - /* There are PCI versions of the G450. These cards have the - * same PCI ID as the AGP G450, but have an additional PCI-to-PCI - * bridge chip. We detect these cards, which are not currently - * supported by this driver, by looking at the device ID of the - * bus the "card" is on. If vendor is 0x3388 (Hint Corp) and the - * device is 0x0021 (HB6 Universal PCI-PCI bridge), we reject the - * device. - */ - bus = device_get_parent(device_get_parent(dev->device)); - if (pci_get_device(dev->device) == 0x0525 && - pci_get_vendor(bus) == 0x3388 && - pci_get_device(bus) == 0x0021) - return DRM_IS_NOT_AGP; - else - return DRM_MIGHT_BE_AGP; -} - -static void mga_configure(struct drm_device *dev) -{ - dev->driver->driver_features = - DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR | - DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ; - - dev->driver->buf_priv_size = sizeof(drm_mga_buf_priv_t); - dev->driver->load = mga_driver_load; - dev->driver->unload = mga_driver_unload; - dev->driver->lastclose = mga_driver_lastclose; - dev->driver->get_vblank_counter = mga_get_vblank_counter; - dev->driver->enable_vblank = mga_enable_vblank; - dev->driver->disable_vblank = mga_disable_vblank; - dev->driver->irq_preinstall = mga_driver_irq_preinstall; - dev->driver->irq_postinstall = mga_driver_irq_postinstall; - dev->driver->irq_uninstall = mga_driver_irq_uninstall; - dev->driver->irq_handler = mga_driver_irq_handler; - dev->driver->dma_ioctl = mga_dma_buffers; - dev->driver->dma_quiescent = mga_driver_dma_quiescent; - dev->driver->device_is_agp = mga_driver_device_is_agp; - - dev->driver->ioctls = mga_ioctls; - dev->driver->max_ioctl = mga_max_ioctl; - - dev->driver->name = DRIVER_NAME; - dev->driver->desc = DRIVER_DESC; - dev->driver->date = DRIVER_DATE; - dev->driver->major = DRIVER_MAJOR; - dev->driver->minor = DRIVER_MINOR; - dev->driver->patchlevel = DRIVER_PATCHLEVEL; -} - -static int -mga_probe(device_t kdev) -{ - return drm_probe(kdev, mga_pciidlist); -} - -static int -mga_attach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - - dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER, - M_WAITOK | M_ZERO); - - mga_configure(dev); - - return drm_attach(kdev, mga_pciidlist); -} - -static int -mga_detach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - int ret; - - ret = drm_detach(kdev); - - free(dev->driver, DRM_MEM_DRIVER); - - return ret; -} - -static device_method_t mga_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mga_probe), - DEVMETHOD(device_attach, mga_attach), - DEVMETHOD(device_detach, mga_detach), - - { 0, 0 } -}; - -static driver_t mga_driver = { - "drm", - mga_methods, - sizeof(struct drm_device) -}; - -extern devclass_t drm_devclass; -DRIVER_MODULE(mga, vgapci, mga_driver, drm_devclass, 0, 0); -MODULE_DEPEND(mga, drm, 1, 1, 1); diff --git a/sys/dev/drm/mga_drv.h b/sys/dev/drm/mga_drv.h deleted file mode 100644 index 52a7baf85cb9..000000000000 --- a/sys/dev/drm/mga_drv.h +++ /dev/null @@ -1,694 +0,0 @@ -/* mga_drv.h -- Private header for the Matrox G200/G400 driver -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __MGA_DRV_H__ -#define __MGA_DRV_H__ - -/* General customization: - */ - -#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." - -#define DRIVER_NAME "mga" -#define DRIVER_DESC "Matrox G200/G400" -#define DRIVER_DATE "20060319" - -#define DRIVER_MAJOR 3 -#define DRIVER_MINOR 2 -#define DRIVER_PATCHLEVEL 2 - -typedef struct drm_mga_primary_buffer { - u8 *start; - u8 *end; - int size; - - u32 tail; - int space; - volatile long wrapped; - - volatile u32 *status; - - u32 last_flush; - u32 last_wrap; - - u32 high_mark; -} drm_mga_primary_buffer_t; - -typedef struct drm_mga_freelist { - struct drm_mga_freelist *next; - struct drm_mga_freelist *prev; - drm_mga_age_t age; - struct drm_buf *buf; -} drm_mga_freelist_t; - -typedef struct { - drm_mga_freelist_t *list_entry; - int discard; - int dispatched; -} drm_mga_buf_priv_t; - -typedef struct drm_mga_private { - drm_mga_primary_buffer_t prim; - drm_mga_sarea_t *sarea_priv; - - drm_mga_freelist_t *head; - drm_mga_freelist_t *tail; - - unsigned int warp_pipe; - unsigned long warp_pipe_phys[MGA_MAX_WARP_PIPES]; - - int chipset; - int usec_timeout; - - /** - * If set, the new DMA initialization sequence was used. This is - * primarilly used to select how the driver should uninitialized its - * internal DMA structures. - */ - int used_new_dma_init; - - /** - * If AGP memory is used for DMA buffers, this will be the value - * \c MGA_PAGPXFER. Otherwise, it will be zero (for a PCI transfer). - */ - u32 dma_access; - - /** - * If AGP memory is used for DMA buffers, this will be the value - * \c MGA_WAGP_ENABLE. Otherwise, it will be zero (for a PCI - * transfer). - */ - u32 wagp_enable; - - /** - * \name MMIO region parameters. - * - * \sa drm_mga_private_t::mmio - */ - /*@{*/ - u32 mmio_base; /**< Bus address of base of MMIO. */ - u32 mmio_size; /**< Size of the MMIO region. */ - /*@}*/ - - u32 clear_cmd; - u32 maccess; - - atomic_t vbl_received; /**< Number of vblanks received. */ - wait_queue_head_t fence_queue; - atomic_t last_fence_retired; - u32 next_fence_to_post; - - unsigned int fb_cpp; - unsigned int front_offset; - unsigned int front_pitch; - unsigned int back_offset; - unsigned int back_pitch; - - unsigned int depth_cpp; - unsigned int depth_offset; - unsigned int depth_pitch; - - unsigned int texture_offset; - unsigned int texture_size; - - drm_local_map_t *sarea; - drm_local_map_t *mmio; - drm_local_map_t *status; - drm_local_map_t *warp; - drm_local_map_t *primary; - drm_local_map_t *agp_textures; - - unsigned long agp_handle; - unsigned int agp_size; -} drm_mga_private_t; - -extern struct drm_ioctl_desc mga_ioctls[]; -extern int mga_max_ioctl; - - /* mga_dma.c */ -extern int mga_dma_bootstrap(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mga_dma_init(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mga_dma_flush(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mga_dma_reset(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mga_dma_buffers(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int mga_driver_load(struct drm_device *dev, unsigned long flags); -extern int mga_driver_unload(struct drm_device * dev); -extern void mga_driver_lastclose(struct drm_device * dev); -extern int mga_driver_dma_quiescent(struct drm_device * dev); - -extern int mga_do_wait_for_idle(drm_mga_private_t * dev_priv); - -extern void mga_do_dma_flush(drm_mga_private_t * dev_priv); -extern void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv); -extern void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv); - -extern int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf); - - /* mga_warp.c */ -extern unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv); -extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv); -extern int mga_warp_init(drm_mga_private_t * dev_priv); - - /* mga_irq.c */ -extern int mga_enable_vblank(struct drm_device *dev, int crtc); -extern void mga_disable_vblank(struct drm_device *dev, int crtc); -extern u32 mga_get_vblank_counter(struct drm_device *dev, int crtc); -extern int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence); -extern int mga_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence); -extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS); -extern void mga_driver_irq_preinstall(struct drm_device * dev); -extern int mga_driver_irq_postinstall(struct drm_device * dev); -extern void mga_driver_irq_uninstall(struct drm_device * dev); -extern long mga_compat_ioctl(struct file *filp, unsigned int cmd, - unsigned long arg); - -#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() - -#if defined(__linux__) && defined(__alpha__) -#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle)) -#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg) - -#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg ) -#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg ) - -#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg))) -#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg))) -#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0) -#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0) - -static inline u32 _MGA_READ(u32 * addr) -{ - DRM_MEMORYBARRIER(); - return *(volatile u32 *)addr; -} -#else -#define MGA_READ8( reg ) DRM_READ8(dev_priv->mmio, (reg)) -#define MGA_READ( reg ) DRM_READ32(dev_priv->mmio, (reg)) -#define MGA_WRITE8( reg, val ) DRM_WRITE8(dev_priv->mmio, (reg), (val)) -#define MGA_WRITE( reg, val ) DRM_WRITE32(dev_priv->mmio, (reg), (val)) -#endif - -#define DWGREG0 0x1c00 -#define DWGREG0_END 0x1dff -#define DWGREG1 0x2c00 -#define DWGREG1_END 0x2dff - -#define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END) -#define DMAREG0(r) (u8)((r - DWGREG0) >> 2) -#define DMAREG1(r) (u8)(((r - DWGREG1) >> 2) | 0x80) -#define DMAREG(r) (ISREG0(r) ? DMAREG0(r) : DMAREG1(r)) - -/* ================================================================ - * Helper macross... - */ - -#define MGA_EMIT_STATE( dev_priv, dirty ) \ -do { \ - if ( (dirty) & ~MGA_UPLOAD_CLIPRECTS ) { \ - if ( dev_priv->chipset >= MGA_CARD_TYPE_G400 ) { \ - mga_g400_emit_state( dev_priv ); \ - } else { \ - mga_g200_emit_state( dev_priv ); \ - } \ - } \ -} while (0) - -#define WRAP_TEST_WITH_RETURN( dev_priv ) \ -do { \ - if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ - if ( mga_is_idle( dev_priv ) ) { \ - mga_do_dma_wrap_end( dev_priv ); \ - } else if ( dev_priv->prim.space < \ - dev_priv->prim.high_mark ) { \ - if ( MGA_DMA_DEBUG ) \ - DRM_INFO( "wrap...\n"); \ - return -EBUSY; \ - } \ - } \ -} while (0) - -#define WRAP_WAIT_WITH_RETURN( dev_priv ) \ -do { \ - if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ - if ( mga_do_wait_for_idle( dev_priv ) < 0 ) { \ - if ( MGA_DMA_DEBUG ) \ - DRM_INFO( "wrap...\n"); \ - return -EBUSY; \ - } \ - mga_do_dma_wrap_end( dev_priv ); \ - } \ -} while (0) - -/* ================================================================ - * Primary DMA command stream - */ - -#define MGA_VERBOSE 0 - -#define DMA_LOCALS unsigned int write; volatile u8 *prim; - -#define DMA_BLOCK_SIZE (5 * sizeof(u32)) - -#define BEGIN_DMA( n ) \ -do { \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( "BEGIN_DMA( %d )\n", (n) ); \ - DRM_INFO( " space=0x%x req=0x%zx\n", \ - dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \ - } \ - prim = dev_priv->prim.start; \ - write = dev_priv->prim.tail; \ -} while (0) - -#define BEGIN_DMA_WRAP() \ -do { \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( "BEGIN_DMA()\n" ); \ - DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \ - } \ - prim = dev_priv->prim.start; \ - write = dev_priv->prim.tail; \ -} while (0) - -#define ADVANCE_DMA() \ -do { \ - dev_priv->prim.tail = write; \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \ - write, dev_priv->prim.space ); \ - } \ -} while (0) - -#define FLUSH_DMA() \ -do { \ - if ( 0 ) { \ - DRM_INFO( "\n" ); \ - DRM_INFO( " tail=0x%06x head=0x%06lx\n", \ - dev_priv->prim.tail, \ - MGA_READ( MGA_PRIMADDRESS ) - \ - dev_priv->primary->offset ); \ - } \ - if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) { \ - if ( dev_priv->prim.space < \ - dev_priv->prim.high_mark ) { \ - mga_do_dma_wrap_start( dev_priv ); \ - } else { \ - mga_do_dma_flush( dev_priv ); \ - } \ - } \ -} while (0) - -/* Never use this, always use DMA_BLOCK(...) for primary DMA output. - */ -#define DMA_WRITE( offset, val ) \ -do { \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04zx\n", \ - (u32)(val), write + (offset) * sizeof(u32) ); \ - } \ - *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \ -} while (0) - -#define DMA_BLOCK( reg0, val0, reg1, val1, reg2, val2, reg3, val3 ) \ -do { \ - DMA_WRITE( 0, ((DMAREG( reg0 ) << 0) | \ - (DMAREG( reg1 ) << 8) | \ - (DMAREG( reg2 ) << 16) | \ - (DMAREG( reg3 ) << 24)) ); \ - DMA_WRITE( 1, val0 ); \ - DMA_WRITE( 2, val1 ); \ - DMA_WRITE( 3, val2 ); \ - DMA_WRITE( 4, val3 ); \ - write += DMA_BLOCK_SIZE; \ -} while (0) - -/* Buffer aging via primary DMA stream head pointer. - */ - -#define SET_AGE( age, h, w ) \ -do { \ - (age)->head = h; \ - (age)->wrap = w; \ -} while (0) - -#define TEST_AGE( age, h, w ) ( (age)->wrap < w || \ - ( (age)->wrap == w && \ - (age)->head < h ) ) - -#define AGE_BUFFER( buf_priv ) \ -do { \ - drm_mga_freelist_t *entry = (buf_priv)->list_entry; \ - if ( (buf_priv)->dispatched ) { \ - entry->age.head = (dev_priv->prim.tail + \ - dev_priv->primary->offset); \ - entry->age.wrap = dev_priv->sarea_priv->last_wrap; \ - } else { \ - entry->age.head = 0; \ - entry->age.wrap = 0; \ - } \ -} while (0) - -#define MGA_ENGINE_IDLE_MASK (MGA_SOFTRAPEN | \ - MGA_DWGENGSTS | \ - MGA_ENDPRDMASTS) -#define MGA_DMA_IDLE_MASK (MGA_SOFTRAPEN | \ - MGA_ENDPRDMASTS) - -#define MGA_DMA_DEBUG 0 - -/* A reduced set of the mga registers. - */ -#define MGA_CRTC_INDEX 0x1fd4 -#define MGA_CRTC_DATA 0x1fd5 - -/* CRTC11 */ -#define MGA_VINTCLR (1 << 4) -#define MGA_VINTEN (1 << 5) - -#define MGA_ALPHACTRL 0x2c7c -#define MGA_AR0 0x1c60 -#define MGA_AR1 0x1c64 -#define MGA_AR2 0x1c68 -#define MGA_AR3 0x1c6c -#define MGA_AR4 0x1c70 -#define MGA_AR5 0x1c74 -#define MGA_AR6 0x1c78 - -#define MGA_CXBNDRY 0x1c80 -#define MGA_CXLEFT 0x1ca0 -#define MGA_CXRIGHT 0x1ca4 - -#define MGA_DMAPAD 0x1c54 -#define MGA_DSTORG 0x2cb8 -#define MGA_DWGCTL 0x1c00 -# define MGA_OPCOD_MASK (15 << 0) -# define MGA_OPCOD_TRAP (4 << 0) -# define MGA_OPCOD_TEXTURE_TRAP (6 << 0) -# define MGA_OPCOD_BITBLT (8 << 0) -# define MGA_OPCOD_ILOAD (9 << 0) -# define MGA_ATYPE_MASK (7 << 4) -# define MGA_ATYPE_RPL (0 << 4) -# define MGA_ATYPE_RSTR (1 << 4) -# define MGA_ATYPE_ZI (3 << 4) -# define MGA_ATYPE_BLK (4 << 4) -# define MGA_ATYPE_I (7 << 4) -# define MGA_LINEAR (1 << 7) -# define MGA_ZMODE_MASK (7 << 8) -# define MGA_ZMODE_NOZCMP (0 << 8) -# define MGA_ZMODE_ZE (2 << 8) -# define MGA_ZMODE_ZNE (3 << 8) -# define MGA_ZMODE_ZLT (4 << 8) -# define MGA_ZMODE_ZLTE (5 << 8) -# define MGA_ZMODE_ZGT (6 << 8) -# define MGA_ZMODE_ZGTE (7 << 8) -# define MGA_SOLID (1 << 11) -# define MGA_ARZERO (1 << 12) -# define MGA_SGNZERO (1 << 13) -# define MGA_SHIFTZERO (1 << 14) -# define MGA_BOP_MASK (15 << 16) -# define MGA_BOP_ZERO (0 << 16) -# define MGA_BOP_DST (10 << 16) -# define MGA_BOP_SRC (12 << 16) -# define MGA_BOP_ONE (15 << 16) -# define MGA_TRANS_SHIFT 20 -# define MGA_TRANS_MASK (15 << 20) -# define MGA_BLTMOD_MASK (15 << 25) -# define MGA_BLTMOD_BMONOLEF (0 << 25) -# define MGA_BLTMOD_BMONOWF (4 << 25) -# define MGA_BLTMOD_PLAN (1 << 25) -# define MGA_BLTMOD_BFCOL (2 << 25) -# define MGA_BLTMOD_BU32BGR (3 << 25) -# define MGA_BLTMOD_BU32RGB (7 << 25) -# define MGA_BLTMOD_BU24BGR (11 << 25) -# define MGA_BLTMOD_BU24RGB (15 << 25) -# define MGA_PATTERN (1 << 29) -# define MGA_TRANSC (1 << 30) -# define MGA_CLIPDIS (1U << 31) -#define MGA_DWGSYNC 0x2c4c - -#define MGA_FCOL 0x1c24 -#define MGA_FIFOSTATUS 0x1e10 -#define MGA_FOGCOL 0x1cf4 -#define MGA_FXBNDRY 0x1c84 -#define MGA_FXLEFT 0x1ca8 -#define MGA_FXRIGHT 0x1cac - -#define MGA_ICLEAR 0x1e18 -# define MGA_SOFTRAPICLR (1 << 0) -# define MGA_VLINEICLR (1 << 5) -#define MGA_IEN 0x1e1c -# define MGA_SOFTRAPIEN (1 << 0) -# define MGA_VLINEIEN (1 << 5) - -#define MGA_LEN 0x1c5c - -#define MGA_MACCESS 0x1c04 - -#define MGA_PITCH 0x1c8c -#define MGA_PLNWT 0x1c1c -#define MGA_PRIMADDRESS 0x1e58 -# define MGA_DMA_GENERAL (0 << 0) -# define MGA_DMA_BLIT (1 << 0) -# define MGA_DMA_VECTOR (2 << 0) -# define MGA_DMA_VERTEX (3 << 0) -#define MGA_PRIMEND 0x1e5c -# define MGA_PRIMNOSTART (1 << 0) -# define MGA_PAGPXFER (1 << 1) -#define MGA_PRIMPTR 0x1e50 -# define MGA_PRIMPTREN0 (1 << 0) -# define MGA_PRIMPTREN1 (1 << 1) - -#define MGA_RST 0x1e40 -# define MGA_SOFTRESET (1 << 0) -# define MGA_SOFTEXTRST (1 << 1) - -#define MGA_SECADDRESS 0x2c40 -#define MGA_SECEND 0x2c44 -#define MGA_SETUPADDRESS 0x2cd0 -#define MGA_SETUPEND 0x2cd4 -#define MGA_SGN 0x1c58 -#define MGA_SOFTRAP 0x2c48 -#define MGA_SRCORG 0x2cb4 -# define MGA_SRMMAP_MASK (1 << 0) -# define MGA_SRCMAP_FB (0 << 0) -# define MGA_SRCMAP_SYSMEM (1 << 0) -# define MGA_SRCACC_MASK (1 << 1) -# define MGA_SRCACC_PCI (0 << 1) -# define MGA_SRCACC_AGP (1 << 1) -#define MGA_STATUS 0x1e14 -# define MGA_SOFTRAPEN (1 << 0) -# define MGA_VSYNCPEN (1 << 4) -# define MGA_VLINEPEN (1 << 5) -# define MGA_DWGENGSTS (1 << 16) -# define MGA_ENDPRDMASTS (1 << 17) -#define MGA_STENCIL 0x2cc8 -#define MGA_STENCILCTL 0x2ccc - -#define MGA_TDUALSTAGE0 0x2cf8 -#define MGA_TDUALSTAGE1 0x2cfc -#define MGA_TEXBORDERCOL 0x2c5c -#define MGA_TEXCTL 0x2c30 -#define MGA_TEXCTL2 0x2c3c -# define MGA_DUALTEX (1 << 7) -# define MGA_G400_TC2_MAGIC (1 << 15) -# define MGA_MAP1_ENABLE (1U << 31) -#define MGA_TEXFILTER 0x2c58 -#define MGA_TEXHEIGHT 0x2c2c -#define MGA_TEXORG 0x2c24 -# define MGA_TEXORGMAP_MASK (1 << 0) -# define MGA_TEXORGMAP_FB (0 << 0) -# define MGA_TEXORGMAP_SYSMEM (1 << 0) -# define MGA_TEXORGACC_MASK (1 << 1) -# define MGA_TEXORGACC_PCI (0 << 1) -# define MGA_TEXORGACC_AGP (1 << 1) -#define MGA_TEXORG1 0x2ca4 -#define MGA_TEXORG2 0x2ca8 -#define MGA_TEXORG3 0x2cac -#define MGA_TEXORG4 0x2cb0 -#define MGA_TEXTRANS 0x2c34 -#define MGA_TEXTRANSHIGH 0x2c38 -#define MGA_TEXWIDTH 0x2c28 - -#define MGA_WACCEPTSEQ 0x1dd4 -#define MGA_WCODEADDR 0x1e6c -#define MGA_WFLAG 0x1dc4 -#define MGA_WFLAG1 0x1de0 -#define MGA_WFLAGNB 0x1e64 -#define MGA_WFLAGNB1 0x1e08 -#define MGA_WGETMSB 0x1dc8 -#define MGA_WIADDR 0x1dc0 -#define MGA_WIADDR2 0x1dd8 -# define MGA_WMODE_SUSPEND (0 << 0) -# define MGA_WMODE_RESUME (1 << 0) -# define MGA_WMODE_JUMP (2 << 0) -# define MGA_WMODE_START (3 << 0) -# define MGA_WAGP_ENABLE (1 << 2) -#define MGA_WMISC 0x1e70 -# define MGA_WUCODECACHE_ENABLE (1 << 0) -# define MGA_WMASTER_ENABLE (1 << 1) -# define MGA_WCACHEFLUSH_ENABLE (1 << 3) -#define MGA_WVRTXSZ 0x1dcc - -#define MGA_YBOT 0x1c9c -#define MGA_YDST 0x1c90 -#define MGA_YDSTLEN 0x1c88 -#define MGA_YDSTORG 0x1c94 -#define MGA_YTOP 0x1c98 - -#define MGA_ZORG 0x1c0c - -/* This finishes the current batch of commands - */ -#define MGA_EXEC 0x0100 - -/* AGP PLL encoding (for G200 only). - */ -#define MGA_AGP_PLL 0x1e4c -# define MGA_AGP2XPLL_DISABLE (0 << 0) -# define MGA_AGP2XPLL_ENABLE (1 << 0) - -/* Warp registers - */ -#define MGA_WR0 0x2d00 -#define MGA_WR1 0x2d04 -#define MGA_WR2 0x2d08 -#define MGA_WR3 0x2d0c -#define MGA_WR4 0x2d10 -#define MGA_WR5 0x2d14 -#define MGA_WR6 0x2d18 -#define MGA_WR7 0x2d1c -#define MGA_WR8 0x2d20 -#define MGA_WR9 0x2d24 -#define MGA_WR10 0x2d28 -#define MGA_WR11 0x2d2c -#define MGA_WR12 0x2d30 -#define MGA_WR13 0x2d34 -#define MGA_WR14 0x2d38 -#define MGA_WR15 0x2d3c -#define MGA_WR16 0x2d40 -#define MGA_WR17 0x2d44 -#define MGA_WR18 0x2d48 -#define MGA_WR19 0x2d4c -#define MGA_WR20 0x2d50 -#define MGA_WR21 0x2d54 -#define MGA_WR22 0x2d58 -#define MGA_WR23 0x2d5c -#define MGA_WR24 0x2d60 -#define MGA_WR25 0x2d64 -#define MGA_WR26 0x2d68 -#define MGA_WR27 0x2d6c -#define MGA_WR28 0x2d70 -#define MGA_WR29 0x2d74 -#define MGA_WR30 0x2d78 -#define MGA_WR31 0x2d7c -#define MGA_WR32 0x2d80 -#define MGA_WR33 0x2d84 -#define MGA_WR34 0x2d88 -#define MGA_WR35 0x2d8c -#define MGA_WR36 0x2d90 -#define MGA_WR37 0x2d94 -#define MGA_WR38 0x2d98 -#define MGA_WR39 0x2d9c -#define MGA_WR40 0x2da0 -#define MGA_WR41 0x2da4 -#define MGA_WR42 0x2da8 -#define MGA_WR43 0x2dac -#define MGA_WR44 0x2db0 -#define MGA_WR45 0x2db4 -#define MGA_WR46 0x2db8 -#define MGA_WR47 0x2dbc -#define MGA_WR48 0x2dc0 -#define MGA_WR49 0x2dc4 -#define MGA_WR50 0x2dc8 -#define MGA_WR51 0x2dcc -#define MGA_WR52 0x2dd0 -#define MGA_WR53 0x2dd4 -#define MGA_WR54 0x2dd8 -#define MGA_WR55 0x2ddc -#define MGA_WR56 0x2de0 -#define MGA_WR57 0x2de4 -#define MGA_WR58 0x2de8 -#define MGA_WR59 0x2dec -#define MGA_WR60 0x2df0 -#define MGA_WR61 0x2df4 -#define MGA_WR62 0x2df8 -#define MGA_WR63 0x2dfc -# define MGA_G400_WR_MAGIC (1 << 6) -# define MGA_G400_WR56_MAGIC 0x46480000 /* 12800.0f */ - -#define MGA_ILOAD_ALIGN 64 -#define MGA_ILOAD_MASK (MGA_ILOAD_ALIGN - 1) - -#define MGA_DWGCTL_FLUSH (MGA_OPCOD_TEXTURE_TRAP | \ - MGA_ATYPE_I | \ - MGA_ZMODE_NOZCMP | \ - MGA_ARZERO | \ - MGA_SGNZERO | \ - MGA_BOP_SRC | \ - (15 << MGA_TRANS_SHIFT)) - -#define MGA_DWGCTL_CLEAR (MGA_OPCOD_TRAP | \ - MGA_ZMODE_NOZCMP | \ - MGA_SOLID | \ - MGA_ARZERO | \ - MGA_SGNZERO | \ - MGA_SHIFTZERO | \ - MGA_BOP_SRC | \ - (0 << MGA_TRANS_SHIFT) | \ - MGA_BLTMOD_BMONOLEF | \ - MGA_TRANSC | \ - MGA_CLIPDIS) - -#define MGA_DWGCTL_COPY (MGA_OPCOD_BITBLT | \ - MGA_ATYPE_RPL | \ - MGA_SGNZERO | \ - MGA_SHIFTZERO | \ - MGA_BOP_SRC | \ - (0 << MGA_TRANS_SHIFT) | \ - MGA_BLTMOD_BFCOL | \ - MGA_CLIPDIS) - -/* Simple idle test. - */ -static __inline__ int mga_is_idle(drm_mga_private_t * dev_priv) -{ - u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK; - return (status == MGA_ENDPRDMASTS); -} - -#endif diff --git a/sys/dev/drm/mga_irq.c b/sys/dev/drm/mga_irq.c deleted file mode 100644 index 8e28987b9447..000000000000 --- a/sys/dev/drm/mga_irq.c +++ /dev/null @@ -1,183 +0,0 @@ -/* mga_irq.c -- IRQ handling for radeon -*- linux-c -*- - */ -/*- - * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. - * - * The Weather Channel (TM) funded Tungsten Graphics to develop the - * initial release of the Radeon 8500 driver under the XFree86 license. - * This notice must be preserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Eric Anholt <anholt@FreeBSD.org> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/mga_drm.h" -#include "dev/drm/mga_drv.h" - -u32 mga_get_vblank_counter(struct drm_device *dev, int crtc) -{ - const drm_mga_private_t *const dev_priv = - (drm_mga_private_t *) dev->dev_private; - - if (crtc != 0) { - return 0; - } - - - return atomic_read(&dev_priv->vbl_received); -} - - -irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS) -{ - struct drm_device *dev = (struct drm_device *) arg; - drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; - int status; - int handled = 0; - - status = MGA_READ(MGA_STATUS); - - /* VBLANK interrupt */ - if (status & MGA_VLINEPEN) { - MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR); - atomic_inc(&dev_priv->vbl_received); - drm_handle_vblank(dev, 0); - handled = 1; - } - - /* SOFTRAP interrupt */ - if (status & MGA_SOFTRAPEN) { - const u32 prim_start = MGA_READ(MGA_PRIMADDRESS); - const u32 prim_end = MGA_READ(MGA_PRIMEND); - - - MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR); - - /* In addition to clearing the interrupt-pending bit, we - * have to write to MGA_PRIMEND to re-start the DMA operation. - */ - if ((prim_start & ~0x03) != (prim_end & ~0x03)) { - MGA_WRITE(MGA_PRIMEND, prim_end); - } - - atomic_inc(&dev_priv->last_fence_retired); - DRM_WAKEUP(&dev_priv->fence_queue); - handled = 1; - } - - if (handled) - return IRQ_HANDLED; - return IRQ_NONE; -} - -int mga_enable_vblank(struct drm_device *dev, int crtc) -{ - drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; - - if (crtc != 0) { - DRM_ERROR("tried to enable vblank on non-existent crtc %d\n", - crtc); - return 0; - } - - MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); - return 0; -} - - -void mga_disable_vblank(struct drm_device *dev, int crtc) -{ - if (crtc != 0) { - DRM_ERROR("tried to disable vblank on non-existent crtc %d\n", - crtc); - } - - /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have - * a nice hardware counter that tracks the number of refreshes when - * the interrupt is disabled, and the kernel doesn't know the refresh - * rate to calculate an estimate. - */ - /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */ -} - -int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence) -{ - drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; - unsigned int cur_fence; - int ret = 0; - - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using fences. - */ - DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ, - (((cur_fence = atomic_read(&dev_priv->last_fence_retired)) - - *sequence) <= (1 << 23))); - - if (ret == -ERESTART) - DRM_DEBUG("restarting syscall\n"); - - *sequence = cur_fence; - - return ret; -} - -void mga_driver_irq_preinstall(struct drm_device * dev) -{ - drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; - - /* Disable *all* interrupts */ - MGA_WRITE(MGA_IEN, 0); - /* Clear bits if they're already high */ - MGA_WRITE(MGA_ICLEAR, ~0); -} - -int mga_driver_irq_postinstall(struct drm_device * dev) -{ - drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; - - DRM_INIT_WAITQUEUE(&dev_priv->fence_queue); - - /* Turn on soft trap interrupt. Vertical blank interrupts are enabled - * in mga_enable_vblank. - */ - MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN); - return 0; -} - -void mga_driver_irq_uninstall(struct drm_device * dev) -{ - drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; - if (!dev_priv) - return; - - /* Disable *all* interrupts */ - MGA_WRITE(MGA_IEN, 0); - - dev->irq_enabled = 0; -} diff --git a/sys/dev/drm/mga_state.c b/sys/dev/drm/mga_state.c deleted file mode 100644 index 1a0832a806b2..000000000000 --- a/sys/dev/drm/mga_state.c +++ /dev/null @@ -1,1142 +0,0 @@ -/* mga_state.c -- State support for MGA G200/G400 -*- linux-c -*- - * Created: Thu Jan 27 02:53:43 2000 by jhartmann@precisioninsight.com - */ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - * - * Rewritten by: - * Gareth Hughes <gareth@valinux.com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/mga_drm.h" -#include "dev/drm/mga_drv.h" - -/* ================================================================ - * DMA hardware state programming functions - */ - -static void mga_emit_clip_rect(drm_mga_private_t * dev_priv, - struct drm_clip_rect * box) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - unsigned int pitch = dev_priv->front_pitch; - DMA_LOCALS; - - BEGIN_DMA(2); - - /* Force reset of DWGCTL on G400 (eliminates clip disable bit). - */ - if (dev_priv->chipset >= MGA_CARD_TYPE_G400) { - DMA_BLOCK(MGA_DWGCTL, ctx->dwgctl, - MGA_LEN + MGA_EXEC, 0x80000000, - MGA_DWGCTL, ctx->dwgctl, - MGA_LEN + MGA_EXEC, 0x80000000); - } - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_CXBNDRY, ((box->x2 - 1) << 16) | box->x1, - MGA_YTOP, box->y1 * pitch, MGA_YBOT, (box->y2 - 1) * pitch); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - DMA_LOCALS; - - BEGIN_DMA(3); - - DMA_BLOCK(MGA_DSTORG, ctx->dstorg, - MGA_MACCESS, ctx->maccess, - MGA_PLNWT, ctx->plnwt, MGA_DWGCTL, ctx->dwgctl); - - DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl, - MGA_FOGCOL, ctx->fogcolor, - MGA_WFLAG, ctx->wflag, MGA_ZORG, dev_priv->depth_offset); - - DMA_BLOCK(MGA_FCOL, ctx->fcol, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - DMA_LOCALS; - - BEGIN_DMA(4); - - DMA_BLOCK(MGA_DSTORG, ctx->dstorg, - MGA_MACCESS, ctx->maccess, - MGA_PLNWT, ctx->plnwt, - MGA_DWGCTL, ctx->dwgctl); - - DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl, - MGA_FOGCOL, ctx->fogcolor, - MGA_WFLAG, ctx->wflag, - MGA_ZORG, dev_priv->depth_offset); - - DMA_BLOCK(MGA_WFLAG1, ctx->wflag, - MGA_TDUALSTAGE0, ctx->tdualstage0, - MGA_TDUALSTAGE1, ctx->tdualstage1, - MGA_FCOL, ctx->fcol); - - DMA_BLOCK(MGA_STENCIL, ctx->stencil, - MGA_STENCILCTL, ctx->stencilctl, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; - DMA_LOCALS; - - BEGIN_DMA(4); - - DMA_BLOCK(MGA_TEXCTL2, tex->texctl2, - MGA_TEXCTL, tex->texctl, - MGA_TEXFILTER, tex->texfilter, - MGA_TEXBORDERCOL, tex->texbordercol); - - DMA_BLOCK(MGA_TEXORG, tex->texorg, - MGA_TEXORG1, tex->texorg1, - MGA_TEXORG2, tex->texorg2, - MGA_TEXORG3, tex->texorg3); - - DMA_BLOCK(MGA_TEXORG4, tex->texorg4, - MGA_TEXWIDTH, tex->texwidth, - MGA_TEXHEIGHT, tex->texheight, - MGA_WR24, tex->texwidth); - - DMA_BLOCK(MGA_WR34, tex->texheight, - MGA_TEXTRANS, 0x0000ffff, - MGA_TEXTRANSHIGH, 0x0000ffff, - MGA_DMAPAD, 0x00000000); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; - DMA_LOCALS; - -/* printk("mga_g400_emit_tex0 %x %x %x\n", tex->texorg, */ -/* tex->texctl, tex->texctl2); */ - - BEGIN_DMA(6); - - DMA_BLOCK(MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC, - MGA_TEXCTL, tex->texctl, - MGA_TEXFILTER, tex->texfilter, - MGA_TEXBORDERCOL, tex->texbordercol); - - DMA_BLOCK(MGA_TEXORG, tex->texorg, - MGA_TEXORG1, tex->texorg1, - MGA_TEXORG2, tex->texorg2, - MGA_TEXORG3, tex->texorg3); - - DMA_BLOCK(MGA_TEXORG4, tex->texorg4, - MGA_TEXWIDTH, tex->texwidth, - MGA_TEXHEIGHT, tex->texheight, - MGA_WR49, 0x00000000); - - DMA_BLOCK(MGA_WR57, 0x00000000, - MGA_WR53, 0x00000000, - MGA_WR61, 0x00000000, - MGA_WR52, MGA_G400_WR_MAGIC); - - DMA_BLOCK(MGA_WR60, MGA_G400_WR_MAGIC, - MGA_WR54, tex->texwidth | MGA_G400_WR_MAGIC, - MGA_WR62, tex->texheight | MGA_G400_WR_MAGIC, - MGA_DMAPAD, 0x00000000); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_TEXTRANS, 0x0000ffff, - MGA_TEXTRANSHIGH, 0x0000ffff); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1]; - DMA_LOCALS; - -/* printk("mga_g400_emit_tex1 %x %x %x\n", tex->texorg, */ -/* tex->texctl, tex->texctl2); */ - - BEGIN_DMA(5); - - DMA_BLOCK(MGA_TEXCTL2, (tex->texctl2 | - MGA_MAP1_ENABLE | - MGA_G400_TC2_MAGIC), - MGA_TEXCTL, tex->texctl, - MGA_TEXFILTER, tex->texfilter, - MGA_TEXBORDERCOL, tex->texbordercol); - - DMA_BLOCK(MGA_TEXORG, tex->texorg, - MGA_TEXORG1, tex->texorg1, - MGA_TEXORG2, tex->texorg2, - MGA_TEXORG3, tex->texorg3); - - DMA_BLOCK(MGA_TEXORG4, tex->texorg4, - MGA_TEXWIDTH, tex->texwidth, - MGA_TEXHEIGHT, tex->texheight, - MGA_WR49, 0x00000000); - - DMA_BLOCK(MGA_WR57, 0x00000000, - MGA_WR53, 0x00000000, - MGA_WR61, 0x00000000, - MGA_WR52, tex->texwidth | MGA_G400_WR_MAGIC); - - DMA_BLOCK(MGA_WR60, tex->texheight | MGA_G400_WR_MAGIC, - MGA_TEXTRANS, 0x0000ffff, - MGA_TEXTRANSHIGH, 0x0000ffff, - MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int pipe = sarea_priv->warp_pipe; - DMA_LOCALS; - - BEGIN_DMA(3); - - DMA_BLOCK(MGA_WIADDR, MGA_WMODE_SUSPEND, - MGA_WVRTXSZ, 0x00000007, - MGA_WFLAG, 0x00000000, - MGA_WR24, 0x00000000); - - DMA_BLOCK(MGA_WR25, 0x00000100, - MGA_WR34, 0x00000000, - MGA_WR42, 0x0000ffff, - MGA_WR60, 0x0000ffff); - - /* Padding required due to hardware bug. - */ - DMA_BLOCK(MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_WIADDR, (dev_priv->warp_pipe_phys[pipe] | - MGA_WMODE_START | dev_priv->wagp_enable)); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int pipe = sarea_priv->warp_pipe; - DMA_LOCALS; - -/* printk("mga_g400_emit_pipe %x\n", pipe); */ - - BEGIN_DMA(10); - - DMA_BLOCK(MGA_WIADDR2, MGA_WMODE_SUSPEND, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000); - - if (pipe & MGA_T2) { - DMA_BLOCK(MGA_WVRTXSZ, 0x00001e09, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000); - - DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x1e000000); - } else { - if (dev_priv->warp_pipe & MGA_T2) { - /* Flush the WARP pipe */ - DMA_BLOCK(MGA_YDST, 0x00000000, - MGA_FXLEFT, 0x00000000, - MGA_FXRIGHT, 0x00000001, - MGA_DWGCTL, MGA_DWGCTL_FLUSH); - - DMA_BLOCK(MGA_LEN + MGA_EXEC, 0x00000001, - MGA_DWGSYNC, 0x00007000, - MGA_TEXCTL2, MGA_G400_TC2_MAGIC, - MGA_LEN + MGA_EXEC, 0x00000000); - - DMA_BLOCK(MGA_TEXCTL2, (MGA_DUALTEX | - MGA_G400_TC2_MAGIC), - MGA_LEN + MGA_EXEC, 0x00000000, - MGA_TEXCTL2, MGA_G400_TC2_MAGIC, - MGA_DMAPAD, 0x00000000); - } - - DMA_BLOCK(MGA_WVRTXSZ, 0x00001807, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000); - - DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x18000000); - } - - DMA_BLOCK(MGA_WFLAG, 0x00000000, - MGA_WFLAG1, 0x00000000, - MGA_WR56, MGA_G400_WR56_MAGIC, - MGA_DMAPAD, 0x00000000); - - DMA_BLOCK(MGA_WR49, 0x00000000, /* tex0 */ - MGA_WR57, 0x00000000, /* tex0 */ - MGA_WR53, 0x00000000, /* tex1 */ - MGA_WR61, 0x00000000); /* tex1 */ - - DMA_BLOCK(MGA_WR54, MGA_G400_WR_MAGIC, /* tex0 width */ - MGA_WR62, MGA_G400_WR_MAGIC, /* tex0 height */ - MGA_WR52, MGA_G400_WR_MAGIC, /* tex1 width */ - MGA_WR60, MGA_G400_WR_MAGIC); /* tex1 height */ - - /* Padding required due to hardware bug */ - DMA_BLOCK(MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_WIADDR2, (dev_priv->warp_pipe_phys[pipe] | - MGA_WMODE_START | dev_priv->wagp_enable)); - - ADVANCE_DMA(); -} - -static void mga_g200_emit_state(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - if (sarea_priv->warp_pipe != dev_priv->warp_pipe) { - mga_g200_emit_pipe(dev_priv); - dev_priv->warp_pipe = sarea_priv->warp_pipe; - } - - if (dirty & MGA_UPLOAD_CONTEXT) { - mga_g200_emit_context(dev_priv); - sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT; - } - - if (dirty & MGA_UPLOAD_TEX0) { - mga_g200_emit_tex0(dev_priv); - sarea_priv->dirty &= ~MGA_UPLOAD_TEX0; - } -} - -static void mga_g400_emit_state(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - int multitex = sarea_priv->warp_pipe & MGA_T2; - - if (sarea_priv->warp_pipe != dev_priv->warp_pipe) { - mga_g400_emit_pipe(dev_priv); - dev_priv->warp_pipe = sarea_priv->warp_pipe; - } - - if (dirty & MGA_UPLOAD_CONTEXT) { - mga_g400_emit_context(dev_priv); - sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT; - } - - if (dirty & MGA_UPLOAD_TEX0) { - mga_g400_emit_tex0(dev_priv); - sarea_priv->dirty &= ~MGA_UPLOAD_TEX0; - } - - if ((dirty & MGA_UPLOAD_TEX1) && multitex) { - mga_g400_emit_tex1(dev_priv); - sarea_priv->dirty &= ~MGA_UPLOAD_TEX1; - } -} - -/* ================================================================ - * SAREA state verification - */ - -/* Disallow all write destinations except the front and backbuffer. - */ -static int mga_verify_context(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - - if (ctx->dstorg != dev_priv->front_offset && - ctx->dstorg != dev_priv->back_offset) { - DRM_ERROR("*** bad DSTORG: %x (front %x, back %x)\n\n", - ctx->dstorg, dev_priv->front_offset, - dev_priv->back_offset); - ctx->dstorg = 0; - return -EINVAL; - } - - return 0; -} - -/* Disallow texture reads from PCI space. - */ -static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit]; - unsigned int org; - - org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK); - - if (org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI)) { - DRM_ERROR("*** bad TEXORG: 0x%x, unit %d\n", tex->texorg, unit); - tex->texorg = 0; - return -EINVAL; - } - - return 0; -} - -static int mga_verify_state(drm_mga_private_t * dev_priv) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - int ret = 0; - - if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - if (dirty & MGA_UPLOAD_CONTEXT) - ret |= mga_verify_context(dev_priv); - - if (dirty & MGA_UPLOAD_TEX0) - ret |= mga_verify_tex(dev_priv, 0); - - if (dev_priv->chipset >= MGA_CARD_TYPE_G400) { - if (dirty & MGA_UPLOAD_TEX1) - ret |= mga_verify_tex(dev_priv, 1); - - if (dirty & MGA_UPLOAD_PIPE) - ret |= (sarea_priv->warp_pipe > MGA_MAX_G400_PIPES); - } else { - if (dirty & MGA_UPLOAD_PIPE) - ret |= (sarea_priv->warp_pipe > MGA_MAX_G200_PIPES); - } - - return (ret == 0); -} - -static int mga_verify_iload(drm_mga_private_t * dev_priv, - unsigned int dstorg, unsigned int length) -{ - if (dstorg < dev_priv->texture_offset || - dstorg + length > (dev_priv->texture_offset + - dev_priv->texture_size)) { - DRM_ERROR("*** bad iload DSTORG: 0x%x\n", dstorg); - return -EINVAL; - } - - if (length & MGA_ILOAD_MASK) { - DRM_ERROR("*** bad iload length: 0x%x\n", - length & MGA_ILOAD_MASK); - return -EINVAL; - } - - return 0; -} - -static int mga_verify_blit(drm_mga_private_t * dev_priv, - unsigned int srcorg, unsigned int dstorg) -{ - if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) || - (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM)) { - DRM_ERROR("*** bad blit: src=0x%x dst=0x%x\n", srcorg, dstorg); - return -EINVAL; - } - return 0; -} - -/* ================================================================ - * - */ - -static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * clear) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - struct drm_clip_rect *pbox = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - int i; - DMA_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_DMA(1); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000); - - ADVANCE_DMA(); - - for (i = 0; i < nbox; i++) { - struct drm_clip_rect *box = &pbox[i]; - u32 height = box->y2 - box->y1; - - DRM_DEBUG(" from=%d,%d to=%d,%d\n", - box->x1, box->y1, box->x2, box->y2); - - if (clear->flags & MGA_FRONT) { - BEGIN_DMA(2); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_PLNWT, clear->color_mask, - MGA_YDSTLEN, (box->y1 << 16) | height, - MGA_FXBNDRY, (box->x2 << 16) | box->x1); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_FCOL, clear->clear_color, - MGA_DSTORG, dev_priv->front_offset, - MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd); - - ADVANCE_DMA(); - } - - if (clear->flags & MGA_BACK) { - BEGIN_DMA(2); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_PLNWT, clear->color_mask, - MGA_YDSTLEN, (box->y1 << 16) | height, - MGA_FXBNDRY, (box->x2 << 16) | box->x1); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_FCOL, clear->clear_color, - MGA_DSTORG, dev_priv->back_offset, - MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd); - - ADVANCE_DMA(); - } - - if (clear->flags & MGA_DEPTH) { - BEGIN_DMA(2); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_PLNWT, clear->depth_mask, - MGA_YDSTLEN, (box->y1 << 16) | height, - MGA_FXBNDRY, (box->x2 << 16) | box->x1); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_FCOL, clear->clear_depth, - MGA_DSTORG, dev_priv->depth_offset, - MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd); - - ADVANCE_DMA(); - } - - } - - BEGIN_DMA(1); - - /* Force reset of DWGCTL */ - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_PLNWT, ctx->plnwt, - MGA_DWGCTL, ctx->dwgctl); - - ADVANCE_DMA(); - - FLUSH_DMA(); -} - -static void mga_dma_dispatch_swap(struct drm_device * dev) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - struct drm_clip_rect *pbox = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - int i; - DMA_LOCALS; - DRM_DEBUG("\n"); - - sarea_priv->last_frame.head = dev_priv->prim.tail; - sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap; - - BEGIN_DMA(4 + nbox); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000); - - DMA_BLOCK(MGA_DSTORG, dev_priv->front_offset, - MGA_MACCESS, dev_priv->maccess, - MGA_SRCORG, dev_priv->back_offset, - MGA_AR5, dev_priv->front_pitch); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_PLNWT, 0xffffffff, - MGA_DWGCTL, MGA_DWGCTL_COPY); - - for (i = 0; i < nbox; i++) { - struct drm_clip_rect *box = &pbox[i]; - u32 height = box->y2 - box->y1; - u32 start = box->y1 * dev_priv->front_pitch; - - DRM_DEBUG(" from=%d,%d to=%d,%d\n", - box->x1, box->y1, box->x2, box->y2); - - DMA_BLOCK(MGA_AR0, start + box->x2 - 1, - MGA_AR3, start + box->x1, - MGA_FXBNDRY, ((box->x2 - 1) << 16) | box->x1, - MGA_YDSTLEN + MGA_EXEC, (box->y1 << 16) | height); - } - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_PLNWT, ctx->plnwt, - MGA_SRCORG, dev_priv->front_offset, - MGA_DWGCTL, ctx->dwgctl); - - ADVANCE_DMA(); - - FLUSH_DMA(); - - DRM_DEBUG("... done.\n"); -} - -static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - u32 address = (u32) buf->bus_address; - u32 length = (u32) buf->used; - int i = 0; - DMA_LOCALS; - DRM_DEBUG("buf=%d used=%d\n", buf->idx, buf->used); - - if (buf->used) { - buf_priv->dispatched = 1; - - MGA_EMIT_STATE(dev_priv, sarea_priv->dirty); - - do { - if (i < sarea_priv->nbox) { - mga_emit_clip_rect(dev_priv, - &sarea_priv->boxes[i]); - } - - BEGIN_DMA(1); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_SECADDRESS, (address | - MGA_DMA_VERTEX), - MGA_SECEND, ((address + length) | - dev_priv->dma_access)); - - ADVANCE_DMA(); - } while (++i < sarea_priv->nbox); - } - - if (buf_priv->discard) { - AGE_BUFFER(buf_priv); - buf->pending = 0; - buf->used = 0; - buf_priv->dispatched = 0; - - mga_freelist_put(dev, buf); - } - - FLUSH_DMA(); -} - -static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * buf, - unsigned int start, unsigned int end) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - u32 address = (u32) buf->bus_address; - int i = 0; - DMA_LOCALS; - DRM_DEBUG("buf=%d start=%d end=%d\n", buf->idx, start, end); - - if (start != end) { - buf_priv->dispatched = 1; - - MGA_EMIT_STATE(dev_priv, sarea_priv->dirty); - - do { - if (i < sarea_priv->nbox) { - mga_emit_clip_rect(dev_priv, - &sarea_priv->boxes[i]); - } - - BEGIN_DMA(1); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_SETUPADDRESS, address + start, - MGA_SETUPEND, ((address + end) | - dev_priv->dma_access)); - - ADVANCE_DMA(); - } while (++i < sarea_priv->nbox); - } - - if (buf_priv->discard) { - AGE_BUFFER(buf_priv); - buf->pending = 0; - buf->used = 0; - buf_priv->dispatched = 0; - - mga_freelist_put(dev, buf); - } - - FLUSH_DMA(); -} - -/* This copies a 64 byte aligned agp region to the frambuffer with a - * standard blit, the ioctl needs to do checking. - */ -static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf, - unsigned int dstorg, unsigned int length) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state; - u32 srcorg = buf->bus_address | dev_priv->dma_access | MGA_SRCMAP_SYSMEM; - u32 y2; - DMA_LOCALS; - DRM_DEBUG("buf=%d used=%d\n", buf->idx, buf->used); - - y2 = length / 64; - - BEGIN_DMA(5); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000); - - DMA_BLOCK(MGA_DSTORG, dstorg, - MGA_MACCESS, 0x00000000, - MGA_SRCORG, srcorg, - MGA_AR5, 64); - - DMA_BLOCK(MGA_PITCH, 64, - MGA_PLNWT, 0xffffffff, - MGA_DMAPAD, 0x00000000, - MGA_DWGCTL, MGA_DWGCTL_COPY); - - DMA_BLOCK(MGA_AR0, 63, - MGA_AR3, 0, - MGA_FXBNDRY, (63 << 16) | 0, - MGA_YDSTLEN + MGA_EXEC, y2); - - DMA_BLOCK(MGA_PLNWT, ctx->plnwt, - MGA_SRCORG, dev_priv->front_offset, - MGA_PITCH, dev_priv->front_pitch, - MGA_DWGSYNC, 0x00007000); - - ADVANCE_DMA(); - - AGE_BUFFER(buf_priv); - - buf->pending = 0; - buf->used = 0; - buf_priv->dispatched = 0; - - mga_freelist_put(dev, buf); - - FLUSH_DMA(); -} - -static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - struct drm_clip_rect *pbox = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - u32 scandir = 0, i; - DMA_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_DMA(4 + nbox); - - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000); - - DMA_BLOCK(MGA_DWGCTL, MGA_DWGCTL_COPY, - MGA_PLNWT, blit->planemask, - MGA_SRCORG, blit->srcorg, - MGA_DSTORG, blit->dstorg); - - DMA_BLOCK(MGA_SGN, scandir, - MGA_MACCESS, dev_priv->maccess, - MGA_AR5, blit->ydir * blit->src_pitch, - MGA_PITCH, blit->dst_pitch); - - for (i = 0; i < nbox; i++) { - int srcx = pbox[i].x1 + blit->delta_sx; - int srcy = pbox[i].y1 + blit->delta_sy; - int dstx = pbox[i].x1 + blit->delta_dx; - int dsty = pbox[i].y1 + blit->delta_dy; - int h = pbox[i].y2 - pbox[i].y1; - int w = pbox[i].x2 - pbox[i].x1 - 1; - int start; - - if (blit->ydir == -1) { - srcy = blit->height - srcy - 1; - } - - start = srcy * blit->src_pitch + srcx; - - DMA_BLOCK(MGA_AR0, start + w, - MGA_AR3, start, - MGA_FXBNDRY, ((dstx + w) << 16) | (dstx & 0xffff), - MGA_YDSTLEN + MGA_EXEC, (dsty << 16) | h); - } - - /* Do something to flush AGP? - */ - - /* Force reset of DWGCTL */ - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_PLNWT, ctx->plnwt, - MGA_PITCH, dev_priv->front_pitch, - MGA_DWGCTL, ctx->dwgctl); - - ADVANCE_DMA(); -} - -/* ================================================================ - * - */ - -static int mga_dma_clear(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_clear_t *clear = data; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - WRAP_TEST_WITH_RETURN(dev_priv); - - mga_dma_dispatch_clear(dev, clear); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -static int mga_dma_swap(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - WRAP_TEST_WITH_RETURN(dev_priv); - - mga_dma_dispatch_swap(dev); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -static int mga_dma_vertex(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - struct drm_device_dma *dma = dev->dma; - struct drm_buf *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_vertex_t *vertex = data; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (vertex->idx < 0 || vertex->idx > dma->buf_count) - return -EINVAL; - buf = dma->buflist[vertex->idx]; - buf_priv = buf->dev_private; - - buf->used = vertex->used; - buf_priv->discard = vertex->discard; - - if (!mga_verify_state(dev_priv)) { - if (vertex->discard) { - if (buf_priv->dispatched == 1) - AGE_BUFFER(buf_priv); - buf_priv->dispatched = 0; - mga_freelist_put(dev, buf); - } - return -EINVAL; - } - - WRAP_TEST_WITH_RETURN(dev_priv); - - mga_dma_dispatch_vertex(dev, buf); - - return 0; -} - -static int mga_dma_indices(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - struct drm_device_dma *dma = dev->dma; - struct drm_buf *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_indices_t *indices = data; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (indices->idx < 0 || indices->idx > dma->buf_count) - return -EINVAL; - - buf = dma->buflist[indices->idx]; - buf_priv = buf->dev_private; - - buf_priv->discard = indices->discard; - - if (!mga_verify_state(dev_priv)) { - if (indices->discard) { - if (buf_priv->dispatched == 1) - AGE_BUFFER(buf_priv); - buf_priv->dispatched = 0; - mga_freelist_put(dev, buf); - } - return -EINVAL; - } - - WRAP_TEST_WITH_RETURN(dev_priv); - - mga_dma_dispatch_indices(dev, buf, indices->start, indices->end); - - return 0; -} - -static int mga_dma_iload(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_device_dma *dma = dev->dma; - drm_mga_private_t *dev_priv = dev->dev_private; - struct drm_buf *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_iload_t *iload = data; - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - -#if 0 - if (mga_do_wait_for_idle(dev_priv) < 0) { - if (MGA_DMA_DEBUG) - DRM_INFO("-EBUSY\n"); - return -EBUSY; - } -#endif - if (iload->idx < 0 || iload->idx > dma->buf_count) - return -EINVAL; - - buf = dma->buflist[iload->idx]; - buf_priv = buf->dev_private; - - if (mga_verify_iload(dev_priv, iload->dstorg, iload->length)) { - mga_freelist_put(dev, buf); - return -EINVAL; - } - - WRAP_TEST_WITH_RETURN(dev_priv); - - mga_dma_dispatch_iload(dev, buf, iload->dstorg, iload->length); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -static int mga_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_blit_t *blit = data; - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - if (mga_verify_blit(dev_priv, blit->srcorg, blit->dstorg)) - return -EINVAL; - - WRAP_TEST_WITH_RETURN(dev_priv); - - mga_dma_dispatch_blit(dev, blit); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -static int mga_getparam(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_getparam_t *param = data; - int value; - - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } - - DRM_DEBUG("pid=%d\n", DRM_CURRENTPID); - - switch (param->param) { - case MGA_PARAM_IRQ_NR: - value = dev->irq; - break; - case MGA_PARAM_CARD_TYPE: - value = dev_priv->chipset; - break; - default: - return -EINVAL; - } - - if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) { - DRM_ERROR("copy_to_user\n"); - return -EFAULT; - } - - return 0; -} - -static int mga_set_fence(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - u32 *fence = data; - DMA_LOCALS; - - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } - - DRM_DEBUG("pid=%d\n", DRM_CURRENTPID); - - /* I would normal do this assignment in the declaration of fence, - * but dev_priv may be NULL. - */ - - *fence = dev_priv->next_fence_to_post; - dev_priv->next_fence_to_post++; - - BEGIN_DMA(1); - DMA_BLOCK(MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_SOFTRAP, 0x00000000); - ADVANCE_DMA(); - - return 0; -} - -static int mga_wait_fence(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - u32 *fence = data; - - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } - - DRM_DEBUG("pid=%d\n", DRM_CURRENTPID); - - mga_driver_fence_wait(dev, fence); - - return 0; -} - -struct drm_ioctl_desc mga_ioctls[] = { - DRM_IOCTL_DEF(DRM_MGA_INIT, mga_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_MGA_FLUSH, mga_dma_flush, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_RESET, mga_dma_reset, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_SWAP, mga_dma_swap, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_CLEAR, mga_dma_clear, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_VERTEX, mga_dma_vertex, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_INDICES, mga_dma_indices, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_ILOAD, mga_dma_iload, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_BLIT, mga_dma_blit, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_GETPARAM, mga_getparam, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_SET_FENCE, mga_set_fence, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_WAIT_FENCE, mga_wait_fence, DRM_AUTH), - DRM_IOCTL_DEF(DRM_MGA_DMA_BOOTSTRAP, mga_dma_bootstrap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - -}; - -int mga_max_ioctl = DRM_ARRAY_SIZE(mga_ioctls); diff --git a/sys/dev/drm/mga_ucode.h b/sys/dev/drm/mga_ucode.h deleted file mode 100644 index 455e25e5eb0f..000000000000 --- a/sys/dev/drm/mga_ucode.h +++ /dev/null @@ -1,11648 +0,0 @@ -/* mga_ucode.h -- Matrox G200/G400 WARP engine microcode -*- linux-c -*- - * Created: Thu Jan 11 21:20:43 2001 by gareth@valinux.com - * - * Copyright 1999 Matrox Graphics Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * MATROX GRAPHICS INC., OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE - * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Kernel-based WARP engine management: - * Gareth Hughes <gareth@valinux.com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * WARP pipes are named according to the functions they perform, where: - * - * - T stands for computation of texture stage 0 - * - T2 stands for computation of both texture stage 0 and texture stage 1 - * - G stands for computation of triangle intensity (Gouraud interpolation) - * - Z stands for computation of Z buffer interpolation - * - S stands for computation of specular highlight - * - A stands for computation of the alpha channel - * - F stands for computation of vertex fog interpolation - */ - -static unsigned char warp_g200_tgz[] = { - - 0x00, 0x80, 0x00, 0xE8, - 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0x2A, 0x20, - 0x1A, 0x20, - - 0x2A, 0x46, 0x4E, 0xBF, - 0x1A, 0x46, 0x56, 0xBF, - - 0x31, 0x53, 0x2F, 0x9F, - 0xA4, 0x31, 0x4F, 0xE9, - - 0x39, 0xE5, 0x2C, 0x9F, - 0xA5, 0x39, 0x4F, 0xE9, - - 0x0A, 0x47, 0x4F, 0xBF, - 0x02, 0x47, 0x57, 0xBF, - - 0x31, 0x53, 0x2F, 0x9F, - 0xA1, 0x30, 0x4F, 0xE9, - - 0x39, 0xE5, 0x2C, 0x9F, - 0xA2, 0x38, 0x4F, 0xE9, - - 0x2A, 0x43, 0x4B, 0xBF, - 0x1A, 0x43, 0x53, 0xBF, - - 0x30, 0x50, 0x2E, 0x9F, - 0x35, 0x31, 0x4F, 0xE9, - - 0x38, 0x21, 0x2C, 0x9F, - 0x39, 0x39, 0x4F, 0xE9, - - 0x31, 0x53, 0x2F, 0x9F, - 0x80, 0x31, 0x57, 0xE9, - - 0x39, 0xE5, 0x2C, 0x9F, - 0x81, 0x39, 0x57, 0xE9, - - 0x37, 0x48, 0x50, 0xBD, - 0x8A, 0x36, 0x20, 0xE9, - - 0x86, 0x76, 0x57, 0xE9, - 0x8B, 0x3E, 0x20, 0xE9, - - 0x82, 0x30, 0x57, 0xE9, - 0x87, 0x77, 0x57, 0xE9, - - 0x83, 0x38, 0x57, 0xE9, - 0x35, 0x49, 0x51, 0xBD, - - 0x84, 0x31, 0x5E, 0xE9, - 0x30, 0x1F, 0x5F, 0xE9, - - 0x85, 0x39, 0x5E, 0xE9, - 0x57, 0x25, 0x20, 0xE9, - - 0x2B, 0x48, 0x20, 0xE9, - 0x1D, 0x37, 0xE1, 0xEA, - - 0x1E, 0x35, 0xE1, 0xEA, - 0x00, 0xE0, - 0x26, 0x77, - - 0x24, 0x49, 0x20, 0xE9, - 0x9D, 0xFF, 0x20, 0xEA, - - 0x16, 0x26, 0x20, 0xE9, - 0x57, 0x2E, 0xBF, 0xEA, - - 0x1C, 0x46, 0xA0, 0xE8, - 0x23, 0x4E, 0xA0, 0xE8, - - 0x2B, 0x56, 0xA0, 0xE8, - 0x1D, 0x47, 0xA0, 0xE8, - - 0x24, 0x4F, 0xA0, 0xE8, - 0x2C, 0x57, 0xA0, 0xE8, - - 0x1C, 0x00, - 0x23, 0x00, - 0x2B, 0x00, - 0x00, 0xE0, - - 0x1D, 0x00, - 0x24, 0x00, - 0x2C, 0x00, - 0x00, 0xE0, - - 0x1C, 0x65, - 0x23, 0x65, - 0x2B, 0x65, - 0x00, 0xE0, - - 0x1D, 0x65, - 0x24, 0x65, - 0x2C, 0x65, - 0x00, 0xE0, - - 0x1C, 0x23, 0x60, 0xEC, - 0x36, 0xD7, 0x36, 0xAD, - - 0x2B, 0x80, 0x60, 0xEC, - 0x1D, 0x24, 0x60, 0xEC, - - 0x3E, 0xD7, 0x3E, 0xAD, - 0x2C, 0x80, 0x60, 0xEC, - - 0x1C, 0x2B, 0xDE, 0xE8, - 0x23, 0x80, 0xDE, 0xE8, - - 0x36, 0x80, 0x36, 0xBD, - 0x3E, 0x80, 0x3E, 0xBD, - - 0x33, 0xD7, 0x1C, 0xBD, - 0x3B, 0xD7, 0x23, 0xBD, - - 0x46, 0x80, 0x46, 0xCF, - 0x4F, 0x80, 0x4F, 0xCF, - - 0x56, 0x33, 0x56, 0xCF, - 0x47, 0x3B, 0x47, 0xCF, - - 0xC5, 0xFF, 0x20, 0xEA, - 0x00, 0x80, 0x00, 0xE8, - - 0x4E, 0x33, 0x4E, 0xCF, - 0x57, 0x3B, 0x57, 0xCF, - - 0x8B, 0xFF, 0x20, 0xEA, - 0x57, 0xC0, 0xBF, 0xEA, - - 0x00, 0x80, 0xA0, 0xE9, - 0x00, 0x00, 0xD8, 0xEC, - -}; diff --git a/sys/dev/drm/mga_warp.c b/sys/dev/drm/mga_warp.c deleted file mode 100644 index 98c1615f5095..000000000000 --- a/sys/dev/drm/mga_warp.c +++ /dev/null @@ -1,201 +0,0 @@ -/* mga_warp.c -- Matrox G200/G400 WARP engine management -*- linux-c -*- - * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com - */ -/*- - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/mga_drm.h" -#include "dev/drm/mga_drv.h" -#include "dev/drm/mga_ucode.h" - -#define MGA_WARP_CODE_ALIGN 256 /* in bytes */ - -#define WARP_UCODE_SIZE( which ) \ - ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN) - -#define WARP_UCODE_INSTALL( which, where ) \ -do { \ - DRM_DEBUG( " pcbase = 0x%08lx vcbase = %p\n", pcbase, vcbase );\ - dev_priv->warp_pipe_phys[where] = pcbase; \ - memcpy( vcbase, which, sizeof(which) ); \ - pcbase += WARP_UCODE_SIZE( which ); \ - vcbase += WARP_UCODE_SIZE( which ); \ -} while (0) - -static const unsigned int mga_warp_g400_microcode_size = - (WARP_UCODE_SIZE(warp_g400_tgz) + - WARP_UCODE_SIZE(warp_g400_tgza) + - WARP_UCODE_SIZE(warp_g400_tgzaf) + - WARP_UCODE_SIZE(warp_g400_tgzf) + - WARP_UCODE_SIZE(warp_g400_tgzs) + - WARP_UCODE_SIZE(warp_g400_tgzsa) + - WARP_UCODE_SIZE(warp_g400_tgzsaf) + - WARP_UCODE_SIZE(warp_g400_tgzsf) + - WARP_UCODE_SIZE(warp_g400_t2gz) + - WARP_UCODE_SIZE(warp_g400_t2gza) + - WARP_UCODE_SIZE(warp_g400_t2gzaf) + - WARP_UCODE_SIZE(warp_g400_t2gzf) + - WARP_UCODE_SIZE(warp_g400_t2gzs) + - WARP_UCODE_SIZE(warp_g400_t2gzsa) + - WARP_UCODE_SIZE(warp_g400_t2gzsaf) + - WARP_UCODE_SIZE(warp_g400_t2gzsf)); - -static const unsigned int mga_warp_g200_microcode_size = - (WARP_UCODE_SIZE(warp_g200_tgz) + - WARP_UCODE_SIZE(warp_g200_tgza) + - WARP_UCODE_SIZE(warp_g200_tgzaf) + - WARP_UCODE_SIZE(warp_g200_tgzf) + - WARP_UCODE_SIZE(warp_g200_tgzs) + - WARP_UCODE_SIZE(warp_g200_tgzsa) + - WARP_UCODE_SIZE(warp_g200_tgzsaf) + - WARP_UCODE_SIZE(warp_g200_tgzsf)); - - -unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv) -{ - switch (dev_priv->chipset) { - case MGA_CARD_TYPE_G400: - case MGA_CARD_TYPE_G550: - return PAGE_ALIGN(mga_warp_g400_microcode_size); - case MGA_CARD_TYPE_G200: - return PAGE_ALIGN(mga_warp_g200_microcode_size); - default: - DRM_ERROR("Unknown chipset value: 0x%x\n", dev_priv->chipset); - return 0; - } -} - -static int mga_warp_install_g400_microcode(drm_mga_private_t * dev_priv) -{ - unsigned char *vcbase = dev_priv->warp->virtual; - unsigned long pcbase = dev_priv->warp->offset; - - memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys)); - - WARP_UCODE_INSTALL(warp_g400_tgz, MGA_WARP_TGZ); - WARP_UCODE_INSTALL(warp_g400_tgzf, MGA_WARP_TGZF); - WARP_UCODE_INSTALL(warp_g400_tgza, MGA_WARP_TGZA); - WARP_UCODE_INSTALL(warp_g400_tgzaf, MGA_WARP_TGZAF); - WARP_UCODE_INSTALL(warp_g400_tgzs, MGA_WARP_TGZS); - WARP_UCODE_INSTALL(warp_g400_tgzsf, MGA_WARP_TGZSF); - WARP_UCODE_INSTALL(warp_g400_tgzsa, MGA_WARP_TGZSA); - WARP_UCODE_INSTALL(warp_g400_tgzsaf, MGA_WARP_TGZSAF); - - WARP_UCODE_INSTALL(warp_g400_t2gz, MGA_WARP_T2GZ); - WARP_UCODE_INSTALL(warp_g400_t2gzf, MGA_WARP_T2GZF); - WARP_UCODE_INSTALL(warp_g400_t2gza, MGA_WARP_T2GZA); - WARP_UCODE_INSTALL(warp_g400_t2gzaf, MGA_WARP_T2GZAF); - WARP_UCODE_INSTALL(warp_g400_t2gzs, MGA_WARP_T2GZS); - WARP_UCODE_INSTALL(warp_g400_t2gzsf, MGA_WARP_T2GZSF); - WARP_UCODE_INSTALL(warp_g400_t2gzsa, MGA_WARP_T2GZSA); - WARP_UCODE_INSTALL(warp_g400_t2gzsaf, MGA_WARP_T2GZSAF); - - return 0; -} - -static int mga_warp_install_g200_microcode(drm_mga_private_t * dev_priv) -{ - unsigned char *vcbase = dev_priv->warp->virtual; - unsigned long pcbase = dev_priv->warp->offset; - - memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys)); - - WARP_UCODE_INSTALL(warp_g200_tgz, MGA_WARP_TGZ); - WARP_UCODE_INSTALL(warp_g200_tgzf, MGA_WARP_TGZF); - WARP_UCODE_INSTALL(warp_g200_tgza, MGA_WARP_TGZA); - WARP_UCODE_INSTALL(warp_g200_tgzaf, MGA_WARP_TGZAF); - WARP_UCODE_INSTALL(warp_g200_tgzs, MGA_WARP_TGZS); - WARP_UCODE_INSTALL(warp_g200_tgzsf, MGA_WARP_TGZSF); - WARP_UCODE_INSTALL(warp_g200_tgzsa, MGA_WARP_TGZSA); - WARP_UCODE_INSTALL(warp_g200_tgzsaf, MGA_WARP_TGZSAF); - - return 0; -} - -int mga_warp_install_microcode(drm_mga_private_t * dev_priv) -{ - const unsigned int size = mga_warp_microcode_size(dev_priv); - - DRM_DEBUG("MGA ucode size = %d bytes\n", size); - if (size > dev_priv->warp->size) { - DRM_ERROR("microcode too large! (%u > %lu)\n", - size, dev_priv->warp->size); - return -ENOMEM; - } - - switch (dev_priv->chipset) { - case MGA_CARD_TYPE_G400: - case MGA_CARD_TYPE_G550: - return mga_warp_install_g400_microcode(dev_priv); - case MGA_CARD_TYPE_G200: - return mga_warp_install_g200_microcode(dev_priv); - default: - return -EINVAL; - } -} - -#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE) - -int mga_warp_init(drm_mga_private_t * dev_priv) -{ - u32 wmisc; - - /* FIXME: Get rid of these damned magic numbers... - */ - switch (dev_priv->chipset) { - case MGA_CARD_TYPE_G400: - case MGA_CARD_TYPE_G550: - MGA_WRITE(MGA_WIADDR2, MGA_WMODE_SUSPEND); - MGA_WRITE(MGA_WGETMSB, 0x00000E00); - MGA_WRITE(MGA_WVRTXSZ, 0x00001807); - MGA_WRITE(MGA_WACCEPTSEQ, 0x18000000); - break; - case MGA_CARD_TYPE_G200: - MGA_WRITE(MGA_WIADDR, MGA_WMODE_SUSPEND); - MGA_WRITE(MGA_WGETMSB, 0x1606); - MGA_WRITE(MGA_WVRTXSZ, 7); - break; - default: - return -EINVAL; - } - - MGA_WRITE(MGA_WMISC, (MGA_WUCODECACHE_ENABLE | - MGA_WMASTER_ENABLE | MGA_WCACHEFLUSH_ENABLE)); - wmisc = MGA_READ(MGA_WMISC); - if (wmisc != WMISC_EXPECTED) { - DRM_ERROR("WARP engine config failed! 0x%x != 0x%x\n", - wmisc, WMISC_EXPECTED); - return -EINVAL; - } - - return 0; -} diff --git a/sys/dev/drm/r128_cce.c b/sys/dev/drm/r128_cce.c deleted file mode 100644 index 2bda4a58fd3a..000000000000 --- a/sys/dev/drm/r128_cce.c +++ /dev/null @@ -1,936 +0,0 @@ -/* r128_cce.c -- ATI Rage 128 driver -*- linux-c -*- - * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com - */ -/*- - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/r128_drm.h" -#include "dev/drm/r128_drv.h" - -#define R128_FIFO_DEBUG 0 - -/* CCE microcode (from ATI) */ -static u32 r128_cce_microcode[] = { - 0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0, - 1617039951, 0, 774592877, 0, 1987540286, 0, 2307490946U, 0, - 599558925, 0, 589505315, 0, 596487092, 0, 589505315, 1, - 11544576, 1, 206848, 1, 311296, 1, 198656, 2, 912273422, 11, - 262144, 0, 0, 1, 33559837, 1, 7438, 1, 14809, 1, 6615, 12, 28, - 1, 6614, 12, 28, 2, 23, 11, 18874368, 0, 16790922, 1, 409600, 9, - 30, 1, 147854772, 16, 420483072, 3, 8192, 0, 10240, 1, 198656, - 1, 15630, 1, 51200, 10, 34858, 9, 42, 1, 33559823, 2, 10276, 1, - 15717, 1, 15718, 2, 43, 1, 15936948, 1, 570480831, 1, 14715071, - 12, 322123831, 1, 33953125, 12, 55, 1, 33559908, 1, 15718, 2, - 46, 4, 2099258, 1, 526336, 1, 442623, 4, 4194365, 1, 509952, 1, - 459007, 3, 0, 12, 92, 2, 46, 12, 176, 1, 15734, 1, 206848, 1, - 18432, 1, 133120, 1, 100670734, 1, 149504, 1, 165888, 1, - 15975928, 1, 1048576, 6, 3145806, 1, 15715, 16, 2150645232U, 2, - 268449859, 2, 10307, 12, 176, 1, 15734, 1, 15735, 1, 15630, 1, - 15631, 1, 5253120, 6, 3145810, 16, 2150645232U, 1, 15864, 2, 82, - 1, 343310, 1, 1064207, 2, 3145813, 1, 15728, 1, 7817, 1, 15729, - 3, 15730, 12, 92, 2, 98, 1, 16168, 1, 16167, 1, 16002, 1, 16008, - 1, 15974, 1, 15975, 1, 15990, 1, 15976, 1, 15977, 1, 15980, 0, - 15981, 1, 10240, 1, 5253120, 1, 15720, 1, 198656, 6, 110, 1, - 180224, 1, 103824738, 2, 112, 2, 3145839, 0, 536885440, 1, - 114880, 14, 125, 12, 206975, 1, 33559995, 12, 198784, 0, - 33570236, 1, 15803, 0, 15804, 3, 294912, 1, 294912, 3, 442370, - 1, 11544576, 0, 811612160, 1, 12593152, 1, 11536384, 1, - 14024704, 7, 310382726, 0, 10240, 1, 14796, 1, 14797, 1, 14793, - 1, 14794, 0, 14795, 1, 268679168, 1, 9437184, 1, 268449792, 1, - 198656, 1, 9452827, 1, 1075854602, 1, 1075854603, 1, 557056, 1, - 114880, 14, 159, 12, 198784, 1, 1109409213, 12, 198783, 1, - 1107312059, 12, 198784, 1, 1109409212, 2, 162, 1, 1075854781, 1, - 1073757627, 1, 1075854780, 1, 540672, 1, 10485760, 6, 3145894, - 16, 274741248, 9, 168, 3, 4194304, 3, 4209949, 0, 0, 0, 256, 14, - 174, 1, 114857, 1, 33560007, 12, 176, 0, 10240, 1, 114858, 1, - 33560018, 1, 114857, 3, 33560007, 1, 16008, 1, 114874, 1, - 33560360, 1, 114875, 1, 33560154, 0, 15963, 0, 256, 0, 4096, 1, - 409611, 9, 188, 0, 10240, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 -}; - -static int R128_READ_PLL(struct drm_device * dev, int addr) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - - R128_WRITE8(R128_CLOCK_CNTL_INDEX, addr & 0x1f); - return R128_READ(R128_CLOCK_CNTL_DATA); -} - -#if R128_FIFO_DEBUG -static void r128_status(drm_r128_private_t * dev_priv) -{ - printk("GUI_STAT = 0x%08x\n", - (unsigned int)R128_READ(R128_GUI_STAT)); - printk("PM4_STAT = 0x%08x\n", - (unsigned int)R128_READ(R128_PM4_STAT)); - printk("PM4_BUFFER_DL_WPTR = 0x%08x\n", - (unsigned int)R128_READ(R128_PM4_BUFFER_DL_WPTR)); - printk("PM4_BUFFER_DL_RPTR = 0x%08x\n", - (unsigned int)R128_READ(R128_PM4_BUFFER_DL_RPTR)); - printk("PM4_MICRO_CNTL = 0x%08x\n", - (unsigned int)R128_READ(R128_PM4_MICRO_CNTL)); - printk("PM4_BUFFER_CNTL = 0x%08x\n", - (unsigned int)R128_READ(R128_PM4_BUFFER_CNTL)); -} -#endif - -/* ================================================================ - * Engine, FIFO control - */ - -static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv) -{ - u32 tmp; - int i; - - tmp = R128_READ(R128_PC_NGUI_CTLSTAT) | R128_PC_FLUSH_ALL; - R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp); - - for (i = 0; i < dev_priv->usec_timeout; i++) { - if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) { - return 0; - } - DRM_UDELAY(1); - } - -#if R128_FIFO_DEBUG - DRM_ERROR("failed!\n"); -#endif - return -EBUSY; -} - -static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries) -{ - int i; - - for (i = 0; i < dev_priv->usec_timeout; i++) { - int slots = R128_READ(R128_GUI_STAT) & R128_GUI_FIFOCNT_MASK; - if (slots >= entries) - return 0; - DRM_UDELAY(1); - } - -#if R128_FIFO_DEBUG - DRM_ERROR("failed!\n"); -#endif - return -EBUSY; -} - -static int r128_do_wait_for_idle(drm_r128_private_t * dev_priv) -{ - int i, ret; - - ret = r128_do_wait_for_fifo(dev_priv, 64); - if (ret) - return ret; - - for (i = 0; i < dev_priv->usec_timeout; i++) { - if (!(R128_READ(R128_GUI_STAT) & R128_GUI_ACTIVE)) { - r128_do_pixcache_flush(dev_priv); - return 0; - } - DRM_UDELAY(1); - } - -#if R128_FIFO_DEBUG - DRM_ERROR("failed!\n"); -#endif - return -EBUSY; -} - -/* ================================================================ - * CCE control, initialization - */ - -/* Load the microcode for the CCE */ -static void r128_cce_load_microcode(drm_r128_private_t * dev_priv) -{ - int i; - - DRM_DEBUG("\n"); - - r128_do_wait_for_idle(dev_priv); - - R128_WRITE(R128_PM4_MICROCODE_ADDR, 0); - for (i = 0; i < 256; i++) { - R128_WRITE(R128_PM4_MICROCODE_DATAH, r128_cce_microcode[i * 2]); - R128_WRITE(R128_PM4_MICROCODE_DATAL, - r128_cce_microcode[i * 2 + 1]); - } -} - -/* Flush any pending commands to the CCE. This should only be used just - * prior to a wait for idle, as it informs the engine that the command - * stream is ending. - */ -static void r128_do_cce_flush(drm_r128_private_t * dev_priv) -{ - u32 tmp; - - tmp = R128_READ(R128_PM4_BUFFER_DL_WPTR) | R128_PM4_BUFFER_DL_DONE; - R128_WRITE(R128_PM4_BUFFER_DL_WPTR, tmp); -} - -/* Wait for the CCE to go idle. - */ -int r128_do_cce_idle(drm_r128_private_t * dev_priv) -{ - int i; - - for (i = 0; i < dev_priv->usec_timeout; i++) { - if (GET_RING_HEAD(dev_priv) == dev_priv->ring.tail) { - int pm4stat = R128_READ(R128_PM4_STAT); - if (((pm4stat & R128_PM4_FIFOCNT_MASK) >= - dev_priv->cce_fifo_size) && - !(pm4stat & (R128_PM4_BUSY | - R128_PM4_GUI_ACTIVE))) { - return r128_do_pixcache_flush(dev_priv); - } - } - DRM_UDELAY(1); - } - -#if R128_FIFO_DEBUG - DRM_ERROR("failed!\n"); - r128_status(dev_priv); -#endif - return -EBUSY; -} - -/* Start the Concurrent Command Engine. - */ -static void r128_do_cce_start(drm_r128_private_t * dev_priv) -{ - r128_do_wait_for_idle(dev_priv); - - R128_WRITE(R128_PM4_BUFFER_CNTL, - dev_priv->cce_mode | dev_priv->ring.size_l2qw - | R128_PM4_BUFFER_CNTL_NOUPDATE); - R128_READ(R128_PM4_BUFFER_ADDR); /* as per the sample code */ - R128_WRITE(R128_PM4_MICRO_CNTL, R128_PM4_MICRO_FREERUN); - - dev_priv->cce_running = 1; -} - -/* Reset the Concurrent Command Engine. This will not flush any pending - * commands, so you must wait for the CCE command stream to complete - * before calling this routine. - */ -static void r128_do_cce_reset(drm_r128_private_t * dev_priv) -{ - R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0); - R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0); - dev_priv->ring.tail = 0; -} - -/* Stop the Concurrent Command Engine. This will not flush any pending - * commands, so you must flush the command stream and wait for the CCE - * to go idle before calling this routine. - */ -static void r128_do_cce_stop(drm_r128_private_t * dev_priv) -{ - R128_WRITE(R128_PM4_MICRO_CNTL, 0); - R128_WRITE(R128_PM4_BUFFER_CNTL, - R128_PM4_NONPM4 | R128_PM4_BUFFER_CNTL_NOUPDATE); - - dev_priv->cce_running = 0; -} - -/* Reset the engine. This will stop the CCE if it is running. - */ -static int r128_do_engine_reset(struct drm_device * dev) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - u32 clock_cntl_index, mclk_cntl, gen_reset_cntl; - - r128_do_pixcache_flush(dev_priv); - - clock_cntl_index = R128_READ(R128_CLOCK_CNTL_INDEX); - mclk_cntl = R128_READ_PLL(dev, R128_MCLK_CNTL); - - R128_WRITE_PLL(R128_MCLK_CNTL, - mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CP); - - gen_reset_cntl = R128_READ(R128_GEN_RESET_CNTL); - - /* Taken from the sample code - do not change */ - R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl | R128_SOFT_RESET_GUI); - R128_READ(R128_GEN_RESET_CNTL); - R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl & ~R128_SOFT_RESET_GUI); - R128_READ(R128_GEN_RESET_CNTL); - - R128_WRITE_PLL(R128_MCLK_CNTL, mclk_cntl); - R128_WRITE(R128_CLOCK_CNTL_INDEX, clock_cntl_index); - R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl); - - /* Reset the CCE ring */ - r128_do_cce_reset(dev_priv); - - /* The CCE is no longer running after an engine reset */ - dev_priv->cce_running = 0; - - /* Reset any pending vertex, indirect buffers */ - r128_freelist_reset(dev); - - return 0; -} - -static void r128_cce_init_ring_buffer(struct drm_device * dev, - drm_r128_private_t * dev_priv) -{ - u32 ring_start; - u32 tmp; - - DRM_DEBUG("\n"); - - /* The manual (p. 2) says this address is in "VM space". This - * means it's an offset from the start of AGP space. - */ -#if __OS_HAS_AGP - if (!dev_priv->is_pci) - ring_start = dev_priv->cce_ring->offset - dev->agp->base; - else -#endif - ring_start = dev_priv->cce_ring->offset - dev->sg->vaddr; - - R128_WRITE(R128_PM4_BUFFER_OFFSET, ring_start | R128_AGP_OFFSET); - - R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0); - R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0); - - /* Set watermark control */ - R128_WRITE(R128_PM4_BUFFER_WM_CNTL, - ((R128_WATERMARK_L / 4) << R128_WMA_SHIFT) - | ((R128_WATERMARK_M / 4) << R128_WMB_SHIFT) - | ((R128_WATERMARK_N / 4) << R128_WMC_SHIFT) - | ((R128_WATERMARK_K / 64) << R128_WB_WM_SHIFT)); - - /* Force read. Why? Because it's in the examples... */ - R128_READ(R128_PM4_BUFFER_ADDR); - - /* Turn on bus mastering */ - tmp = R128_READ(R128_BUS_CNTL) & ~R128_BUS_MASTER_DIS; - R128_WRITE(R128_BUS_CNTL, tmp); -} - -static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init) -{ - drm_r128_private_t *dev_priv; - - DRM_DEBUG("\n"); - - dev_priv = drm_alloc(sizeof(drm_r128_private_t), DRM_MEM_DRIVER); - if (dev_priv == NULL) - return -ENOMEM; - - memset(dev_priv, 0, sizeof(drm_r128_private_t)); - - dev_priv->is_pci = init->is_pci; - - if (dev_priv->is_pci && !dev->sg) { - DRM_ERROR("PCI GART memory not allocated!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -EINVAL; - } - - dev_priv->usec_timeout = init->usec_timeout; - if (dev_priv->usec_timeout < 1 || - dev_priv->usec_timeout > R128_MAX_USEC_TIMEOUT) { - DRM_DEBUG("TIMEOUT problem!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -EINVAL; - } - - dev_priv->cce_mode = init->cce_mode; - - /* GH: Simple idle check. - */ - atomic_set(&dev_priv->idle_count, 0); - - /* We don't support anything other than bus-mastering ring mode, - * but the ring can be in either AGP or PCI space for the ring - * read pointer. - */ - if ((init->cce_mode != R128_PM4_192BM) && - (init->cce_mode != R128_PM4_128BM_64INDBM) && - (init->cce_mode != R128_PM4_64BM_128INDBM) && - (init->cce_mode != R128_PM4_64BM_64VCBM_64INDBM)) { - DRM_DEBUG("Bad cce_mode!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -EINVAL; - } - - switch (init->cce_mode) { - case R128_PM4_NONPM4: - dev_priv->cce_fifo_size = 0; - break; - case R128_PM4_192PIO: - case R128_PM4_192BM: - dev_priv->cce_fifo_size = 192; - break; - case R128_PM4_128PIO_64INDBM: - case R128_PM4_128BM_64INDBM: - dev_priv->cce_fifo_size = 128; - break; - case R128_PM4_64PIO_128INDBM: - case R128_PM4_64BM_128INDBM: - case R128_PM4_64PIO_64VCBM_64INDBM: - case R128_PM4_64BM_64VCBM_64INDBM: - case R128_PM4_64PIO_64VCPIO_64INDPIO: - dev_priv->cce_fifo_size = 64; - break; - } - - switch (init->fb_bpp) { - case 16: - dev_priv->color_fmt = R128_DATATYPE_RGB565; - break; - case 32: - default: - dev_priv->color_fmt = R128_DATATYPE_ARGB8888; - break; - } - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - - switch (init->depth_bpp) { - case 16: - dev_priv->depth_fmt = R128_DATATYPE_RGB565; - break; - case 24: - case 32: - default: - dev_priv->depth_fmt = R128_DATATYPE_ARGB8888; - break; - } - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - dev_priv->span_offset = init->span_offset; - - dev_priv->front_pitch_offset_c = (((dev_priv->front_pitch / 8) << 21) | - (dev_priv->front_offset >> 5)); - dev_priv->back_pitch_offset_c = (((dev_priv->back_pitch / 8) << 21) | - (dev_priv->back_offset >> 5)); - dev_priv->depth_pitch_offset_c = (((dev_priv->depth_pitch / 8) << 21) | - (dev_priv->depth_offset >> 5) | - R128_DST_TILE); - dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch / 8) << 21) | - (dev_priv->span_offset >> 5)); - - dev_priv->sarea = drm_getsarea(dev); - if (!dev_priv->sarea) { - DRM_ERROR("could not find sarea!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -EINVAL; - } - - dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset); - if (!dev_priv->mmio) { - DRM_ERROR("could not find mmio region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -EINVAL; - } - dev_priv->cce_ring = drm_core_findmap(dev, init->ring_offset); - if (!dev_priv->cce_ring) { - DRM_ERROR("could not find cce ring region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -EINVAL; - } - dev_priv->ring_rptr = drm_core_findmap(dev, init->ring_rptr_offset); - if (!dev_priv->ring_rptr) { - DRM_ERROR("could not find ring read pointer!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -EINVAL; - } - dev->agp_buffer_token = init->buffers_offset; - dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); - if (!dev->agp_buffer_map) { - DRM_ERROR("could not find dma buffer region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -EINVAL; - } - - if (!dev_priv->is_pci) { - dev_priv->agp_textures = - drm_core_findmap(dev, init->agp_textures_offset); - if (!dev_priv->agp_textures) { - DRM_ERROR("could not find agp texture region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -EINVAL; - } - } - - dev_priv->sarea_priv = - (drm_r128_sarea_t *) ((u8 *) dev_priv->sarea->virtual + - init->sarea_priv_offset); - -#if __OS_HAS_AGP - if (!dev_priv->is_pci) { - drm_core_ioremap(dev_priv->cce_ring, dev); - drm_core_ioremap(dev_priv->ring_rptr, dev); - drm_core_ioremap(dev->agp_buffer_map, dev); - if (!dev_priv->cce_ring->virtual || - !dev_priv->ring_rptr->virtual || - !dev->agp_buffer_map->virtual) { - DRM_ERROR("Could not ioremap agp regions!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -ENOMEM; - } - } else -#endif - { - dev_priv->cce_ring->virtual = - (void *)dev_priv->cce_ring->offset; - dev_priv->ring_rptr->virtual = - (void *)dev_priv->ring_rptr->offset; - dev->agp_buffer_map->virtual = - (void *)dev->agp_buffer_map->offset; - } - -#if __OS_HAS_AGP - if (!dev_priv->is_pci) - dev_priv->cce_buffers_offset = dev->agp->base; - else -#endif - dev_priv->cce_buffers_offset = dev->sg->vaddr; - - dev_priv->ring.start = (u32 *) dev_priv->cce_ring->virtual; - dev_priv->ring.end = ((u32 *) dev_priv->cce_ring->virtual - + init->ring_size / sizeof(u32)); - dev_priv->ring.size = init->ring_size; - dev_priv->ring.size_l2qw = drm_order(init->ring_size / 8); - - dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1; - - dev_priv->ring.high_mark = 128; - - dev_priv->sarea_priv->last_frame = 0; - R128_WRITE(R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame); - - dev_priv->sarea_priv->last_dispatch = 0; - R128_WRITE(R128_LAST_DISPATCH_REG, dev_priv->sarea_priv->last_dispatch); - -#if __OS_HAS_AGP - if (dev_priv->is_pci) { -#endif - dev_priv->gart_info.table_mask = DMA_BIT_MASK(32); - dev_priv->gart_info.gart_table_location = DRM_ATI_GART_MAIN; - dev_priv->gart_info.table_size = R128_PCIGART_TABLE_SIZE; - dev_priv->gart_info.addr = NULL; - dev_priv->gart_info.bus_addr = 0; - dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_PCI; - if (!drm_ati_pcigart_init(dev, &dev_priv->gart_info)) { - DRM_ERROR("failed to init PCI GART!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce(dev); - return -ENOMEM; - } - R128_WRITE(R128_PCI_GART_PAGE, dev_priv->gart_info.bus_addr); -#if __OS_HAS_AGP - } -#endif - - r128_cce_init_ring_buffer(dev, dev_priv); - r128_cce_load_microcode(dev_priv); - - dev->dev_private = (void *)dev_priv; - - r128_do_engine_reset(dev); - - return 0; -} - -int r128_do_cleanup_cce(struct drm_device * dev) -{ - - /* Make sure interrupts are disabled here because the uninstall ioctl - * may not have been called from userspace and after dev_private - * is freed, it's too late. - */ - if (dev->irq_enabled) - drm_irq_uninstall(dev); - - if (dev->dev_private) { - drm_r128_private_t *dev_priv = dev->dev_private; - -#if __OS_HAS_AGP - if (!dev_priv->is_pci) { - if (dev_priv->cce_ring != NULL) - drm_core_ioremapfree(dev_priv->cce_ring, dev); - if (dev_priv->ring_rptr != NULL) - drm_core_ioremapfree(dev_priv->ring_rptr, dev); - if (dev->agp_buffer_map != NULL) { - drm_core_ioremapfree(dev->agp_buffer_map, dev); - dev->agp_buffer_map = NULL; - } - } else -#endif - { - if (dev_priv->gart_info.bus_addr) - if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info)) - DRM_ERROR("failed to cleanup PCI GART!\n"); - } - - drm_free(dev->dev_private, sizeof(drm_r128_private_t), - DRM_MEM_DRIVER); - dev->dev_private = NULL; - } - - return 0; -} - -int r128_cce_init(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_init_t *init = data; - - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - switch (init->func) { - case R128_INIT_CCE: - return r128_do_init_cce(dev, init); - case R128_CLEANUP_CCE: - return r128_do_cleanup_cce(dev); - } - - return -EINVAL; -} - -int r128_cce_start(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4) { - DRM_DEBUG("while CCE running\n"); - return 0; - } - - r128_do_cce_start(dev_priv); - - return 0; -} - -/* Stop the CCE. The engine must have been idled before calling this - * routine. - */ -int r128_cce_stop(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_cce_stop_t *stop = data; - int ret; - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - /* Flush any pending CCE commands. This ensures any outstanding - * commands are exectuted by the engine before we turn it off. - */ - if (stop->flush) { - r128_do_cce_flush(dev_priv); - } - - /* If we fail to make the engine go idle, we return an error - * code so that the DRM ioctl wrapper can try again. - */ - if (stop->idle) { - ret = r128_do_cce_idle(dev_priv); - if (ret) - return ret; - } - - /* Finally, we can turn off the CCE. If the engine isn't idle, - * we will get some dropped triangles as they won't be fully - * rendered before the CCE is shut down. - */ - r128_do_cce_stop(dev_priv); - - /* Reset the engine */ - r128_do_engine_reset(dev); - - return 0; -} - -/* Just reset the CCE ring. Called as part of an X Server engine reset. - */ -int r128_cce_reset(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (!dev_priv) { - DRM_DEBUG("called before init done\n"); - return -EINVAL; - } - - r128_do_cce_reset(dev_priv); - - /* The CCE is no longer running after an engine reset */ - dev_priv->cce_running = 0; - - return 0; -} - -int r128_cce_idle(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (dev_priv->cce_running) { - r128_do_cce_flush(dev_priv); - } - - return r128_do_cce_idle(dev_priv); -} - -int r128_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - return r128_do_engine_reset(dev); -} - -int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - return -EINVAL; -} - -/* ================================================================ - * Freelist management - */ -#define R128_BUFFER_USED 0xffffffff -#define R128_BUFFER_FREE 0 - -#if 0 -static int r128_freelist_init(struct drm_device * dev) -{ - struct drm_device_dma *dma = dev->dma; - drm_r128_private_t *dev_priv = dev->dev_private; - struct drm_buf *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_freelist_t *entry; - int i; - - dev_priv->head = drm_alloc(sizeof(drm_r128_freelist_t), DRM_MEM_DRIVER); - if (dev_priv->head == NULL) - return -ENOMEM; - - memset(dev_priv->head, 0, sizeof(drm_r128_freelist_t)); - dev_priv->head->age = R128_BUFFER_USED; - - for (i = 0; i < dma->buf_count; i++) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - - entry = drm_alloc(sizeof(drm_r128_freelist_t), DRM_MEM_DRIVER); - if (!entry) - return -ENOMEM; - - entry->age = R128_BUFFER_FREE; - entry->buf = buf; - entry->prev = dev_priv->head; - entry->next = dev_priv->head->next; - if (!entry->next) - dev_priv->tail = entry; - - buf_priv->discard = 0; - buf_priv->dispatched = 0; - buf_priv->list_entry = entry; - - dev_priv->head->next = entry; - - if (dev_priv->head->next) - dev_priv->head->next->prev = entry; - } - - return 0; - -} -#endif - -static struct drm_buf *r128_freelist_get(struct drm_device * dev) -{ - struct drm_device_dma *dma = dev->dma; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv; - struct drm_buf *buf; - int i, t; - - /* FIXME: Optimize -- use freelist code */ - - for (i = 0; i < dma->buf_count; i++) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if (buf->file_priv == 0) - return buf; - } - - for (t = 0; t < dev_priv->usec_timeout; t++) { - u32 done_age = R128_READ(R128_LAST_DISPATCH_REG); - - for (i = 0; i < dma->buf_count; i++) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if (buf->pending && buf_priv->age <= done_age) { - /* The buffer has been processed, so it - * can now be used. - */ - buf->pending = 0; - return buf; - } - } - DRM_UDELAY(1); - } - - DRM_DEBUG("returning NULL!\n"); - return NULL; -} - -void r128_freelist_reset(struct drm_device * dev) -{ - struct drm_device_dma *dma = dev->dma; - int i; - - for (i = 0; i < dma->buf_count; i++) { - struct drm_buf *buf = dma->buflist[i]; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - buf_priv->age = 0; - } -} - -/* ================================================================ - * CCE command submission - */ - -int r128_wait_ring(drm_r128_private_t * dev_priv, int n) -{ - drm_r128_ring_buffer_t *ring = &dev_priv->ring; - int i; - - for (i = 0; i < dev_priv->usec_timeout; i++) { - r128_update_ring_snapshot(dev_priv); - if (ring->space >= n) - return 0; - DRM_UDELAY(1); - } - - /* FIXME: This is being ignored... */ - DRM_ERROR("failed!\n"); - return -EBUSY; -} - -static int r128_cce_get_buffers(struct drm_device * dev, - struct drm_file *file_priv, - struct drm_dma * d) -{ - int i; - struct drm_buf *buf; - - for (i = d->granted_count; i < d->request_count; i++) { - buf = r128_freelist_get(dev); - if (!buf) - return -EAGAIN; - - buf->file_priv = file_priv; - - if (DRM_COPY_TO_USER(&d->request_indices[i], &buf->idx, - sizeof(buf->idx))) - return -EFAULT; - if (DRM_COPY_TO_USER(&d->request_sizes[i], &buf->total, - sizeof(buf->total))) - return -EFAULT; - - d->granted_count++; - } - return 0; -} - -int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_device_dma *dma = dev->dma; - int ret = 0; - struct drm_dma *d = data; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - /* Please don't send us buffers. - */ - if (d->send_count != 0) { - DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n", - DRM_CURRENTPID, d->send_count); - return -EINVAL; - } - - /* We'll send you buffers. - */ - if (d->request_count < 0 || d->request_count > dma->buf_count) { - DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n", - DRM_CURRENTPID, d->request_count, dma->buf_count); - return -EINVAL; - } - - d->granted_count = 0; - - if (d->request_count) { - ret = r128_cce_get_buffers(dev, file_priv, d); - } - - return ret; -} diff --git a/sys/dev/drm/r128_drm.h b/sys/dev/drm/r128_drm.h deleted file mode 100644 index 3afbefa4d711..000000000000 --- a/sys/dev/drm/r128_drm.h +++ /dev/null @@ -1,329 +0,0 @@ -/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*- - * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com - */ -/*- - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Kevin E. Martin <martin@valinux.com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __R128_DRM_H__ -#define __R128_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the X server file (r128_sarea.h) - */ -#ifndef __R128_SAREA_DEFINES__ -#define __R128_SAREA_DEFINES__ - -/* What needs to be changed for the current vertex buffer? - */ -#define R128_UPLOAD_CONTEXT 0x001 -#define R128_UPLOAD_SETUP 0x002 -#define R128_UPLOAD_TEX0 0x004 -#define R128_UPLOAD_TEX1 0x008 -#define R128_UPLOAD_TEX0IMAGES 0x010 -#define R128_UPLOAD_TEX1IMAGES 0x020 -#define R128_UPLOAD_CORE 0x040 -#define R128_UPLOAD_MASKS 0x080 -#define R128_UPLOAD_WINDOW 0x100 -#define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */ -#define R128_REQUIRE_QUIESCENCE 0x400 -#define R128_UPLOAD_ALL 0x7ff - -#define R128_FRONT 0x1 -#define R128_BACK 0x2 -#define R128_DEPTH 0x4 - -/* Primitive types - */ -#define R128_POINTS 0x1 -#define R128_LINES 0x2 -#define R128_LINE_STRIP 0x3 -#define R128_TRIANGLES 0x4 -#define R128_TRIANGLE_FAN 0x5 -#define R128_TRIANGLE_STRIP 0x6 - -/* Vertex/indirect buffer size - */ -#define R128_BUFFER_SIZE 16384 - -/* Byte offsets for indirect buffer data - */ -#define R128_INDEX_PRIM_OFFSET 20 -#define R128_HOSTDATA_BLIT_OFFSET 32 - -/* Keep these small for testing. - */ -#define R128_NR_SAREA_CLIPRECTS 12 - -/* There are 2 heaps (local/AGP). Each region within a heap is a - * minimum of 64k, and there are at most 64 of them per heap. - */ -#define R128_LOCAL_TEX_HEAP 0 -#define R128_AGP_TEX_HEAP 1 -#define R128_NR_TEX_HEAPS 2 -#define R128_NR_TEX_REGIONS 64 -#define R128_LOG_TEX_GRANULARITY 16 - -#define R128_NR_CONTEXT_REGS 12 - -#define R128_MAX_TEXTURE_LEVELS 11 -#define R128_MAX_TEXTURE_UNITS 2 - -#endif /* __R128_SAREA_DEFINES__ */ - -typedef struct { - /* Context state - can be written in one large chunk */ - unsigned int dst_pitch_offset_c; - unsigned int dp_gui_master_cntl_c; - unsigned int sc_top_left_c; - unsigned int sc_bottom_right_c; - unsigned int z_offset_c; - unsigned int z_pitch_c; - unsigned int z_sten_cntl_c; - unsigned int tex_cntl_c; - unsigned int misc_3d_state_cntl_reg; - unsigned int texture_clr_cmp_clr_c; - unsigned int texture_clr_cmp_msk_c; - unsigned int fog_color_c; - - /* Texture state */ - unsigned int tex_size_pitch_c; - unsigned int constant_color_c; - - /* Setup state */ - unsigned int pm4_vc_fpu_setup; - unsigned int setup_cntl; - - /* Mask state */ - unsigned int dp_write_mask; - unsigned int sten_ref_mask_c; - unsigned int plane_3d_mask_c; - - /* Window state */ - unsigned int window_xy_offset; - - /* Core state */ - unsigned int scale_3d_cntl; -} drm_r128_context_regs_t; - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int tex_cntl; - unsigned int tex_combine_cntl; - unsigned int tex_size_pitch; - unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS]; - unsigned int tex_border_color; -} drm_r128_texture_regs_t; - -typedef struct drm_r128_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex buffer. - */ - drm_r128_context_regs_t context_state; - drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS]; - unsigned int dirty; - unsigned int vertsize; - unsigned int vc_format; - - /* The current cliprects, or a subset thereof. - */ - struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Counters for client-side throttling of rendering clients. - */ - unsigned int last_frame; - unsigned int last_dispatch; - - struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1]; - unsigned int tex_age[R128_NR_TEX_HEAPS]; - int ctx_owner; - int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */ - int pfCurrentPage; /* which buffer is being displayed? */ -} drm_r128_sarea_t; - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmR128.h) - */ - -/* Rage 128 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_R128_INIT 0x00 -#define DRM_R128_CCE_START 0x01 -#define DRM_R128_CCE_STOP 0x02 -#define DRM_R128_CCE_RESET 0x03 -#define DRM_R128_CCE_IDLE 0x04 -/* 0x05 not used */ -#define DRM_R128_RESET 0x06 -#define DRM_R128_SWAP 0x07 -#define DRM_R128_CLEAR 0x08 -#define DRM_R128_VERTEX 0x09 -#define DRM_R128_INDICES 0x0a -#define DRM_R128_BLIT 0x0b -#define DRM_R128_DEPTH 0x0c -#define DRM_R128_STIPPLE 0x0d -/* 0x0e not used */ -#define DRM_R128_INDIRECT 0x0f -#define DRM_R128_FULLSCREEN 0x10 -#define DRM_R128_CLEAR2 0x11 -#define DRM_R128_GETPARAM 0x12 -#define DRM_R128_FLIP 0x13 - -#define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t) -#define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START) -#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t) -#define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET) -#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE) -/* 0x05 not used */ -#define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET) -#define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP) -#define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t) -#define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t) -#define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t) -#define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t) -#define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t) -#define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t) -/* 0x0e not used */ -#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t) -#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t) -#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t) -#define DRM_IOCTL_R128_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t) -#define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP) - -typedef struct drm_r128_init { - enum { - R128_INIT_CCE = 0x01, - R128_CLEANUP_CCE = 0x02 - } func; - unsigned long sarea_priv_offset; - int is_pci; - int cce_mode; - int cce_secure; - int ring_size; - int usec_timeout; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - unsigned int span_offset; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long ring_offset; - unsigned long ring_rptr_offset; - unsigned long buffers_offset; - unsigned long agp_textures_offset; -} drm_r128_init_t; - -typedef struct drm_r128_cce_stop { - int flush; - int idle; -} drm_r128_cce_stop_t; - -typedef struct drm_r128_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; -} drm_r128_clear_t; - -typedef struct drm_r128_vertex { - int prim; - int idx; /* Index of vertex buffer */ - int count; /* Number of vertices in buffer */ - int discard; /* Client finished with buffer? */ -} drm_r128_vertex_t; - -typedef struct drm_r128_indices { - int prim; - int idx; - int start; - int end; - int discard; /* Client finished with buffer? */ -} drm_r128_indices_t; - -typedef struct drm_r128_blit { - int idx; - int pitch; - int offset; - int format; - unsigned short x, y; - unsigned short width, height; -} drm_r128_blit_t; - -typedef struct drm_r128_depth { - enum { - R128_WRITE_SPAN = 0x01, - R128_WRITE_PIXELS = 0x02, - R128_READ_SPAN = 0x03, - R128_READ_PIXELS = 0x04 - } func; - int n; - int __user *x; - int __user *y; - unsigned int __user *buffer; - unsigned char __user *mask; -} drm_r128_depth_t; - -typedef struct drm_r128_stipple { - unsigned int __user *mask; -} drm_r128_stipple_t; - -typedef struct drm_r128_indirect { - int idx; - int start; - int end; - int discard; -} drm_r128_indirect_t; - -typedef struct drm_r128_fullscreen { - enum { - R128_INIT_FULLSCREEN = 0x01, - R128_CLEANUP_FULLSCREEN = 0x02 - } func; -} drm_r128_fullscreen_t; - -/* 2.3: An ioctl to get parameters that aren't available to the 3d - * client any other way. - */ -#define R128_PARAM_IRQ_NR 1 - -typedef struct drm_r128_getparam { - int param; - void __user *value; -} drm_r128_getparam_t; - -#endif diff --git a/sys/dev/drm/r128_drv.c b/sys/dev/drm/r128_drv.c deleted file mode 100644 index a112aebe2410..000000000000 --- a/sys/dev/drm/r128_drv.c +++ /dev/null @@ -1,132 +0,0 @@ -/* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*- - * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com - */ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/r128_drm.h" -#include "dev/drm/r128_drv.h" -#include "dev/drm/drm_pciids.h" - -/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */ -static drm_pci_id_list_t r128_pciidlist[] = { - r128_PCI_IDS -}; - -static void r128_configure(struct drm_device *dev) -{ - dev->driver->driver_features = - DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | - DRIVER_SG | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ; - - dev->driver->buf_priv_size = sizeof(drm_r128_buf_priv_t); - dev->driver->load = r128_driver_load; - dev->driver->preclose = r128_driver_preclose; - dev->driver->lastclose = r128_driver_lastclose; - dev->driver->get_vblank_counter = r128_get_vblank_counter; - dev->driver->enable_vblank = r128_enable_vblank; - dev->driver->disable_vblank = r128_disable_vblank; - dev->driver->irq_preinstall = r128_driver_irq_preinstall; - dev->driver->irq_postinstall = r128_driver_irq_postinstall; - dev->driver->irq_uninstall = r128_driver_irq_uninstall; - dev->driver->irq_handler = r128_driver_irq_handler; - dev->driver->dma_ioctl = r128_cce_buffers; - - dev->driver->ioctls = r128_ioctls; - dev->driver->max_ioctl = r128_max_ioctl; - - dev->driver->name = DRIVER_NAME; - dev->driver->desc = DRIVER_DESC; - dev->driver->date = DRIVER_DATE; - dev->driver->major = DRIVER_MAJOR; - dev->driver->minor = DRIVER_MINOR; - dev->driver->patchlevel = DRIVER_PATCHLEVEL; -} - -static int -r128_probe(device_t kdev) -{ - return drm_probe(kdev, r128_pciidlist); -} - -static int -r128_attach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - - dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER, - M_WAITOK | M_ZERO); - - r128_configure(dev); - - return drm_attach(kdev, r128_pciidlist); -} - -int r128_driver_load(struct drm_device * dev, unsigned long flags) -{ - return drm_vblank_init(dev, 1); -} - -static int -r128_detach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - int ret; - - ret = drm_detach(kdev); - - free(dev->driver, DRM_MEM_DRIVER); - - return ret; -} - -static device_method_t r128_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, r128_probe), - DEVMETHOD(device_attach, r128_attach), - DEVMETHOD(device_detach, r128_detach), - - { 0, 0 } -}; - -static driver_t r128_driver = { - "drm", - r128_methods, - sizeof(struct drm_device) -}; - -extern devclass_t drm_devclass; -DRIVER_MODULE(r128, vgapci, r128_driver, drm_devclass, 0, 0); -MODULE_DEPEND(r128, drm, 1, 1, 1); diff --git a/sys/dev/drm/r128_drv.h b/sys/dev/drm/r128_drv.h deleted file mode 100644 index 7ad34967fc45..000000000000 --- a/sys/dev/drm/r128_drv.h +++ /dev/null @@ -1,529 +0,0 @@ -/* r128_drv.h -- Private header for r128 driver -*- linux-c -*- - * Created: Mon Dec 13 09:51:11 1999 by faith@precisioninsight.com - */ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * Michel D�zer <daenzerm@student.ethz.ch> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __R128_DRV_H__ -#define __R128_DRV_H__ - -/* General customization: - */ -#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." - -#define DRIVER_NAME "r128" -#define DRIVER_DESC "ATI Rage 128" -#define DRIVER_DATE "20030725" - -/* Interface history: - * - * ?? - ?? - * 2.4 - Add support for ycbcr textures (no new ioctls) - * 2.5 - Add FLIP ioctl, disable FULLSCREEN. - */ -#define DRIVER_MAJOR 2 -#define DRIVER_MINOR 5 -#define DRIVER_PATCHLEVEL 0 - -#define GET_RING_HEAD(dev_priv) R128_READ( R128_PM4_BUFFER_DL_RPTR ) - -typedef struct drm_r128_freelist { - unsigned int age; - struct drm_buf *buf; - struct drm_r128_freelist *next; - struct drm_r128_freelist *prev; -} drm_r128_freelist_t; - -typedef struct drm_r128_ring_buffer { - u32 *start; - u32 *end; - int size; - int size_l2qw; - - u32 tail; - u32 tail_mask; - int space; - - int high_mark; -} drm_r128_ring_buffer_t; - -typedef struct drm_r128_private { - drm_r128_ring_buffer_t ring; - drm_r128_sarea_t *sarea_priv; - - int cce_mode; - int cce_fifo_size; - int cce_running; - - drm_r128_freelist_t *head; - drm_r128_freelist_t *tail; - - int usec_timeout; - int is_pci; - unsigned long cce_buffers_offset; - - atomic_t idle_count; - - int page_flipping; - int current_page; - u32 crtc_offset; - u32 crtc_offset_cntl; - - atomic_t vbl_received; - - u32 color_fmt; - unsigned int front_offset; - unsigned int front_pitch; - unsigned int back_offset; - unsigned int back_pitch; - - u32 depth_fmt; - unsigned int depth_offset; - unsigned int depth_pitch; - unsigned int span_offset; - - u32 front_pitch_offset_c; - u32 back_pitch_offset_c; - u32 depth_pitch_offset_c; - u32 span_pitch_offset_c; - - drm_local_map_t *sarea; - drm_local_map_t *mmio; - drm_local_map_t *cce_ring; - drm_local_map_t *ring_rptr; - drm_local_map_t *agp_textures; - struct drm_ati_pcigart_info gart_info; -} drm_r128_private_t; - -typedef struct drm_r128_buf_priv { - u32 age; - int prim; - int discard; - int dispatched; - drm_r128_freelist_t *list_entry; -} drm_r128_buf_priv_t; - -extern struct drm_ioctl_desc r128_ioctls[]; -extern int r128_max_ioctl; - - /* r128_cce.c */ -extern int r128_cce_init(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int r128_cce_start(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int r128_cce_stop(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int r128_cce_reset(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int r128_cce_idle(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int r128_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv); - -extern void r128_freelist_reset(struct drm_device * dev); - -extern int r128_wait_ring(drm_r128_private_t * dev_priv, int n); - -extern int r128_do_cce_idle(drm_r128_private_t * dev_priv); -extern int r128_do_cleanup_cce(struct drm_device * dev); - -extern int r128_enable_vblank(struct drm_device *dev, int crtc); -extern void r128_disable_vblank(struct drm_device *dev, int crtc); -extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc); -extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS); -extern void r128_driver_irq_preinstall(struct drm_device * dev); -extern int r128_driver_irq_postinstall(struct drm_device * dev); -extern void r128_driver_irq_uninstall(struct drm_device * dev); -extern void r128_driver_lastclose(struct drm_device * dev); -extern int r128_driver_load(struct drm_device * dev, unsigned long flags); -extern void r128_driver_preclose(struct drm_device * dev, - struct drm_file *file_priv); - -extern long r128_compat_ioctl(struct file *filp, unsigned int cmd, - unsigned long arg); - -/* Register definitions, register access macros and drmAddMap constants - * for Rage 128 kernel driver. - */ - -#define R128_AUX_SC_CNTL 0x1660 -# define R128_AUX1_SC_EN (1 << 0) -# define R128_AUX1_SC_MODE_OR (0 << 1) -# define R128_AUX1_SC_MODE_NAND (1 << 1) -# define R128_AUX2_SC_EN (1 << 2) -# define R128_AUX2_SC_MODE_OR (0 << 3) -# define R128_AUX2_SC_MODE_NAND (1 << 3) -# define R128_AUX3_SC_EN (1 << 4) -# define R128_AUX3_SC_MODE_OR (0 << 5) -# define R128_AUX3_SC_MODE_NAND (1 << 5) -#define R128_AUX1_SC_LEFT 0x1664 -#define R128_AUX1_SC_RIGHT 0x1668 -#define R128_AUX1_SC_TOP 0x166c -#define R128_AUX1_SC_BOTTOM 0x1670 -#define R128_AUX2_SC_LEFT 0x1674 -#define R128_AUX2_SC_RIGHT 0x1678 -#define R128_AUX2_SC_TOP 0x167c -#define R128_AUX2_SC_BOTTOM 0x1680 -#define R128_AUX3_SC_LEFT 0x1684 -#define R128_AUX3_SC_RIGHT 0x1688 -#define R128_AUX3_SC_TOP 0x168c -#define R128_AUX3_SC_BOTTOM 0x1690 - -#define R128_BRUSH_DATA0 0x1480 -#define R128_BUS_CNTL 0x0030 -# define R128_BUS_MASTER_DIS (1 << 6) - -#define R128_CLOCK_CNTL_INDEX 0x0008 -#define R128_CLOCK_CNTL_DATA 0x000c -# define R128_PLL_WR_EN (1 << 7) -#define R128_CONSTANT_COLOR_C 0x1d34 -#define R128_CRTC_OFFSET 0x0224 -#define R128_CRTC_OFFSET_CNTL 0x0228 -# define R128_CRTC_OFFSET_FLIP_CNTL (1 << 16) - -#define R128_DP_GUI_MASTER_CNTL 0x146c -# define R128_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) -# define R128_GMC_DST_PITCH_OFFSET_CNTL (1 << 1) -# define R128_GMC_BRUSH_SOLID_COLOR (13 << 4) -# define R128_GMC_BRUSH_NONE (15 << 4) -# define R128_GMC_DST_16BPP (4 << 8) -# define R128_GMC_DST_24BPP (5 << 8) -# define R128_GMC_DST_32BPP (6 << 8) -# define R128_GMC_DST_DATATYPE_SHIFT 8 -# define R128_GMC_SRC_DATATYPE_COLOR (3 << 12) -# define R128_DP_SRC_SOURCE_MEMORY (2 << 24) -# define R128_DP_SRC_SOURCE_HOST_DATA (3 << 24) -# define R128_GMC_CLR_CMP_CNTL_DIS (1 << 28) -# define R128_GMC_AUX_CLIP_DIS (1 << 29) -# define R128_GMC_WR_MSK_DIS (1 << 30) -# define R128_ROP3_S 0x00cc0000 -# define R128_ROP3_P 0x00f00000 -#define R128_DP_WRITE_MASK 0x16cc -#define R128_DST_PITCH_OFFSET_C 0x1c80 -# define R128_DST_TILE (1U << 31) - -#define R128_GEN_INT_CNTL 0x0040 -# define R128_CRTC_VBLANK_INT_EN (1 << 0) -#define R128_GEN_INT_STATUS 0x0044 -# define R128_CRTC_VBLANK_INT (1 << 0) -# define R128_CRTC_VBLANK_INT_AK (1 << 0) -#define R128_GEN_RESET_CNTL 0x00f0 -# define R128_SOFT_RESET_GUI (1 << 0) - -#define R128_GUI_SCRATCH_REG0 0x15e0 -#define R128_GUI_SCRATCH_REG1 0x15e4 -#define R128_GUI_SCRATCH_REG2 0x15e8 -#define R128_GUI_SCRATCH_REG3 0x15ec -#define R128_GUI_SCRATCH_REG4 0x15f0 -#define R128_GUI_SCRATCH_REG5 0x15f4 - -#define R128_GUI_STAT 0x1740 -# define R128_GUI_FIFOCNT_MASK 0x0fff -# define R128_GUI_ACTIVE (1U << 31) - -#define R128_MCLK_CNTL 0x000f -# define R128_FORCE_GCP (1 << 16) -# define R128_FORCE_PIPE3D_CP (1 << 17) -# define R128_FORCE_RCP (1 << 18) - -#define R128_PC_GUI_CTLSTAT 0x1748 -#define R128_PC_NGUI_CTLSTAT 0x0184 -# define R128_PC_FLUSH_GUI (3 << 0) -# define R128_PC_RI_GUI (1 << 2) -# define R128_PC_FLUSH_ALL 0x00ff -# define R128_PC_BUSY (1U << 31) - -#define R128_PCI_GART_PAGE 0x017c -#define R128_PRIM_TEX_CNTL_C 0x1cb0 - -#define R128_SCALE_3D_CNTL 0x1a00 -#define R128_SEC_TEX_CNTL_C 0x1d00 -#define R128_SEC_TEXTURE_BORDER_COLOR_C 0x1d3c -#define R128_SETUP_CNTL 0x1bc4 -#define R128_STEN_REF_MASK_C 0x1d40 - -#define R128_TEX_CNTL_C 0x1c9c -# define R128_TEX_CACHE_FLUSH (1 << 23) - -#define R128_WAIT_UNTIL 0x1720 -# define R128_EVENT_CRTC_OFFSET (1 << 0) -#define R128_WINDOW_XY_OFFSET 0x1bcc - -/* CCE registers - */ -#define R128_PM4_BUFFER_OFFSET 0x0700 -#define R128_PM4_BUFFER_CNTL 0x0704 -# define R128_PM4_MASK (15 << 28) -# define R128_PM4_NONPM4 (0 << 28) -# define R128_PM4_192PIO (1 << 28) -# define R128_PM4_192BM (2 << 28) -# define R128_PM4_128PIO_64INDBM (3 << 28) -# define R128_PM4_128BM_64INDBM (4 << 28) -# define R128_PM4_64PIO_128INDBM (5 << 28) -# define R128_PM4_64BM_128INDBM (6 << 28) -# define R128_PM4_64PIO_64VCBM_64INDBM (7 << 28) -# define R128_PM4_64BM_64VCBM_64INDBM (8 << 28) -# define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28) -# define R128_PM4_BUFFER_CNTL_NOUPDATE (1 << 27) - -#define R128_PM4_BUFFER_WM_CNTL 0x0708 -# define R128_WMA_SHIFT 0 -# define R128_WMB_SHIFT 8 -# define R128_WMC_SHIFT 16 -# define R128_WB_WM_SHIFT 24 - -#define R128_PM4_BUFFER_DL_RPTR_ADDR 0x070c -#define R128_PM4_BUFFER_DL_RPTR 0x0710 -#define R128_PM4_BUFFER_DL_WPTR 0x0714 -# define R128_PM4_BUFFER_DL_DONE (1U << 31) - -#define R128_PM4_VC_FPU_SETUP 0x071c - -#define R128_PM4_IW_INDOFF 0x0738 -#define R128_PM4_IW_INDSIZE 0x073c - -#define R128_PM4_STAT 0x07b8 -# define R128_PM4_FIFOCNT_MASK 0x0fff -# define R128_PM4_BUSY (1 << 16) -# define R128_PM4_GUI_ACTIVE (1U << 31) - -#define R128_PM4_MICROCODE_ADDR 0x07d4 -#define R128_PM4_MICROCODE_RADDR 0x07d8 -#define R128_PM4_MICROCODE_DATAH 0x07dc -#define R128_PM4_MICROCODE_DATAL 0x07e0 - -#define R128_PM4_BUFFER_ADDR 0x07f0 -#define R128_PM4_MICRO_CNTL 0x07fc -# define R128_PM4_MICRO_FREERUN (1 << 30) - -#define R128_PM4_FIFO_DATA_EVEN 0x1000 -#define R128_PM4_FIFO_DATA_ODD 0x1004 - -/* CCE command packets - */ -#define R128_CCE_PACKET0 0x00000000 -#define R128_CCE_PACKET1 0x40000000 -#define R128_CCE_PACKET2 0x80000000 -#define R128_CCE_PACKET3 0xC0000000 -# define R128_CNTL_HOSTDATA_BLT 0x00009400 -# define R128_CNTL_PAINT_MULTI 0x00009A00 -# define R128_CNTL_BITBLT_MULTI 0x00009B00 -# define R128_3D_RNDR_GEN_INDX_PRIM 0x00002300 - -#define R128_CCE_PACKET_MASK 0xC0000000 -#define R128_CCE_PACKET_COUNT_MASK 0x3fff0000 -#define R128_CCE_PACKET0_REG_MASK 0x000007ff -#define R128_CCE_PACKET1_REG0_MASK 0x000007ff -#define R128_CCE_PACKET1_REG1_MASK 0x003ff800 - -#define R128_CCE_VC_CNTL_PRIM_TYPE_NONE 0x00000000 -#define R128_CCE_VC_CNTL_PRIM_TYPE_POINT 0x00000001 -#define R128_CCE_VC_CNTL_PRIM_TYPE_LINE 0x00000002 -#define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE 0x00000003 -#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004 -#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005 -#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006 -#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 0x00000007 -#define R128_CCE_VC_CNTL_PRIM_WALK_IND 0x00000010 -#define R128_CCE_VC_CNTL_PRIM_WALK_LIST 0x00000020 -#define R128_CCE_VC_CNTL_PRIM_WALK_RING 0x00000030 -#define R128_CCE_VC_CNTL_NUM_SHIFT 16 - -#define R128_DATATYPE_VQ 0 -#define R128_DATATYPE_CI4 1 -#define R128_DATATYPE_CI8 2 -#define R128_DATATYPE_ARGB1555 3 -#define R128_DATATYPE_RGB565 4 -#define R128_DATATYPE_RGB888 5 -#define R128_DATATYPE_ARGB8888 6 -#define R128_DATATYPE_RGB332 7 -#define R128_DATATYPE_Y8 8 -#define R128_DATATYPE_RGB8 9 -#define R128_DATATYPE_CI16 10 -#define R128_DATATYPE_YVYU422 11 -#define R128_DATATYPE_VYUY422 12 -#define R128_DATATYPE_AYUV444 14 -#define R128_DATATYPE_ARGB4444 15 - -/* Constants */ -#define R128_AGP_OFFSET 0x02000000 - -#define R128_WATERMARK_L 16 -#define R128_WATERMARK_M 8 -#define R128_WATERMARK_N 8 -#define R128_WATERMARK_K 128 - -#define R128_MAX_USEC_TIMEOUT 100000 /* 100 ms */ - -#define R128_LAST_FRAME_REG R128_GUI_SCRATCH_REG0 -#define R128_LAST_DISPATCH_REG R128_GUI_SCRATCH_REG1 -#define R128_MAX_VB_AGE 0x7fffffff -#define R128_MAX_VB_VERTS (0xffff) - -#define R128_RING_HIGH_MARK 128 - -#define R128_PERFORMANCE_BOXES 0 - -#define R128_PCIGART_TABLE_SIZE 32768 - -#define R128_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) -#define R128_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) -#define R128_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) ) -#define R128_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) ) - -#define R128_WRITE_PLL(addr,val) \ -do { \ - R128_WRITE8(R128_CLOCK_CNTL_INDEX, \ - ((addr) & 0x1f) | R128_PLL_WR_EN); \ - R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \ -} while (0) - -#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \ - ((n) << 16) | ((reg) >> 2)) -#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \ - (((reg1) >> 2) << 11) | ((reg0) >> 2)) -#define CCE_PACKET2() (R128_CCE_PACKET2) -#define CCE_PACKET3( pkt, n ) (R128_CCE_PACKET3 | \ - (pkt) | ((n) << 16)) - -static __inline__ void r128_update_ring_snapshot(drm_r128_private_t * dev_priv) -{ - drm_r128_ring_buffer_t *ring = &dev_priv->ring; - ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32); - if (ring->space <= 0) - ring->space += ring->size; -} - -/* ================================================================ - * Misc helper macros - */ - -#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \ -do { \ - drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \ - if ( ring->space < ring->high_mark ) { \ - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \ - r128_update_ring_snapshot( dev_priv ); \ - if ( ring->space >= ring->high_mark ) \ - goto __ring_space_done; \ - DRM_UDELAY(1); \ - } \ - DRM_ERROR( "ring space check failed!\n" ); \ - return -EBUSY; \ - } \ - __ring_space_done: \ - ; \ -} while (0) - -#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ -do { \ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \ - if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \ - int __ret = r128_do_cce_idle( dev_priv ); \ - if ( __ret ) return __ret; \ - sarea_priv->last_dispatch = 0; \ - r128_freelist_reset( dev ); \ - } \ -} while (0) - -#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \ - OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \ - OUT_RING( R128_EVENT_CRTC_OFFSET ); \ -} while (0) - -/* ================================================================ - * Ring control - */ - -#define R128_VERBOSE 0 - -#define RING_LOCALS \ - int write, _nr; unsigned int tail_mask; volatile u32 *ring; - -#define BEGIN_RING( n ) do { \ - if ( R128_VERBOSE ) { \ - DRM_INFO( "BEGIN_RING( %d )\n", (n)); \ - } \ - if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \ - COMMIT_RING(); \ - r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \ - } \ - _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \ - ring = dev_priv->ring.start; \ - write = dev_priv->ring.tail; \ - tail_mask = dev_priv->ring.tail_mask; \ -} while (0) - -/* You can set this to zero if you want. If the card locks up, you'll - * need to keep this set. It works around a bug in early revs of the - * Rage 128 chipset, where the CCE would read 32 dwords past the end of - * the ring buffer before wrapping around. - */ -#define R128_BROKEN_CCE 1 - -#define ADVANCE_RING() do { \ - if ( R128_VERBOSE ) { \ - DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ - write, dev_priv->ring.tail ); \ - } \ - if ( R128_BROKEN_CCE && write < 32 ) { \ - memcpy( dev_priv->ring.end, \ - dev_priv->ring.start, \ - write * sizeof(u32) ); \ - } \ - if (((dev_priv->ring.tail + _nr) & tail_mask) != write) { \ - DRM_ERROR( \ - "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ - ((dev_priv->ring.tail + _nr) & tail_mask), \ - write, __LINE__); \ - } else \ - dev_priv->ring.tail = write; \ -} while (0) - -#define COMMIT_RING() do { \ - if ( R128_VERBOSE ) { \ - DRM_INFO( "COMMIT_RING() tail=0x%06x\n", \ - dev_priv->ring.tail ); \ - } \ - DRM_MEMORYBARRIER(); \ - R128_WRITE( R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail ); \ - R128_READ( R128_PM4_BUFFER_DL_WPTR ); \ -} while (0) - -#define OUT_RING( x ) do { \ - if ( R128_VERBOSE ) { \ - DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ - (unsigned int)(x), write ); \ - } \ - ring[write++] = cpu_to_le32( x ); \ - write &= tail_mask; \ -} while (0) - -#endif /* __R128_DRV_H__ */ diff --git a/sys/dev/drm/r128_irq.c b/sys/dev/drm/r128_irq.c deleted file mode 100644 index 6be6a1c15449..000000000000 --- a/sys/dev/drm/r128_irq.c +++ /dev/null @@ -1,119 +0,0 @@ -/* r128_irq.c -- IRQ handling for radeon -*- linux-c -*- */ -/*- - * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. - * - * The Weather Channel (TM) funded Tungsten Graphics to develop the - * initial release of the Radeon 8500 driver under the XFree86 license. - * This notice must be preserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Eric Anholt <anholt@FreeBSD.org> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/r128_drm.h" -#include "dev/drm/r128_drv.h" - -u32 r128_get_vblank_counter(struct drm_device *dev, int crtc) -{ - const drm_r128_private_t *dev_priv = dev->dev_private; - - if (crtc != 0) - return 0; - - return atomic_read(&dev_priv->vbl_received); -} - -irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS) -{ - struct drm_device *dev = (struct drm_device *) arg; - drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; - int status; - - status = R128_READ(R128_GEN_INT_STATUS); - - /* VBLANK interrupt */ - if (status & R128_CRTC_VBLANK_INT) { - R128_WRITE(R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK); - atomic_inc(&dev_priv->vbl_received); - drm_handle_vblank(dev, 0); - return IRQ_HANDLED; - } - return IRQ_NONE; -} - -int r128_enable_vblank(struct drm_device *dev, int crtc) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - - if (crtc != 0) { - DRM_ERROR("%s: bad crtc %d\n", __FUNCTION__, crtc); - return -EINVAL; - } - - R128_WRITE(R128_GEN_INT_CNTL, R128_CRTC_VBLANK_INT_EN); - return 0; -} - -void r128_disable_vblank(struct drm_device *dev, int crtc) -{ - if (crtc != 0) - DRM_ERROR("%s: bad crtc %d\n", __FUNCTION__, crtc); - - /* - * FIXME: implement proper interrupt disable by using the vblank - * counter register (if available) - * - * R128_WRITE(R128_GEN_INT_CNTL, - * R128_READ(R128_GEN_INT_CNTL) & ~R128_CRTC_VBLANK_INT_EN); - */ -} - -void r128_driver_irq_preinstall(struct drm_device * dev) -{ - drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; - - /* Disable *all* interrupts */ - R128_WRITE(R128_GEN_INT_CNTL, 0); - /* Clear vblank bit if it's already high */ - R128_WRITE(R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK); -} - -int r128_driver_irq_postinstall(struct drm_device * dev) -{ - return 0; -} - -void r128_driver_irq_uninstall(struct drm_device * dev) -{ - drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; - if (!dev_priv) - return; - - /* Disable *all* interrupts */ - R128_WRITE(R128_GEN_INT_CNTL, 0); -} diff --git a/sys/dev/drm/r128_state.c b/sys/dev/drm/r128_state.c deleted file mode 100644 index 9632dec2a68a..000000000000 --- a/sys/dev/drm/r128_state.c +++ /dev/null @@ -1,1684 +0,0 @@ -/* r128_state.c -- State support for r128 -*- linux-c -*- - * Created: Thu Jan 27 02:53:43 2000 by gareth@valinux.com - */ -/*- - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/r128_drm.h" -#include "dev/drm/r128_drv.h" - -/* ================================================================ - * CCE hardware state programming functions - */ - -static void r128_emit_clip_rects(drm_r128_private_t * dev_priv, - struct drm_clip_rect * boxes, int count) -{ - u32 aux_sc_cntl = 0x00000000; - RING_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_RING((count < 3 ? count : 3) * 5 + 2); - - if (count >= 1) { - OUT_RING(CCE_PACKET0(R128_AUX1_SC_LEFT, 3)); - OUT_RING(boxes[0].x1); - OUT_RING(boxes[0].x2 - 1); - OUT_RING(boxes[0].y1); - OUT_RING(boxes[0].y2 - 1); - - aux_sc_cntl |= (R128_AUX1_SC_EN | R128_AUX1_SC_MODE_OR); - } - if (count >= 2) { - OUT_RING(CCE_PACKET0(R128_AUX2_SC_LEFT, 3)); - OUT_RING(boxes[1].x1); - OUT_RING(boxes[1].x2 - 1); - OUT_RING(boxes[1].y1); - OUT_RING(boxes[1].y2 - 1); - - aux_sc_cntl |= (R128_AUX2_SC_EN | R128_AUX2_SC_MODE_OR); - } - if (count >= 3) { - OUT_RING(CCE_PACKET0(R128_AUX3_SC_LEFT, 3)); - OUT_RING(boxes[2].x1); - OUT_RING(boxes[2].x2 - 1); - OUT_RING(boxes[2].y1); - OUT_RING(boxes[2].y2 - 1); - - aux_sc_cntl |= (R128_AUX3_SC_EN | R128_AUX3_SC_MODE_OR); - } - - OUT_RING(CCE_PACKET0(R128_AUX_SC_CNTL, 0)); - OUT_RING(aux_sc_cntl); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_core(drm_r128_private_t * dev_priv) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_RING(2); - - OUT_RING(CCE_PACKET0(R128_SCALE_3D_CNTL, 0)); - OUT_RING(ctx->scale_3d_cntl); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_context(drm_r128_private_t * dev_priv) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_RING(13); - - OUT_RING(CCE_PACKET0(R128_DST_PITCH_OFFSET_C, 11)); - OUT_RING(ctx->dst_pitch_offset_c); - OUT_RING(ctx->dp_gui_master_cntl_c); - OUT_RING(ctx->sc_top_left_c); - OUT_RING(ctx->sc_bottom_right_c); - OUT_RING(ctx->z_offset_c); - OUT_RING(ctx->z_pitch_c); - OUT_RING(ctx->z_sten_cntl_c); - OUT_RING(ctx->tex_cntl_c); - OUT_RING(ctx->misc_3d_state_cntl_reg); - OUT_RING(ctx->texture_clr_cmp_clr_c); - OUT_RING(ctx->texture_clr_cmp_msk_c); - OUT_RING(ctx->fog_color_c); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_setup(drm_r128_private_t * dev_priv) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_RING(3); - - OUT_RING(CCE_PACKET1(R128_SETUP_CNTL, R128_PM4_VC_FPU_SETUP)); - OUT_RING(ctx->setup_cntl); - OUT_RING(ctx->pm4_vc_fpu_setup); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_masks(drm_r128_private_t * dev_priv) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_RING(5); - - OUT_RING(CCE_PACKET0(R128_DP_WRITE_MASK, 0)); - OUT_RING(ctx->dp_write_mask); - - OUT_RING(CCE_PACKET0(R128_STEN_REF_MASK_C, 1)); - OUT_RING(ctx->sten_ref_mask_c); - OUT_RING(ctx->plane_3d_mask_c); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_window(drm_r128_private_t * dev_priv) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_RING(2); - - OUT_RING(CCE_PACKET0(R128_WINDOW_XY_OFFSET, 0)); - OUT_RING(ctx->window_xy_offset); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[0]; - int i; - RING_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_RING(7 + R128_MAX_TEXTURE_LEVELS); - - OUT_RING(CCE_PACKET0(R128_PRIM_TEX_CNTL_C, - 2 + R128_MAX_TEXTURE_LEVELS)); - OUT_RING(tex->tex_cntl); - OUT_RING(tex->tex_combine_cntl); - OUT_RING(ctx->tex_size_pitch_c); - for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) { - OUT_RING(tex->tex_offset[i]); - } - - OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1)); - OUT_RING(ctx->constant_color_c); - OUT_RING(tex->tex_border_color); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1]; - int i; - RING_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_RING(5 + R128_MAX_TEXTURE_LEVELS); - - OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS)); - OUT_RING(tex->tex_cntl); - OUT_RING(tex->tex_combine_cntl); - for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) { - OUT_RING(tex->tex_offset[i]); - } - - OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0)); - OUT_RING(tex->tex_border_color); - - ADVANCE_RING(); -} - -static void r128_emit_state(drm_r128_private_t * dev_priv) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - DRM_DEBUG("dirty=0x%08x\n", dirty); - - if (dirty & R128_UPLOAD_CORE) { - r128_emit_core(dev_priv); - sarea_priv->dirty &= ~R128_UPLOAD_CORE; - } - - if (dirty & R128_UPLOAD_CONTEXT) { - r128_emit_context(dev_priv); - sarea_priv->dirty &= ~R128_UPLOAD_CONTEXT; - } - - if (dirty & R128_UPLOAD_SETUP) { - r128_emit_setup(dev_priv); - sarea_priv->dirty &= ~R128_UPLOAD_SETUP; - } - - if (dirty & R128_UPLOAD_MASKS) { - r128_emit_masks(dev_priv); - sarea_priv->dirty &= ~R128_UPLOAD_MASKS; - } - - if (dirty & R128_UPLOAD_WINDOW) { - r128_emit_window(dev_priv); - sarea_priv->dirty &= ~R128_UPLOAD_WINDOW; - } - - if (dirty & R128_UPLOAD_TEX0) { - r128_emit_tex0(dev_priv); - sarea_priv->dirty &= ~R128_UPLOAD_TEX0; - } - - if (dirty & R128_UPLOAD_TEX1) { - r128_emit_tex1(dev_priv); - sarea_priv->dirty &= ~R128_UPLOAD_TEX1; - } - - /* Turn off the texture cache flushing */ - sarea_priv->context_state.tex_cntl_c &= ~R128_TEX_CACHE_FLUSH; - - sarea_priv->dirty &= ~R128_REQUIRE_QUIESCENCE; -} - -#if R128_PERFORMANCE_BOXES -/* ================================================================ - * Performance monitoring functions - */ - -static void r128_clear_box(drm_r128_private_t * dev_priv, - int x, int y, int w, int h, int r, int g, int b) -{ - u32 pitch, offset; - u32 fb_bpp, color; - RING_LOCALS; - - switch (dev_priv->fb_bpp) { - case 16: - fb_bpp = R128_GMC_DST_16BPP; - color = (((r & 0xf8) << 8) | - ((g & 0xfc) << 3) | ((b & 0xf8) >> 3)); - break; - case 24: - fb_bpp = R128_GMC_DST_24BPP; - color = ((r << 16) | (g << 8) | b); - break; - case 32: - fb_bpp = R128_GMC_DST_32BPP; - color = (((0xff) << 24) | (r << 16) | (g << 8) | b); - break; - default: - return; - } - - offset = dev_priv->back_offset; - pitch = dev_priv->back_pitch >> 3; - - BEGIN_RING(6); - - OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4)); - OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - fb_bpp | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | R128_GMC_AUX_CLIP_DIS); - - OUT_RING((pitch << 21) | (offset >> 5)); - OUT_RING(color); - - OUT_RING((x << 16) | y); - OUT_RING((w << 16) | h); - - ADVANCE_RING(); -} - -static void r128_cce_performance_boxes(drm_r128_private_t * dev_priv) -{ - if (atomic_read(&dev_priv->idle_count) == 0) { - r128_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0); - } else { - atomic_set(&dev_priv->idle_count, 0); - } -} - -#endif - -/* ================================================================ - * CCE command dispatch functions - */ - -static void r128_print_dirty(const char *msg, unsigned int flags) -{ - DRM_INFO("%s: (0x%x) %s%s%s%s%s%s%s%s%s\n", - msg, - flags, - (flags & R128_UPLOAD_CORE) ? "core, " : "", - (flags & R128_UPLOAD_CONTEXT) ? "context, " : "", - (flags & R128_UPLOAD_SETUP) ? "setup, " : "", - (flags & R128_UPLOAD_TEX0) ? "tex0, " : "", - (flags & R128_UPLOAD_TEX1) ? "tex1, " : "", - (flags & R128_UPLOAD_MASKS) ? "masks, " : "", - (flags & R128_UPLOAD_WINDOW) ? "window, " : "", - (flags & R128_UPLOAD_CLIPRECTS) ? "cliprects, " : "", - (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : ""); -} - -static void r128_cce_dispatch_clear(struct drm_device * dev, - drm_r128_clear_t * clear) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - struct drm_clip_rect *pbox = sarea_priv->boxes; - unsigned int flags = clear->flags; - int i; - RING_LOCALS; - DRM_DEBUG("\n"); - - if (dev_priv->page_flipping && dev_priv->current_page == 1) { - unsigned int tmp = flags; - - flags &= ~(R128_FRONT | R128_BACK); - if (tmp & R128_FRONT) - flags |= R128_BACK; - if (tmp & R128_BACK) - flags |= R128_FRONT; - } - - for (i = 0; i < nbox; i++) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG("dispatch clear %d,%d-%d,%d flags 0x%x\n", - pbox[i].x1, pbox[i].y1, pbox[i].x2, - pbox[i].y2, flags); - - if (flags & (R128_FRONT | R128_BACK)) { - BEGIN_RING(2); - - OUT_RING(CCE_PACKET0(R128_DP_WRITE_MASK, 0)); - OUT_RING(clear->color_mask); - - ADVANCE_RING(); - } - - if (flags & R128_FRONT) { - BEGIN_RING(6); - - OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4)); - OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS); - - OUT_RING(dev_priv->front_pitch_offset_c); - OUT_RING(clear->clear_color); - - OUT_RING((x << 16) | y); - OUT_RING((w << 16) | h); - - ADVANCE_RING(); - } - - if (flags & R128_BACK) { - BEGIN_RING(6); - - OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4)); - OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS); - - OUT_RING(dev_priv->back_pitch_offset_c); - OUT_RING(clear->clear_color); - - OUT_RING((x << 16) | y); - OUT_RING((w << 16) | h); - - ADVANCE_RING(); - } - - if (flags & R128_DEPTH) { - BEGIN_RING(6); - - OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4)); - OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS | R128_GMC_WR_MSK_DIS); - - OUT_RING(dev_priv->depth_pitch_offset_c); - OUT_RING(clear->clear_depth); - - OUT_RING((x << 16) | y); - OUT_RING((w << 16) | h); - - ADVANCE_RING(); - } - } -} - -static void r128_cce_dispatch_swap(struct drm_device * dev) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - struct drm_clip_rect *pbox = sarea_priv->boxes; - int i; - RING_LOCALS; - DRM_DEBUG("\n"); - -#if R128_PERFORMANCE_BOXES - /* Do some trivial performance monitoring... - */ - r128_cce_performance_boxes(dev_priv); -#endif - - for (i = 0; i < nbox; i++) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - BEGIN_RING(7); - - OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5)); - OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL | - R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (dev_priv->color_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_MEMORY | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS | R128_GMC_WR_MSK_DIS); - - /* Make this work even if front & back are flipped: - */ - if (dev_priv->current_page == 0) { - OUT_RING(dev_priv->back_pitch_offset_c); - OUT_RING(dev_priv->front_pitch_offset_c); - } else { - OUT_RING(dev_priv->front_pitch_offset_c); - OUT_RING(dev_priv->back_pitch_offset_c); - } - - OUT_RING((x << 16) | y); - OUT_RING((x << 16) | y); - OUT_RING((w << 16) | h); - - ADVANCE_RING(); - } - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->last_frame++; - - BEGIN_RING(2); - - OUT_RING(CCE_PACKET0(R128_LAST_FRAME_REG, 0)); - OUT_RING(dev_priv->sarea_priv->last_frame); - - ADVANCE_RING(); -} - -static void r128_cce_dispatch_flip(struct drm_device * dev) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - DRM_DEBUG("page=%d pfCurrentPage=%d\n", - dev_priv->current_page, dev_priv->sarea_priv->pfCurrentPage); - -#if R128_PERFORMANCE_BOXES - /* Do some trivial performance monitoring... - */ - r128_cce_performance_boxes(dev_priv); -#endif - - BEGIN_RING(4); - - R128_WAIT_UNTIL_PAGE_FLIPPED(); - OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0)); - - if (dev_priv->current_page == 0) { - OUT_RING(dev_priv->back_offset); - } else { - OUT_RING(dev_priv->front_offset); - } - - ADVANCE_RING(); - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->last_frame++; - dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page = - 1 - dev_priv->current_page; - - BEGIN_RING(2); - - OUT_RING(CCE_PACKET0(R128_LAST_FRAME_REG, 0)); - OUT_RING(dev_priv->sarea_priv->last_frame); - - ADVANCE_RING(); -} - -static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int format = sarea_priv->vc_format; - int offset = buf->bus_address; - int size = buf->used; - int prim = buf_priv->prim; - int i = 0; - RING_LOCALS; - DRM_DEBUG("buf=%d nbox=%d\n", buf->idx, sarea_priv->nbox); - - if (0) - r128_print_dirty("dispatch_vertex", sarea_priv->dirty); - - if (buf->used) { - buf_priv->dispatched = 1; - - if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) { - r128_emit_state(dev_priv); - } - - do { - /* Emit the next set of up to three cliprects */ - if (i < sarea_priv->nbox) { - r128_emit_clip_rects(dev_priv, - &sarea_priv->boxes[i], - sarea_priv->nbox - i); - } - - /* Emit the vertex buffer rendering commands */ - BEGIN_RING(5); - - OUT_RING(CCE_PACKET3(R128_3D_RNDR_GEN_INDX_PRIM, 3)); - OUT_RING(offset); - OUT_RING(size); - OUT_RING(format); - OUT_RING(prim | R128_CCE_VC_CNTL_PRIM_WALK_LIST | - (size << R128_CCE_VC_CNTL_NUM_SHIFT)); - - ADVANCE_RING(); - - i += 3; - } while (i < sarea_priv->nbox); - } - - if (buf_priv->discard) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the vertex buffer age */ - BEGIN_RING(2); - - OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0)); - OUT_RING(buf_priv->age); - - ADVANCE_RING(); - - buf->pending = 1; - buf->used = 0; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } - - dev_priv->sarea_priv->last_dispatch++; - - sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS; - sarea_priv->nbox = 0; -} - -static void r128_cce_dispatch_indirect(struct drm_device * dev, - struct drm_buf * buf, int start, int end) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - RING_LOCALS; - DRM_DEBUG("indirect: buf=%d s=0x%x e=0x%x\n", buf->idx, start, end); - - if (start != end) { - int offset = buf->bus_address + start; - int dwords = (end - start + 3) / sizeof(u32); - - /* Indirect buffer data must be an even number of - * dwords, so if we've been given an odd number we must - * pad the data with a Type-2 CCE packet. - */ - if (dwords & 1) { - u32 *data = (u32 *) - ((char *)dev->agp_buffer_map->virtual - + buf->offset + start); - data[dwords++] = cpu_to_le32(R128_CCE_PACKET2); - } - - buf_priv->dispatched = 1; - - /* Fire off the indirect buffer */ - BEGIN_RING(3); - - OUT_RING(CCE_PACKET0(R128_PM4_IW_INDOFF, 1)); - OUT_RING(offset); - OUT_RING(dwords); - - ADVANCE_RING(); - } - - if (buf_priv->discard) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the indirect buffer age */ - BEGIN_RING(2); - - OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0)); - OUT_RING(buf_priv->age); - - ADVANCE_RING(); - - buf->pending = 1; - buf->used = 0; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } - - dev_priv->sarea_priv->last_dispatch++; -} - -static void r128_cce_dispatch_indices(struct drm_device * dev, - struct drm_buf * buf, - int start, int end, int count) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int format = sarea_priv->vc_format; - int offset = dev->agp_buffer_map->offset - dev_priv->cce_buffers_offset; - int prim = buf_priv->prim; - u32 *data; - int dwords; - int i = 0; - RING_LOCALS; - DRM_DEBUG("indices: s=%d e=%d c=%d\n", start, end, count); - - if (0) - r128_print_dirty("dispatch_indices", sarea_priv->dirty); - - if (start != end) { - buf_priv->dispatched = 1; - - if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) { - r128_emit_state(dev_priv); - } - - dwords = (end - start + 3) / sizeof(u32); - - data = (u32 *) ((char *)dev->agp_buffer_map->virtual - + buf->offset + start); - - data[0] = cpu_to_le32(CCE_PACKET3(R128_3D_RNDR_GEN_INDX_PRIM, - dwords - 2)); - - data[1] = cpu_to_le32(offset); - data[2] = cpu_to_le32(R128_MAX_VB_VERTS); - data[3] = cpu_to_le32(format); - data[4] = cpu_to_le32((prim | R128_CCE_VC_CNTL_PRIM_WALK_IND | - (count << 16))); - - if (count & 0x1) { -#ifdef __LITTLE_ENDIAN - data[dwords - 1] &= 0x0000ffff; -#else - data[dwords - 1] &= 0xffff0000; -#endif - } - - do { - /* Emit the next set of up to three cliprects */ - if (i < sarea_priv->nbox) { - r128_emit_clip_rects(dev_priv, - &sarea_priv->boxes[i], - sarea_priv->nbox - i); - } - - r128_cce_dispatch_indirect(dev, buf, start, end); - - i += 3; - } while (i < sarea_priv->nbox); - } - - if (buf_priv->discard) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the vertex buffer age */ - BEGIN_RING(2); - - OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0)); - OUT_RING(buf_priv->age); - - ADVANCE_RING(); - - buf->pending = 1; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } - - dev_priv->sarea_priv->last_dispatch++; - - sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS; - sarea_priv->nbox = 0; -} - -static int r128_cce_dispatch_blit(struct drm_device * dev, - struct drm_file *file_priv, - drm_r128_blit_t * blit) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - struct drm_device_dma *dma = dev->dma; - struct drm_buf *buf; - drm_r128_buf_priv_t *buf_priv; - u32 *data; - int dword_shift, dwords; - RING_LOCALS; - DRM_DEBUG("\n"); - - /* The compiler won't optimize away a division by a variable, - * even if the only legal values are powers of two. Thus, we'll - * use a shift instead. - */ - switch (blit->format) { - case R128_DATATYPE_ARGB8888: - dword_shift = 0; - break; - case R128_DATATYPE_ARGB1555: - case R128_DATATYPE_RGB565: - case R128_DATATYPE_ARGB4444: - case R128_DATATYPE_YVYU422: - case R128_DATATYPE_VYUY422: - dword_shift = 1; - break; - case R128_DATATYPE_CI8: - case R128_DATATYPE_RGB8: - dword_shift = 2; - break; - default: - DRM_ERROR("invalid blit format %d\n", blit->format); - return -EINVAL; - } - - /* Flush the pixel cache, and mark the contents as Read Invalid. - * This ensures no pixel data gets mixed up with the texture - * data from the host data blit, otherwise part of the texture - * image may be corrupted. - */ - BEGIN_RING(2); - - OUT_RING(CCE_PACKET0(R128_PC_GUI_CTLSTAT, 0)); - OUT_RING(R128_PC_RI_GUI | R128_PC_FLUSH_GUI); - - ADVANCE_RING(); - - /* Dispatch the indirect buffer. - */ - buf = dma->buflist[blit->idx]; - buf_priv = buf->dev_private; - - if (buf->file_priv != file_priv) { - DRM_ERROR("process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->file_priv); - return -EINVAL; - } - if (buf->pending) { - DRM_ERROR("sending pending buffer %d\n", blit->idx); - return -EINVAL; - } - - buf_priv->discard = 1; - - dwords = (blit->width * blit->height) >> dword_shift; - - data = (u32 *) ((char *)dev->agp_buffer_map->handle + buf->offset); - - data[0] = cpu_to_le32(CCE_PACKET3(R128_CNTL_HOSTDATA_BLT, dwords + 6)); - data[1] = cpu_to_le32((R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (blit->format << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_HOST_DATA | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS | R128_GMC_WR_MSK_DIS)); - - data[2] = cpu_to_le32((blit->pitch << 21) | (blit->offset >> 5)); - data[3] = cpu_to_le32(0xffffffff); - data[4] = cpu_to_le32(0xffffffff); - data[5] = cpu_to_le32((blit->y << 16) | blit->x); - data[6] = cpu_to_le32((blit->height << 16) | blit->width); - data[7] = cpu_to_le32(dwords); - - buf->used = (dwords + 8) * sizeof(u32); - - r128_cce_dispatch_indirect(dev, buf, 0, buf->used); - - /* Flush the pixel cache after the blit completes. This ensures - * the texture data is written out to memory before rendering - * continues. - */ - BEGIN_RING(2); - - OUT_RING(CCE_PACKET0(R128_PC_GUI_CTLSTAT, 0)); - OUT_RING(R128_PC_FLUSH_GUI); - - ADVANCE_RING(); - - return 0; -} - -/* ================================================================ - * Tiled depth buffer management - * - * FIXME: These should all set the destination write mask for when we - * have hardware stencil support. - */ - -static int r128_cce_dispatch_write_span(struct drm_device * dev, - drm_r128_depth_t * depth) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, x, y; - u32 *buffer; - u8 *mask; - int i, buffer_size, mask_size; - RING_LOCALS; - DRM_DEBUG("\n"); - - count = depth->n; - if (count > 4096 || count <= 0) - return -EMSGSIZE; - - if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) { - return -EFAULT; - } - if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) { - return -EFAULT; - } - - buffer_size = depth->n * sizeof(u32); - buffer = drm_alloc(buffer_size, DRM_MEM_BUFS); - if (buffer == NULL) - return -ENOMEM; - if (DRM_COPY_FROM_USER(buffer, depth->buffer, buffer_size)) { - drm_free(buffer, buffer_size, DRM_MEM_BUFS); - return -EFAULT; - } - - mask_size = depth->n * sizeof(u8); - if (depth->mask) { - mask = drm_alloc(mask_size, DRM_MEM_BUFS); - if (mask == NULL) { - drm_free(buffer, buffer_size, DRM_MEM_BUFS); - return -ENOMEM; - } - if (DRM_COPY_FROM_USER(mask, depth->mask, mask_size)) { - drm_free(buffer, buffer_size, DRM_MEM_BUFS); - drm_free(mask, mask_size, DRM_MEM_BUFS); - return -EFAULT; - } - - for (i = 0; i < count; i++, x++) { - if (mask[i]) { - BEGIN_RING(6); - - OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4)); - OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS); - - OUT_RING(dev_priv->depth_pitch_offset_c); - OUT_RING(buffer[i]); - - OUT_RING((x << 16) | y); - OUT_RING((1 << 16) | 1); - - ADVANCE_RING(); - } - } - - drm_free(mask, mask_size, DRM_MEM_BUFS); - } else { - for (i = 0; i < count; i++, x++) { - BEGIN_RING(6); - - OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4)); - OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS); - - OUT_RING(dev_priv->depth_pitch_offset_c); - OUT_RING(buffer[i]); - - OUT_RING((x << 16) | y); - OUT_RING((1 << 16) | 1); - - ADVANCE_RING(); - } - } - - drm_free(buffer, buffer_size, DRM_MEM_BUFS); - - return 0; -} - -static int r128_cce_dispatch_write_pixels(struct drm_device * dev, - drm_r128_depth_t * depth) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, *x, *y; - u32 *buffer; - u8 *mask; - int i, xbuf_size, ybuf_size, buffer_size, mask_size; - RING_LOCALS; - DRM_DEBUG("\n"); - - count = depth->n; - if (count > 4096 || count <= 0) - return -EMSGSIZE; - - xbuf_size = count * sizeof(*x); - ybuf_size = count * sizeof(*y); - x = drm_alloc(xbuf_size, DRM_MEM_BUFS); - if (x == NULL) { - return -ENOMEM; - } - y = drm_alloc(ybuf_size, DRM_MEM_BUFS); - if (y == NULL) { - drm_free(x, xbuf_size, DRM_MEM_BUFS); - return -ENOMEM; - } - if (DRM_COPY_FROM_USER(x, depth->x, xbuf_size)) { - drm_free(x, xbuf_size, DRM_MEM_BUFS); - drm_free(y, ybuf_size, DRM_MEM_BUFS); - return -EFAULT; - } - if (DRM_COPY_FROM_USER(y, depth->y, xbuf_size)) { - drm_free(x, xbuf_size, DRM_MEM_BUFS); - drm_free(y, ybuf_size, DRM_MEM_BUFS); - return -EFAULT; - } - - buffer_size = depth->n * sizeof(u32); - buffer = drm_alloc(buffer_size, DRM_MEM_BUFS); - if (buffer == NULL) { - drm_free(x, xbuf_size, DRM_MEM_BUFS); - drm_free(y, ybuf_size, DRM_MEM_BUFS); - return -ENOMEM; - } - if (DRM_COPY_FROM_USER(buffer, depth->buffer, buffer_size)) { - drm_free(x, xbuf_size, DRM_MEM_BUFS); - drm_free(y, ybuf_size, DRM_MEM_BUFS); - drm_free(buffer, buffer_size, DRM_MEM_BUFS); - return -EFAULT; - } - - if (depth->mask) { - mask_size = depth->n * sizeof(u8); - mask = drm_alloc(mask_size, DRM_MEM_BUFS); - if (mask == NULL) { - drm_free(x, xbuf_size, DRM_MEM_BUFS); - drm_free(y, ybuf_size, DRM_MEM_BUFS); - drm_free(buffer, buffer_size, DRM_MEM_BUFS); - return -ENOMEM; - } - if (DRM_COPY_FROM_USER(mask, depth->mask, mask_size)) { - drm_free(x, xbuf_size, DRM_MEM_BUFS); - drm_free(y, ybuf_size, DRM_MEM_BUFS); - drm_free(buffer, buffer_size, DRM_MEM_BUFS); - drm_free(mask, mask_size, DRM_MEM_BUFS); - return -EFAULT; - } - - for (i = 0; i < count; i++) { - if (mask[i]) { - BEGIN_RING(6); - - OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4)); - OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS); - - OUT_RING(dev_priv->depth_pitch_offset_c); - OUT_RING(buffer[i]); - - OUT_RING((x[i] << 16) | y[i]); - OUT_RING((1 << 16) | 1); - - ADVANCE_RING(); - } - } - - drm_free(mask, mask_size, DRM_MEM_BUFS); - } else { - for (i = 0; i < count; i++) { - BEGIN_RING(6); - - OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4)); - OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS); - - OUT_RING(dev_priv->depth_pitch_offset_c); - OUT_RING(buffer[i]); - - OUT_RING((x[i] << 16) | y[i]); - OUT_RING((1 << 16) | 1); - - ADVANCE_RING(); - } - } - - drm_free(x, xbuf_size, DRM_MEM_BUFS); - drm_free(y, ybuf_size, DRM_MEM_BUFS); - drm_free(buffer, buffer_size, DRM_MEM_BUFS); - - return 0; -} - -static int r128_cce_dispatch_read_span(struct drm_device * dev, - drm_r128_depth_t * depth) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, x, y; - RING_LOCALS; - DRM_DEBUG("\n"); - - count = depth->n; - if (count > 4096 || count <= 0) - return -EMSGSIZE; - - if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) { - return -EFAULT; - } - if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) { - return -EFAULT; - } - - BEGIN_RING(7); - - OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5)); - OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL | - R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_MEMORY | - R128_GMC_CLR_CMP_CNTL_DIS | R128_GMC_WR_MSK_DIS); - - OUT_RING(dev_priv->depth_pitch_offset_c); - OUT_RING(dev_priv->span_pitch_offset_c); - - OUT_RING((x << 16) | y); - OUT_RING((0 << 16) | 0); - OUT_RING((count << 16) | 1); - - ADVANCE_RING(); - - return 0; -} - -static int r128_cce_dispatch_read_pixels(struct drm_device * dev, - drm_r128_depth_t * depth) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, *x, *y; - int i, xbuf_size, ybuf_size; - RING_LOCALS; - DRM_DEBUG("\n"); - - count = depth->n; - if (count > 4096 || count <= 0) - return -EMSGSIZE; - - if (count > dev_priv->depth_pitch) { - count = dev_priv->depth_pitch; - } - - xbuf_size = count * sizeof(*x); - ybuf_size = count * sizeof(*y); - x = drm_alloc(xbuf_size, DRM_MEM_BUFS); - if (x == NULL) { - return -ENOMEM; - } - y = drm_alloc(ybuf_size, DRM_MEM_BUFS); - if (y == NULL) { - drm_free(x, xbuf_size, DRM_MEM_BUFS); - return -ENOMEM; - } - if (DRM_COPY_FROM_USER(x, depth->x, xbuf_size)) { - drm_free(x, xbuf_size, DRM_MEM_BUFS); - drm_free(y, ybuf_size, DRM_MEM_BUFS); - return -EFAULT; - } - if (DRM_COPY_FROM_USER(y, depth->y, ybuf_size)) { - drm_free(x, xbuf_size, DRM_MEM_BUFS); - drm_free(y, ybuf_size, DRM_MEM_BUFS); - return -EFAULT; - } - - for (i = 0; i < count; i++) { - BEGIN_RING(7); - - OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5)); - OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL | - R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_MEMORY | - R128_GMC_CLR_CMP_CNTL_DIS | R128_GMC_WR_MSK_DIS); - - OUT_RING(dev_priv->depth_pitch_offset_c); - OUT_RING(dev_priv->span_pitch_offset_c); - - OUT_RING((x[i] << 16) | y[i]); - OUT_RING((i << 16) | 0); - OUT_RING((1 << 16) | 1); - - ADVANCE_RING(); - } - - drm_free(x, xbuf_size, DRM_MEM_BUFS); - drm_free(y, ybuf_size, DRM_MEM_BUFS); - - return 0; -} - -/* ================================================================ - * Polygon stipple - */ - -static void r128_cce_dispatch_stipple(struct drm_device * dev, u32 * stipple) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int i; - RING_LOCALS; - DRM_DEBUG("\n"); - - BEGIN_RING(33); - - OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31)); - for (i = 0; i < 32; i++) { - OUT_RING(stipple[i]); - } - - ADVANCE_RING(); -} - -/* ================================================================ - * IOCTL functions - */ - -static int r128_cce_clear(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_clear_t *clear = data; - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - RING_SPACE_TEST_WITH_RETURN(dev_priv); - - if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS) - sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS; - - r128_cce_dispatch_clear(dev, clear); - COMMIT_RING(); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= R128_UPLOAD_CONTEXT | R128_UPLOAD_MASKS; - - return 0; -} - -static int r128_do_init_pageflip(struct drm_device * dev) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG("\n"); - - dev_priv->crtc_offset = R128_READ(R128_CRTC_OFFSET); - dev_priv->crtc_offset_cntl = R128_READ(R128_CRTC_OFFSET_CNTL); - - R128_WRITE(R128_CRTC_OFFSET, dev_priv->front_offset); - R128_WRITE(R128_CRTC_OFFSET_CNTL, - dev_priv->crtc_offset_cntl | R128_CRTC_OFFSET_FLIP_CNTL); - - dev_priv->page_flipping = 1; - dev_priv->current_page = 0; - dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page; - - return 0; -} - -static int r128_do_cleanup_pageflip(struct drm_device * dev) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG("\n"); - - R128_WRITE(R128_CRTC_OFFSET, dev_priv->crtc_offset); - R128_WRITE(R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl); - - if (dev_priv->current_page != 0) { - r128_cce_dispatch_flip(dev); - COMMIT_RING(); - } - - dev_priv->page_flipping = 0; - return 0; -} - -/* Swapping and flipping are different operations, need different ioctls. - * They can & should be intermixed to support multiple 3d windows. - */ - -static int r128_cce_flip(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - RING_SPACE_TEST_WITH_RETURN(dev_priv); - - if (!dev_priv->page_flipping) - r128_do_init_pageflip(dev); - - r128_cce_dispatch_flip(dev); - - COMMIT_RING(); - return 0; -} - -static int r128_cce_swap(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - RING_SPACE_TEST_WITH_RETURN(dev_priv); - - if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS) - sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS; - - r128_cce_dispatch_swap(dev); - dev_priv->sarea_priv->dirty |= (R128_UPLOAD_CONTEXT | - R128_UPLOAD_MASKS); - - COMMIT_RING(); - return 0; -} - -static int r128_cce_vertex(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - struct drm_device_dma *dma = dev->dma; - struct drm_buf *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_vertex_t *vertex = data; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } - - DRM_DEBUG("pid=%d index=%d count=%d discard=%d\n", - DRM_CURRENTPID, vertex->idx, vertex->count, vertex->discard); - - if (vertex->idx < 0 || vertex->idx >= dma->buf_count) { - DRM_ERROR("buffer index %d (of %d max)\n", - vertex->idx, dma->buf_count - 1); - return -EINVAL; - } - if (vertex->prim < 0 || - vertex->prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2) { - DRM_ERROR("buffer prim %d\n", vertex->prim); - return -EINVAL; - } - - RING_SPACE_TEST_WITH_RETURN(dev_priv); - VB_AGE_TEST_WITH_RETURN(dev_priv); - - buf = dma->buflist[vertex->idx]; - buf_priv = buf->dev_private; - - if (buf->file_priv != file_priv) { - DRM_ERROR("process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->file_priv); - return -EINVAL; - } - if (buf->pending) { - DRM_ERROR("sending pending buffer %d\n", vertex->idx); - return -EINVAL; - } - - buf->used = vertex->count; - buf_priv->prim = vertex->prim; - buf_priv->discard = vertex->discard; - - r128_cce_dispatch_vertex(dev, buf); - - COMMIT_RING(); - return 0; -} - -static int r128_cce_indices(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - struct drm_device_dma *dma = dev->dma; - struct drm_buf *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_indices_t *elts = data; - int count; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } - - DRM_DEBUG("pid=%d buf=%d s=%d e=%d d=%d\n", DRM_CURRENTPID, - elts->idx, elts->start, elts->end, elts->discard); - - if (elts->idx < 0 || elts->idx >= dma->buf_count) { - DRM_ERROR("buffer index %d (of %d max)\n", - elts->idx, dma->buf_count - 1); - return -EINVAL; - } - if (elts->prim < 0 || - elts->prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2) { - DRM_ERROR("buffer prim %d\n", elts->prim); - return -EINVAL; - } - - RING_SPACE_TEST_WITH_RETURN(dev_priv); - VB_AGE_TEST_WITH_RETURN(dev_priv); - - buf = dma->buflist[elts->idx]; - buf_priv = buf->dev_private; - - if (buf->file_priv != file_priv) { - DRM_ERROR("process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->file_priv); - return -EINVAL; - } - if (buf->pending) { - DRM_ERROR("sending pending buffer %d\n", elts->idx); - return -EINVAL; - } - - count = (elts->end - elts->start) / sizeof(u16); - elts->start -= R128_INDEX_PRIM_OFFSET; - - if (elts->start & 0x7) { - DRM_ERROR("misaligned buffer 0x%x\n", elts->start); - return -EINVAL; - } - if (elts->start < buf->used) { - DRM_ERROR("no header 0x%x - 0x%x\n", elts->start, buf->used); - return -EINVAL; - } - - buf->used = elts->end; - buf_priv->prim = elts->prim; - buf_priv->discard = elts->discard; - - r128_cce_dispatch_indices(dev, buf, elts->start, elts->end, count); - - COMMIT_RING(); - return 0; -} - -static int r128_cce_blit(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_device_dma *dma = dev->dma; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_blit_t *blit = data; - int ret; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - DRM_DEBUG("pid=%d index=%d\n", DRM_CURRENTPID, blit->idx); - - if (blit->idx < 0 || blit->idx >= dma->buf_count) { - DRM_ERROR("buffer index %d (of %d max)\n", - blit->idx, dma->buf_count - 1); - return -EINVAL; - } - - RING_SPACE_TEST_WITH_RETURN(dev_priv); - VB_AGE_TEST_WITH_RETURN(dev_priv); - - ret = r128_cce_dispatch_blit(dev, file_priv, blit); - - COMMIT_RING(); - return ret; -} - -static int r128_cce_depth(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_depth_t *depth = data; - int ret; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - RING_SPACE_TEST_WITH_RETURN(dev_priv); - - ret = -EINVAL; - switch (depth->func) { - case R128_WRITE_SPAN: - ret = r128_cce_dispatch_write_span(dev, depth); - break; - case R128_WRITE_PIXELS: - ret = r128_cce_dispatch_write_pixels(dev, depth); - break; - case R128_READ_SPAN: - ret = r128_cce_dispatch_read_span(dev, depth); - break; - case R128_READ_PIXELS: - ret = r128_cce_dispatch_read_pixels(dev, depth); - break; - } - - COMMIT_RING(); - return ret; -} - -static int r128_cce_stipple(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_stipple_t *stipple = data; - u32 mask[32]; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (DRM_COPY_FROM_USER(&mask, stipple->mask, 32 * sizeof(u32))) - return -EFAULT; - - RING_SPACE_TEST_WITH_RETURN(dev_priv); - - r128_cce_dispatch_stipple(dev, mask); - - COMMIT_RING(); - return 0; -} - -static int r128_cce_indirect(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - struct drm_device_dma *dma = dev->dma; - struct drm_buf *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_indirect_t *indirect = data; -#if 0 - RING_LOCALS; -#endif - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } - - DRM_DEBUG("idx=%d s=%d e=%d d=%d\n", - indirect->idx, indirect->start, indirect->end, - indirect->discard); - - if (indirect->idx < 0 || indirect->idx >= dma->buf_count) { - DRM_ERROR("buffer index %d (of %d max)\n", - indirect->idx, dma->buf_count - 1); - return -EINVAL; - } - - buf = dma->buflist[indirect->idx]; - buf_priv = buf->dev_private; - - if (buf->file_priv != file_priv) { - DRM_ERROR("process %d using buffer owned by %p\n", - DRM_CURRENTPID, buf->file_priv); - return -EINVAL; - } - if (buf->pending) { - DRM_ERROR("sending pending buffer %d\n", indirect->idx); - return -EINVAL; - } - - if (indirect->start < buf->used) { - DRM_ERROR("reusing indirect: start=0x%x actual=0x%x\n", - indirect->start, buf->used); - return -EINVAL; - } - - RING_SPACE_TEST_WITH_RETURN(dev_priv); - VB_AGE_TEST_WITH_RETURN(dev_priv); - - buf->used = indirect->end; - buf_priv->discard = indirect->discard; - -#if 0 - /* Wait for the 3D stream to idle before the indirect buffer - * containing 2D acceleration commands is processed. - */ - BEGIN_RING(2); - RADEON_WAIT_UNTIL_3D_IDLE(); - ADVANCE_RING(); -#endif - - /* Dispatch the indirect buffer full of commands from the - * X server. This is insecure and is thus only available to - * privileged clients. - */ - r128_cce_dispatch_indirect(dev, buf, indirect->start, indirect->end); - - COMMIT_RING(); - return 0; -} - -static int r128_getparam(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_getparam_t *param = data; - int value; - - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } - - DRM_DEBUG("pid=%d\n", DRM_CURRENTPID); - - switch (param->param) { - case R128_PARAM_IRQ_NR: - value = dev->irq; - break; - default: - return -EINVAL; - } - - if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) { - DRM_ERROR("copy_to_user\n"); - return -EFAULT; - } - - return 0; -} - -void r128_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) -{ - if (dev->dev_private) { - drm_r128_private_t *dev_priv = dev->dev_private; - if (dev_priv->page_flipping) { - r128_do_cleanup_pageflip(dev); - } - } -} - -void r128_driver_lastclose(struct drm_device * dev) -{ - r128_do_cleanup_cce(dev); -} - -struct drm_ioctl_desc r128_ioctls[] = { - DRM_IOCTL_DEF(DRM_R128_INIT, r128_cce_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_R128_CCE_START, r128_cce_start, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_R128_CCE_STOP, r128_cce_stop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_R128_CCE_RESET, r128_cce_reset, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_R128_CCE_IDLE, r128_cce_idle, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_RESET, r128_engine_reset, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_FULLSCREEN, r128_fullscreen, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_SWAP, r128_cce_swap, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_FLIP, r128_cce_flip, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_CLEAR, r128_cce_clear, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_VERTEX, r128_cce_vertex, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_INDICES, r128_cce_indices, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_BLIT, r128_cce_blit, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_DEPTH, r128_cce_depth, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_STIPPLE, r128_cce_stipple, DRM_AUTH), - DRM_IOCTL_DEF(DRM_R128_INDIRECT, r128_cce_indirect, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_R128_GETPARAM, r128_getparam, DRM_AUTH), -}; - -int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls); diff --git a/sys/dev/drm/savage_bci.c b/sys/dev/drm/savage_bci.c deleted file mode 100644 index 173993e9f99a..000000000000 --- a/sys/dev/drm/savage_bci.c +++ /dev/null @@ -1,1095 +0,0 @@ -/* savage_bci.c -- BCI support for Savage - * - * Copyright 2004 Felix Kuehling - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF - * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); -#include "dev/drm/drmP.h" -#include "dev/drm/savage_drm.h" -#include "dev/drm/savage_drv.h" - -/* Need a long timeout for shadow status updates can take a while - * and so can waiting for events when the queue is full. */ -#define SAVAGE_DEFAULT_USEC_TIMEOUT 1000000 /* 1s */ -#define SAVAGE_EVENT_USEC_TIMEOUT 5000000 /* 5s */ -#define SAVAGE_FREELIST_DEBUG 0 - -static int savage_do_cleanup_bci(struct drm_device *dev); - -static int -savage_bci_wait_fifo_shadow(drm_savage_private_t *dev_priv, unsigned int n) -{ - uint32_t mask = dev_priv->status_used_mask; - uint32_t threshold = dev_priv->bci_threshold_hi; - uint32_t status; - int i; - -#if SAVAGE_BCI_DEBUG - if (n > dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - threshold) - DRM_ERROR("Trying to emit %d words " - "(more than guaranteed space in COB)\n", n); -#endif - - for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) { - DRM_MEMORYBARRIER(); - status = dev_priv->status_ptr[0]; - if ((status & mask) < threshold) - return 0; - DRM_UDELAY(1); - } - -#if SAVAGE_BCI_DEBUG - DRM_ERROR("failed!\n"); - DRM_INFO(" status=0x%08x, threshold=0x%08x\n", status, threshold); -#endif - return -EBUSY; -} - -static int -savage_bci_wait_fifo_s3d(drm_savage_private_t *dev_priv, unsigned int n) -{ - uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n; - uint32_t status; - int i; - - for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) { - status = SAVAGE_READ(SAVAGE_STATUS_WORD0); - if ((status & SAVAGE_FIFO_USED_MASK_S3D) <= maxUsed) - return 0; - DRM_UDELAY(1); - } - -#if SAVAGE_BCI_DEBUG - DRM_ERROR("failed!\n"); - DRM_INFO(" status=0x%08x\n", status); -#endif - return -EBUSY; -} - -static int -savage_bci_wait_fifo_s4(drm_savage_private_t *dev_priv, unsigned int n) -{ - uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n; - uint32_t status; - int i; - - for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) { - status = SAVAGE_READ(SAVAGE_ALT_STATUS_WORD0); - if ((status & SAVAGE_FIFO_USED_MASK_S4) <= maxUsed) - return 0; - DRM_UDELAY(1); - } - -#if SAVAGE_BCI_DEBUG - DRM_ERROR("failed!\n"); - DRM_INFO(" status=0x%08x\n", status); -#endif - return -EBUSY; -} - -/* - * Waiting for events. - * - * The BIOSresets the event tag to 0 on mode changes. Therefore we - * never emit 0 to the event tag. If we find a 0 event tag we know the - * BIOS stomped on it and return success assuming that the BIOS waited - * for engine idle. - * - * Note: if the Xserver uses the event tag it has to follow the same - * rule. Otherwise there may be glitches every 2^16 events. - */ -static int -savage_bci_wait_event_shadow(drm_savage_private_t *dev_priv, uint16_t e) -{ - uint32_t status; - int i; - - for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) { - DRM_MEMORYBARRIER(); - status = dev_priv->status_ptr[1]; - if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff || - (status & 0xffff) == 0) - return 0; - DRM_UDELAY(1); - } - -#if SAVAGE_BCI_DEBUG - DRM_ERROR("failed!\n"); - DRM_INFO(" status=0x%08x, e=0x%04x\n", status, e); -#endif - - return -EBUSY; -} - -static int -savage_bci_wait_event_reg(drm_savage_private_t *dev_priv, uint16_t e) -{ - uint32_t status; - int i; - - for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) { - status = SAVAGE_READ(SAVAGE_STATUS_WORD1); - if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff || - (status & 0xffff) == 0) - return 0; - DRM_UDELAY(1); - } - -#if SAVAGE_BCI_DEBUG - DRM_ERROR("failed!\n"); - DRM_INFO(" status=0x%08x, e=0x%04x\n", status, e); -#endif - - return -EBUSY; -} - -uint16_t savage_bci_emit_event(drm_savage_private_t *dev_priv, - unsigned int flags) -{ - uint16_t count; - BCI_LOCALS; - - if (dev_priv->status_ptr) { - /* coordinate with Xserver */ - count = dev_priv->status_ptr[1023]; - if (count < dev_priv->event_counter) - dev_priv->event_wrap++; - } else { - count = dev_priv->event_counter; - } - count = (count + 1) & 0xffff; - if (count == 0) { - count++; /* See the comment above savage_wait_event_*. */ - dev_priv->event_wrap++; - } - dev_priv->event_counter = count; - if (dev_priv->status_ptr) - dev_priv->status_ptr[1023] = (uint32_t)count; - - if ((flags & (SAVAGE_WAIT_2D | SAVAGE_WAIT_3D))) { - unsigned int wait_cmd = BCI_CMD_WAIT; - if ((flags & SAVAGE_WAIT_2D)) - wait_cmd |= BCI_CMD_WAIT_2D; - if ((flags & SAVAGE_WAIT_3D)) - wait_cmd |= BCI_CMD_WAIT_3D; - BEGIN_BCI(2); - BCI_WRITE(wait_cmd); - } else { - BEGIN_BCI(1); - } - BCI_WRITE(BCI_CMD_UPDATE_EVENT_TAG | (uint32_t)count); - - return count; -} - -/* - * Freelist management - */ -static int savage_freelist_init(struct drm_device *dev) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - struct drm_device_dma *dma = dev->dma; - struct drm_buf *buf; - drm_savage_buf_priv_t *entry; - int i; - DRM_DEBUG("count=%d\n", dma->buf_count); - - dev_priv->head.next = &dev_priv->tail; - dev_priv->head.prev = NULL; - dev_priv->head.buf = NULL; - - dev_priv->tail.next = NULL; - dev_priv->tail.prev = &dev_priv->head; - dev_priv->tail.buf = NULL; - - for (i = 0; i < dma->buf_count; i++) { - buf = dma->buflist[i]; - entry = buf->dev_private; - - SET_AGE(&entry->age, 0, 0); - entry->buf = buf; - - entry->next = dev_priv->head.next; - entry->prev = &dev_priv->head; - dev_priv->head.next->prev = entry; - dev_priv->head.next = entry; - } - - return 0; -} - -static struct drm_buf *savage_freelist_get(struct drm_device *dev) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - drm_savage_buf_priv_t *tail = dev_priv->tail.prev; - uint16_t event; - unsigned int wrap; - DRM_DEBUG("\n"); - - UPDATE_EVENT_COUNTER(); - if (dev_priv->status_ptr) - event = dev_priv->status_ptr[1] & 0xffff; - else - event = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff; - wrap = dev_priv->event_wrap; - if (event > dev_priv->event_counter) - wrap--; /* hardware hasn't passed the last wrap yet */ - - DRM_DEBUG(" tail=0x%04x %d\n", tail->age.event, tail->age.wrap); - DRM_DEBUG(" head=0x%04x %d\n", event, wrap); - - if (tail->buf && (TEST_AGE(&tail->age, event, wrap) || event == 0)) { - drm_savage_buf_priv_t *next = tail->next; - drm_savage_buf_priv_t *prev = tail->prev; - prev->next = next; - next->prev = prev; - tail->next = tail->prev = NULL; - return tail->buf; - } - - DRM_DEBUG("returning NULL, tail->buf=%p!\n", tail->buf); - return NULL; -} - -void savage_freelist_put(struct drm_device *dev, struct drm_buf *buf) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - drm_savage_buf_priv_t *entry = buf->dev_private, *prev, *next; - - DRM_DEBUG("age=0x%04x wrap=%d\n", entry->age.event, entry->age.wrap); - - if (entry->next != NULL || entry->prev != NULL) { - DRM_ERROR("entry already on freelist.\n"); - return; - } - - prev = &dev_priv->head; - next = prev->next; - prev->next = entry; - next->prev = entry; - entry->prev = prev; - entry->next = next; -} - -/* - * Command DMA - */ -static int savage_dma_init(drm_savage_private_t *dev_priv) -{ - unsigned int i; - - dev_priv->nr_dma_pages = dev_priv->cmd_dma->size / - (SAVAGE_DMA_PAGE_SIZE*4); - dev_priv->dma_pages = drm_alloc(sizeof(drm_savage_dma_page_t) * - dev_priv->nr_dma_pages, DRM_MEM_DRIVER); - if (dev_priv->dma_pages == NULL) - return -ENOMEM; - - for (i = 0; i < dev_priv->nr_dma_pages; ++i) { - SET_AGE(&dev_priv->dma_pages[i].age, 0, 0); - dev_priv->dma_pages[i].used = 0; - dev_priv->dma_pages[i].flushed = 0; - } - SET_AGE(&dev_priv->last_dma_age, 0, 0); - - dev_priv->first_dma_page = 0; - dev_priv->current_dma_page = 0; - - return 0; -} - -void savage_dma_reset(drm_savage_private_t *dev_priv) -{ - uint16_t event; - unsigned int wrap, i; - event = savage_bci_emit_event(dev_priv, 0); - wrap = dev_priv->event_wrap; - for (i = 0; i < dev_priv->nr_dma_pages; ++i) { - SET_AGE(&dev_priv->dma_pages[i].age, event, wrap); - dev_priv->dma_pages[i].used = 0; - dev_priv->dma_pages[i].flushed = 0; - } - SET_AGE(&dev_priv->last_dma_age, event, wrap); - dev_priv->first_dma_page = dev_priv->current_dma_page = 0; -} - -void savage_dma_wait(drm_savage_private_t *dev_priv, unsigned int page) -{ - uint16_t event; - unsigned int wrap; - - /* Faked DMA buffer pages don't age. */ - if (dev_priv->cmd_dma == &dev_priv->fake_dma) - return; - - UPDATE_EVENT_COUNTER(); - if (dev_priv->status_ptr) - event = dev_priv->status_ptr[1] & 0xffff; - else - event = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff; - wrap = dev_priv->event_wrap; - if (event > dev_priv->event_counter) - wrap--; /* hardware hasn't passed the last wrap yet */ - - if (dev_priv->dma_pages[page].age.wrap > wrap || - (dev_priv->dma_pages[page].age.wrap == wrap && - dev_priv->dma_pages[page].age.event > event)) { - if (dev_priv->wait_evnt(dev_priv, - dev_priv->dma_pages[page].age.event) - < 0) - DRM_ERROR("wait_evnt failed!\n"); - } -} - -uint32_t *savage_dma_alloc(drm_savage_private_t *dev_priv, unsigned int n) -{ - unsigned int cur = dev_priv->current_dma_page; - unsigned int rest = SAVAGE_DMA_PAGE_SIZE - - dev_priv->dma_pages[cur].used; - unsigned int nr_pages = (n - rest + SAVAGE_DMA_PAGE_SIZE - 1) / - SAVAGE_DMA_PAGE_SIZE; - uint32_t *dma_ptr; - unsigned int i; - - DRM_DEBUG("cur=%u, cur->used=%u, n=%u, rest=%u, nr_pages=%u\n", - cur, dev_priv->dma_pages[cur].used, n, rest, nr_pages); - - if (cur + nr_pages < dev_priv->nr_dma_pages) { - dma_ptr = (uint32_t *)dev_priv->cmd_dma->virtual + - cur * SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used; - if (n < rest) - rest = n; - dev_priv->dma_pages[cur].used += rest; - n -= rest; - cur++; - } else { - dev_priv->dma_flush(dev_priv); - nr_pages = - (n + SAVAGE_DMA_PAGE_SIZE - 1) / SAVAGE_DMA_PAGE_SIZE; - for (i = cur; i < dev_priv->nr_dma_pages; ++i) { - dev_priv->dma_pages[i].age = dev_priv->last_dma_age; - dev_priv->dma_pages[i].used = 0; - dev_priv->dma_pages[i].flushed = 0; - } - dma_ptr = (uint32_t *)dev_priv->cmd_dma->virtual; - dev_priv->first_dma_page = cur = 0; - } - for (i = cur; nr_pages > 0; ++i, --nr_pages) { -#if SAVAGE_DMA_DEBUG - if (dev_priv->dma_pages[i].used) { - DRM_ERROR("unflushed page %u: used=%u\n", - i, dev_priv->dma_pages[i].used); - } -#endif - if (n > SAVAGE_DMA_PAGE_SIZE) - dev_priv->dma_pages[i].used = SAVAGE_DMA_PAGE_SIZE; - else - dev_priv->dma_pages[i].used = n; - n -= SAVAGE_DMA_PAGE_SIZE; - } - dev_priv->current_dma_page = --i; - - DRM_DEBUG("cur=%u, cur->used=%u, n=%u\n", - i, dev_priv->dma_pages[i].used, n); - - savage_dma_wait(dev_priv, dev_priv->current_dma_page); - - return dma_ptr; -} - -static void savage_dma_flush(drm_savage_private_t *dev_priv) -{ - unsigned int first = dev_priv->first_dma_page; - unsigned int cur = dev_priv->current_dma_page; - uint16_t event; - unsigned int wrap, pad, align, len, i; - unsigned long phys_addr; - BCI_LOCALS; - - if (first == cur && - dev_priv->dma_pages[cur].used == dev_priv->dma_pages[cur].flushed) - return; - - /* pad length to multiples of 2 entries - * align start of next DMA block to multiles of 8 entries */ - pad = -dev_priv->dma_pages[cur].used & 1; - align = -(dev_priv->dma_pages[cur].used + pad) & 7; - - DRM_DEBUG("first=%u, cur=%u, first->flushed=%u, cur->used=%u, " - "pad=%u, align=%u\n", - first, cur, dev_priv->dma_pages[first].flushed, - dev_priv->dma_pages[cur].used, pad, align); - - /* pad with noops */ - if (pad) { - uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->virtual + - cur * SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used; - dev_priv->dma_pages[cur].used += pad; - while (pad != 0) { - *dma_ptr++ = BCI_CMD_WAIT; - pad--; - } - } - - DRM_MEMORYBARRIER(); - - /* do flush ... */ - phys_addr = dev_priv->cmd_dma->offset + - (first * SAVAGE_DMA_PAGE_SIZE + - dev_priv->dma_pages[first].flushed) * 4; - len = (cur - first) * SAVAGE_DMA_PAGE_SIZE + - dev_priv->dma_pages[cur].used - dev_priv->dma_pages[first].flushed; - - DRM_DEBUG("phys_addr=%lx, len=%u\n", - phys_addr | dev_priv->dma_type, len); - - BEGIN_BCI(3); - BCI_SET_REGISTERS(SAVAGE_DMABUFADDR, 1); - BCI_WRITE(phys_addr | dev_priv->dma_type); - BCI_DMA(len); - - /* fix alignment of the start of the next block */ - dev_priv->dma_pages[cur].used += align; - - /* age DMA pages */ - event = savage_bci_emit_event(dev_priv, 0); - wrap = dev_priv->event_wrap; - for (i = first; i < cur; ++i) { - SET_AGE(&dev_priv->dma_pages[i].age, event, wrap); - dev_priv->dma_pages[i].used = 0; - dev_priv->dma_pages[i].flushed = 0; - } - /* age the current page only when it's full */ - if (dev_priv->dma_pages[cur].used == SAVAGE_DMA_PAGE_SIZE) { - SET_AGE(&dev_priv->dma_pages[cur].age, event, wrap); - dev_priv->dma_pages[cur].used = 0; - dev_priv->dma_pages[cur].flushed = 0; - /* advance to next page */ - cur++; - if (cur == dev_priv->nr_dma_pages) - cur = 0; - dev_priv->first_dma_page = dev_priv->current_dma_page = cur; - } else { - dev_priv->first_dma_page = cur; - dev_priv->dma_pages[cur].flushed = dev_priv->dma_pages[i].used; - } - SET_AGE(&dev_priv->last_dma_age, event, wrap); - - DRM_DEBUG("first=cur=%u, cur->used=%u, cur->flushed=%u\n", cur, - dev_priv->dma_pages[cur].used, - dev_priv->dma_pages[cur].flushed); -} - -static void savage_fake_dma_flush(drm_savage_private_t *dev_priv) -{ - unsigned int i, j; - BCI_LOCALS; - - if (dev_priv->first_dma_page == dev_priv->current_dma_page && - dev_priv->dma_pages[dev_priv->current_dma_page].used == 0) - return; - - DRM_DEBUG("first=%u, cur=%u, cur->used=%u\n", - dev_priv->first_dma_page, dev_priv->current_dma_page, - dev_priv->dma_pages[dev_priv->current_dma_page].used); - - for (i = dev_priv->first_dma_page; - i <= dev_priv->current_dma_page && dev_priv->dma_pages[i].used; - ++i) { - uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->virtual + - i * SAVAGE_DMA_PAGE_SIZE; -#if SAVAGE_DMA_DEBUG - /* Sanity check: all pages except the last one must be full. */ - if (i < dev_priv->current_dma_page && - dev_priv->dma_pages[i].used != SAVAGE_DMA_PAGE_SIZE) { - DRM_ERROR("partial DMA page %u: used=%u", - i, dev_priv->dma_pages[i].used); - } -#endif - BEGIN_BCI(dev_priv->dma_pages[i].used); - for (j = 0; j < dev_priv->dma_pages[i].used; ++j) { - BCI_WRITE(dma_ptr[j]); - } - dev_priv->dma_pages[i].used = 0; - } - - /* reset to first page */ - dev_priv->first_dma_page = dev_priv->current_dma_page = 0; -} - -int savage_driver_load(struct drm_device *dev, unsigned long chipset) -{ - drm_savage_private_t *dev_priv; - - dev_priv = drm_alloc(sizeof(drm_savage_private_t), DRM_MEM_DRIVER); - if (dev_priv == NULL) - return -ENOMEM; - - memset(dev_priv, 0, sizeof(drm_savage_private_t)); - dev->dev_private = (void *)dev_priv; - - dev_priv->chipset = (enum savage_family)chipset; - - return 0; -} - -/* - * Initialize mappings. On Savage4 and SavageIX the alignment - * and size of the aperture is not suitable for automatic MTRR setup - * in drm_addmap. Therefore we add them manually before the maps are - * initialized, and tear them down on last close. - */ -int savage_driver_firstopen(struct drm_device *dev) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - unsigned long mmio_base, fb_base, fb_size, aperture_base; - /* fb_rsrc and aper_rsrc aren't really used currently, but still exist - * in case we decide we need information on the BAR for BSD in the - * future. - */ - unsigned int fb_rsrc, aper_rsrc; - int ret = 0; - - dev_priv->mtrr[0].handle = -1; - dev_priv->mtrr[1].handle = -1; - dev_priv->mtrr[2].handle = -1; - if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - fb_rsrc = 0; - fb_base = drm_get_resource_start(dev, 0); - fb_size = SAVAGE_FB_SIZE_S3; - mmio_base = fb_base + SAVAGE_FB_SIZE_S3; - aper_rsrc = 0; - aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; - /* this should always be true */ - if (drm_get_resource_len(dev, 0) == 0x08000000) { - /* Don't make MMIO write-cobining! We need 3 - * MTRRs. */ - dev_priv->mtrr[0].base = fb_base; - dev_priv->mtrr[0].size = 0x01000000; - dev_priv->mtrr[0].handle = - drm_mtrr_add(dev_priv->mtrr[0].base, - dev_priv->mtrr[0].size, DRM_MTRR_WC); - dev_priv->mtrr[1].base = fb_base + 0x02000000; - dev_priv->mtrr[1].size = 0x02000000; - dev_priv->mtrr[1].handle = - drm_mtrr_add(dev_priv->mtrr[1].base, - dev_priv->mtrr[1].size, DRM_MTRR_WC); - dev_priv->mtrr[2].base = fb_base + 0x04000000; - dev_priv->mtrr[2].size = 0x04000000; - dev_priv->mtrr[2].handle = - drm_mtrr_add(dev_priv->mtrr[2].base, - dev_priv->mtrr[2].size, DRM_MTRR_WC); - } else { - DRM_ERROR("strange pci_resource_len %08lx\n", - drm_get_resource_len(dev, 0)); - } - } else if (dev_priv->chipset != S3_SUPERSAVAGE && - dev_priv->chipset != S3_SAVAGE2000) { - mmio_base = drm_get_resource_start(dev, 0); - fb_rsrc = 1; - fb_base = drm_get_resource_start(dev, 1); - fb_size = SAVAGE_FB_SIZE_S4; - aper_rsrc = 1; - aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; - /* this should always be true */ - if (drm_get_resource_len(dev, 1) == 0x08000000) { - /* Can use one MTRR to cover both fb and - * aperture. */ - dev_priv->mtrr[0].base = fb_base; - dev_priv->mtrr[0].size = 0x08000000; - dev_priv->mtrr[0].handle = - drm_mtrr_add(dev_priv->mtrr[0].base, - dev_priv->mtrr[0].size, DRM_MTRR_WC); - } else { - DRM_ERROR("strange pci_resource_len %08lx\n", - drm_get_resource_len(dev, 1)); - } - } else { - mmio_base = drm_get_resource_start(dev, 0); - fb_rsrc = 1; - fb_base = drm_get_resource_start(dev, 1); - fb_size = drm_get_resource_len(dev, 1); - aper_rsrc = 2; - aperture_base = drm_get_resource_start(dev, 2); - /* Automatic MTRR setup will do the right thing. */ - } - - ret = drm_addmap(dev, mmio_base, SAVAGE_MMIO_SIZE, _DRM_REGISTERS, - _DRM_READ_ONLY, &dev_priv->mmio); - if (ret) - return ret; - - ret = drm_addmap(dev, fb_base, fb_size, _DRM_FRAME_BUFFER, - _DRM_WRITE_COMBINING, &dev_priv->fb); - if (ret) - return ret; - - ret = drm_addmap(dev, aperture_base, SAVAGE_APERTURE_SIZE, - _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING, - &dev_priv->aperture); - if (ret) - return ret; - - return ret; -} - -/* - * Delete MTRRs and free device-private data. - */ -void savage_driver_lastclose(struct drm_device *dev) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - int i; - - for (i = 0; i < 3; ++i) - if (dev_priv->mtrr[i].handle >= 0) - drm_mtrr_del(dev_priv->mtrr[i].handle, - dev_priv->mtrr[i].base, - dev_priv->mtrr[i].size, DRM_MTRR_WC); -} - -int savage_driver_unload(struct drm_device *dev) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - - drm_free(dev_priv, sizeof(drm_savage_private_t), DRM_MEM_DRIVER); - - return 0; -} - -static int savage_do_init_bci(struct drm_device *dev, drm_savage_init_t *init) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - - if (init->fb_bpp != 16 && init->fb_bpp != 32) { - DRM_ERROR("invalid frame buffer bpp %d!\n", init->fb_bpp); - return -EINVAL; - } - if (init->depth_bpp != 16 && init->depth_bpp != 32) { - DRM_ERROR("invalid depth buffer bpp %d!\n", init->fb_bpp); - return -EINVAL; - } - if (init->dma_type != SAVAGE_DMA_AGP && - init->dma_type != SAVAGE_DMA_PCI) { - DRM_ERROR("invalid dma memory type %d!\n", init->dma_type); - return -EINVAL; - } - - dev_priv->cob_size = init->cob_size; - dev_priv->bci_threshold_lo = init->bci_threshold_lo; - dev_priv->bci_threshold_hi = init->bci_threshold_hi; - dev_priv->dma_type = init->dma_type; - - dev_priv->fb_bpp = init->fb_bpp; - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - dev_priv->depth_bpp = init->depth_bpp; - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - - dev_priv->texture_offset = init->texture_offset; - dev_priv->texture_size = init->texture_size; - - dev_priv->sarea = drm_getsarea(dev); - if (!dev_priv->sarea) { - DRM_ERROR("could not find sarea!\n"); - savage_do_cleanup_bci(dev); - return -EINVAL; - } - if (init->status_offset != 0) { - dev_priv->status = drm_core_findmap(dev, init->status_offset); - if (!dev_priv->status) { - DRM_ERROR("could not find shadow status region!\n"); - savage_do_cleanup_bci(dev); - return -EINVAL; - } - } else { - dev_priv->status = NULL; - } - if (dev_priv->dma_type == SAVAGE_DMA_AGP && init->buffers_offset) { - dev->agp_buffer_token = init->buffers_offset; - dev->agp_buffer_map = drm_core_findmap(dev, - init->buffers_offset); - if (!dev->agp_buffer_map) { - DRM_ERROR("could not find DMA buffer region!\n"); - savage_do_cleanup_bci(dev); - return -EINVAL; - } - drm_core_ioremap(dev->agp_buffer_map, dev); - if (!dev->agp_buffer_map) { - DRM_ERROR("failed to ioremap DMA buffer region!\n"); - savage_do_cleanup_bci(dev); - return -ENOMEM; - } - } - if (init->agp_textures_offset) { - dev_priv->agp_textures = - drm_core_findmap(dev, init->agp_textures_offset); - if (!dev_priv->agp_textures) { - DRM_ERROR("could not find agp texture region!\n"); - savage_do_cleanup_bci(dev); - return -EINVAL; - } - } else { - dev_priv->agp_textures = NULL; - } - - if (init->cmd_dma_offset) { - if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - DRM_ERROR("command DMA not supported on " - "Savage3D/MX/IX.\n"); - savage_do_cleanup_bci(dev); - return -EINVAL; - } - if (dev->dma && dev->dma->buflist) { - DRM_ERROR("command and vertex DMA not supported " - "at the same time.\n"); - savage_do_cleanup_bci(dev); - return -EINVAL; - } - dev_priv->cmd_dma = drm_core_findmap(dev, init->cmd_dma_offset); - if (!dev_priv->cmd_dma) { - DRM_ERROR("could not find command DMA region!\n"); - savage_do_cleanup_bci(dev); - return -EINVAL; - } - if (dev_priv->dma_type == SAVAGE_DMA_AGP) { - if (dev_priv->cmd_dma->type != _DRM_AGP) { - DRM_ERROR("AGP command DMA region is not a " - "_DRM_AGP map!\n"); - savage_do_cleanup_bci(dev); - return -EINVAL; - } - drm_core_ioremap(dev_priv->cmd_dma, dev); - if (!dev_priv->cmd_dma->virtual) { - DRM_ERROR("failed to ioremap command " - "DMA region!\n"); - savage_do_cleanup_bci(dev); - return -ENOMEM; - } - } else if (dev_priv->cmd_dma->type != _DRM_CONSISTENT) { - DRM_ERROR("PCI command DMA region is not a " - "_DRM_CONSISTENT map!\n"); - savage_do_cleanup_bci(dev); - return -EINVAL; - } - } else { - dev_priv->cmd_dma = NULL; - } - - dev_priv->dma_flush = savage_dma_flush; - if (!dev_priv->cmd_dma) { - DRM_DEBUG("falling back to faked command DMA.\n"); - dev_priv->fake_dma.offset = 0; - dev_priv->fake_dma.size = SAVAGE_FAKE_DMA_SIZE; - dev_priv->fake_dma.type = _DRM_SHM; - dev_priv->fake_dma.virtual = drm_alloc(SAVAGE_FAKE_DMA_SIZE, - DRM_MEM_DRIVER); - if (!dev_priv->fake_dma.virtual) { - DRM_ERROR("could not allocate faked DMA buffer!\n"); - savage_do_cleanup_bci(dev); - return -ENOMEM; - } - dev_priv->cmd_dma = &dev_priv->fake_dma; - dev_priv->dma_flush = savage_fake_dma_flush; - } - - dev_priv->sarea_priv = - (drm_savage_sarea_t *)((uint8_t *)dev_priv->sarea->virtual + - init->sarea_priv_offset); - - /* setup bitmap descriptors */ - { - unsigned int color_tile_format; - unsigned int depth_tile_format; - unsigned int front_stride, back_stride, depth_stride; - if (dev_priv->chipset <= S3_SAVAGE4) { - color_tile_format = dev_priv->fb_bpp == 16 ? - SAVAGE_BD_TILE_16BPP : SAVAGE_BD_TILE_32BPP; - depth_tile_format = dev_priv->depth_bpp == 16 ? - SAVAGE_BD_TILE_16BPP : SAVAGE_BD_TILE_32BPP; - } else { - color_tile_format = SAVAGE_BD_TILE_DEST; - depth_tile_format = SAVAGE_BD_TILE_DEST; - } - front_stride = dev_priv->front_pitch / (dev_priv->fb_bpp / 8); - back_stride = dev_priv->back_pitch / (dev_priv->fb_bpp / 8); - depth_stride = - dev_priv->depth_pitch / (dev_priv->depth_bpp / 8); - - dev_priv->front_bd = front_stride | SAVAGE_BD_BW_DISABLE | - (dev_priv->fb_bpp << SAVAGE_BD_BPP_SHIFT) | - (color_tile_format << SAVAGE_BD_TILE_SHIFT); - - dev_priv-> back_bd = back_stride | SAVAGE_BD_BW_DISABLE | - (dev_priv->fb_bpp << SAVAGE_BD_BPP_SHIFT) | - (color_tile_format << SAVAGE_BD_TILE_SHIFT); - - dev_priv->depth_bd = depth_stride | SAVAGE_BD_BW_DISABLE | - (dev_priv->depth_bpp << SAVAGE_BD_BPP_SHIFT) | - (depth_tile_format << SAVAGE_BD_TILE_SHIFT); - } - - /* setup status and bci ptr */ - dev_priv->event_counter = 0; - dev_priv->event_wrap = 0; - dev_priv->bci_ptr = (volatile uint32_t *) - ((uint8_t *)dev_priv->mmio->virtual + SAVAGE_BCI_OFFSET); - if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - dev_priv->status_used_mask = SAVAGE_FIFO_USED_MASK_S3D; - } else { - dev_priv->status_used_mask = SAVAGE_FIFO_USED_MASK_S4; - } - if (dev_priv->status != NULL) { - dev_priv->status_ptr = - (volatile uint32_t *)dev_priv->status->virtual; - dev_priv->wait_fifo = savage_bci_wait_fifo_shadow; - dev_priv->wait_evnt = savage_bci_wait_event_shadow; - dev_priv->status_ptr[1023] = dev_priv->event_counter; - } else { - dev_priv->status_ptr = NULL; - if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - dev_priv->wait_fifo = savage_bci_wait_fifo_s3d; - } else { - dev_priv->wait_fifo = savage_bci_wait_fifo_s4; - } - dev_priv->wait_evnt = savage_bci_wait_event_reg; - } - - /* cliprect functions */ - if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) - dev_priv->emit_clip_rect = savage_emit_clip_rect_s3d; - else - dev_priv->emit_clip_rect = savage_emit_clip_rect_s4; - - if (savage_freelist_init(dev) < 0) { - DRM_ERROR("could not initialize freelist\n"); - savage_do_cleanup_bci(dev); - return -ENOMEM; - } - - if (savage_dma_init(dev_priv) < 0) { - DRM_ERROR("could not initialize command DMA\n"); - savage_do_cleanup_bci(dev); - return -ENOMEM; - } - - return 0; -} - -static int savage_do_cleanup_bci(struct drm_device *dev) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - - if (dev_priv->cmd_dma == &dev_priv->fake_dma) { - if (dev_priv->fake_dma.virtual) - drm_free(dev_priv->fake_dma.virtual, - SAVAGE_FAKE_DMA_SIZE, DRM_MEM_DRIVER); - } else if (dev_priv->cmd_dma && dev_priv->cmd_dma->virtual && - dev_priv->cmd_dma->type == _DRM_AGP && - dev_priv->dma_type == SAVAGE_DMA_AGP) - drm_core_ioremapfree(dev_priv->cmd_dma, dev); - - if (dev_priv->dma_type == SAVAGE_DMA_AGP && - dev->agp_buffer_map && dev->agp_buffer_map->virtual) { - drm_core_ioremapfree(dev->agp_buffer_map, dev); - /* make sure the next instance (which may be running - * in PCI mode) doesn't try to use an old - * agp_buffer_map. */ - dev->agp_buffer_map = NULL; - } - - if (dev_priv->dma_pages) - drm_free(dev_priv->dma_pages, - sizeof(drm_savage_dma_page_t)*dev_priv->nr_dma_pages, - DRM_MEM_DRIVER); - - return 0; -} - -static int savage_bci_init(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_savage_init_t *init = data; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - switch (init->func) { - case SAVAGE_INIT_BCI: - return savage_do_init_bci(dev, init); - case SAVAGE_CLEANUP_BCI: - return savage_do_cleanup_bci(dev); - } - - return -EINVAL; -} - -static int savage_bci_event_emit(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - drm_savage_event_emit_t *event = data; - - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - event->count = savage_bci_emit_event(dev_priv, event->flags); - event->count |= dev_priv->event_wrap << 16; - - return 0; -} - -static int savage_bci_event_wait(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - drm_savage_event_wait_t *event = data; - unsigned int event_e, hw_e; - unsigned int event_w, hw_w; - - DRM_DEBUG("\n"); - - UPDATE_EVENT_COUNTER(); - if (dev_priv->status_ptr) - hw_e = dev_priv->status_ptr[1] & 0xffff; - else - hw_e = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff; - hw_w = dev_priv->event_wrap; - if (hw_e > dev_priv->event_counter) - hw_w--; /* hardware hasn't passed the last wrap yet */ - - event_e = event->count & 0xffff; - event_w = event->count >> 16; - - /* Don't need to wait if - * - event counter wrapped since the event was emitted or - * - the hardware has advanced up to or over the event to wait for. - */ - if (event_w < hw_w || (event_w == hw_w && event_e <= hw_e)) - return 0; - else - return dev_priv->wait_evnt(dev_priv, event_e); -} - -/* - * DMA buffer management - */ - -static int savage_bci_get_buffers(struct drm_device *dev, - struct drm_file *file_priv, - struct drm_dma *d) -{ - struct drm_buf *buf; - int i; - - for (i = d->granted_count; i < d->request_count; i++) { - buf = savage_freelist_get(dev); - if (!buf) - return -EAGAIN; - - buf->file_priv = file_priv; - - if (DRM_COPY_TO_USER(&d->request_indices[i], - &buf->idx, sizeof(buf->idx))) - return -EFAULT; - if (DRM_COPY_TO_USER(&d->request_sizes[i], - &buf->total, sizeof(buf->total))) - return -EFAULT; - - d->granted_count++; - } - return 0; -} - -int savage_bci_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - struct drm_device_dma *dma = dev->dma; - struct drm_dma *d = data; - int ret = 0; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - /* Please don't send us buffers. - */ - if (d->send_count != 0) { - DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n", - DRM_CURRENTPID, d->send_count); - return -EINVAL; - } - - /* We'll send you buffers. - */ - if (d->request_count < 0 || d->request_count > dma->buf_count) { - DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n", - DRM_CURRENTPID, d->request_count, dma->buf_count); - return -EINVAL; - } - - d->granted_count = 0; - - if (d->request_count) { - ret = savage_bci_get_buffers(dev, file_priv, d); - } - - return ret; -} - -void savage_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv) -{ - struct drm_device_dma *dma = dev->dma; - drm_savage_private_t *dev_priv = dev->dev_private; - int i; - - if (!dma) - return; - if (!dev_priv) - return; - if (!dma->buflist) - return; - - for (i = 0; i < dma->buf_count; i++) { - struct drm_buf *buf = dma->buflist[i]; - drm_savage_buf_priv_t *buf_priv = buf->dev_private; - - if (buf->file_priv == file_priv && buf_priv && - buf_priv->next == NULL && buf_priv->prev == NULL) { - uint16_t event; - DRM_DEBUG("reclaimed from client\n"); - event = savage_bci_emit_event(dev_priv, SAVAGE_WAIT_3D); - SET_AGE(&buf_priv->age, event, dev_priv->event_wrap); - savage_freelist_put(dev, buf); - } - } - - drm_core_reclaim_buffers(dev, file_priv); -} - -struct drm_ioctl_desc savage_ioctls[] = { - DRM_IOCTL_DEF(DRM_SAVAGE_BCI_INIT, savage_bci_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_SAVAGE_BCI_CMDBUF, savage_bci_cmdbuf, DRM_AUTH), - DRM_IOCTL_DEF(DRM_SAVAGE_BCI_EVENT_EMIT, savage_bci_event_emit, DRM_AUTH), - DRM_IOCTL_DEF(DRM_SAVAGE_BCI_EVENT_WAIT, savage_bci_event_wait, DRM_AUTH), -}; - -int savage_max_ioctl = DRM_ARRAY_SIZE(savage_ioctls); diff --git a/sys/dev/drm/savage_drm.h b/sys/dev/drm/savage_drm.h deleted file mode 100644 index 3655b5ec4ebc..000000000000 --- a/sys/dev/drm/savage_drm.h +++ /dev/null @@ -1,212 +0,0 @@ -/* savage_drm.h -- Public header for the savage driver - * - * Copyright 2004 Felix Kuehling - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF - * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __SAVAGE_DRM_H__ -#define __SAVAGE_DRM_H__ - -#ifndef __SAVAGE_SAREA_DEFINES__ -#define __SAVAGE_SAREA_DEFINES__ - -/* 2 heaps (1 for card, 1 for agp), each divided into up to 128 - * regions, subject to a minimum region size of (1<<16) == 64k. - * - * Clients may subdivide regions internally, but when sharing between - * clients, the region size is the minimum granularity. - */ - -#define SAVAGE_CARD_HEAP 0 -#define SAVAGE_AGP_HEAP 1 -#define SAVAGE_NR_TEX_HEAPS 2 -#define SAVAGE_NR_TEX_REGIONS 16 -#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16 - -#endif /* __SAVAGE_SAREA_DEFINES__ */ - -typedef struct _drm_savage_sarea { - /* LRU lists for texture memory in agp space and on the card. - */ - struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS+1]; - unsigned int texAge[SAVAGE_NR_TEX_HEAPS]; - - /* Mechanism to validate card state. - */ - int ctxOwner; -} drm_savage_sarea_t, *drm_savage_sarea_ptr; - -/* Savage-specific ioctls - */ -#define DRM_SAVAGE_BCI_INIT 0x00 -#define DRM_SAVAGE_BCI_CMDBUF 0x01 -#define DRM_SAVAGE_BCI_EVENT_EMIT 0x02 -#define DRM_SAVAGE_BCI_EVENT_WAIT 0x03 - -#define DRM_IOCTL_SAVAGE_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t) -#define DRM_IOCTL_SAVAGE_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t) -#define DRM_IOCTL_SAVAGE_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t) -#define DRM_IOCTL_SAVAGE_EVENT_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t) - -#define SAVAGE_DMA_PCI 1 -#define SAVAGE_DMA_AGP 3 -typedef struct drm_savage_init { - enum { - SAVAGE_INIT_BCI = 1, - SAVAGE_CLEANUP_BCI = 2 - } func; - unsigned int sarea_priv_offset; - - /* some parameters */ - unsigned int cob_size; - unsigned int bci_threshold_lo, bci_threshold_hi; - unsigned int dma_type; - - /* frame buffer layout */ - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - /* local textures */ - unsigned int texture_offset; - unsigned int texture_size; - - /* physical locations of non-permanent maps */ - unsigned long status_offset; - unsigned long buffers_offset; - unsigned long agp_textures_offset; - unsigned long cmd_dma_offset; -} drm_savage_init_t; - -typedef union drm_savage_cmd_header drm_savage_cmd_header_t; -typedef struct drm_savage_cmdbuf { - /* command buffer in client's address space */ - drm_savage_cmd_header_t __user *cmd_addr; - unsigned int size; /* size of the command buffer in 64bit units */ - - unsigned int dma_idx; /* DMA buffer index to use */ - int discard; /* discard DMA buffer when done */ - /* vertex buffer in client's address space */ - unsigned int __user *vb_addr; - unsigned int vb_size; /* size of client vertex buffer in bytes */ - unsigned int vb_stride; /* stride of vertices in 32bit words */ - /* boxes in client's address space */ - struct drm_clip_rect __user *box_addr; - unsigned int nbox; /* number of clipping boxes */ -} drm_savage_cmdbuf_t; - -#define SAVAGE_WAIT_2D 0x1 /* wait for 2D idle before updating event tag */ -#define SAVAGE_WAIT_3D 0x2 /* wait for 3D idle before updating event tag */ -#define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */ -typedef struct drm_savage_event { - unsigned int count; - unsigned int flags; -} drm_savage_event_emit_t, drm_savage_event_wait_t; - -/* Commands for the cmdbuf ioctl - */ -#define SAVAGE_CMD_STATE 0 /* a range of state registers */ -#define SAVAGE_CMD_DMA_PRIM 1 /* vertices from DMA buffer */ -#define SAVAGE_CMD_VB_PRIM 2 /* vertices from client vertex buffer */ -#define SAVAGE_CMD_DMA_IDX 3 /* indexed vertices from DMA buffer */ -#define SAVAGE_CMD_VB_IDX 4 /* indexed vertices client vertex buffer */ -#define SAVAGE_CMD_CLEAR 5 /* clear buffers */ -#define SAVAGE_CMD_SWAP 6 /* swap buffers */ - -/* Primitive types -*/ -#define SAVAGE_PRIM_TRILIST 0 /* triangle list */ -#define SAVAGE_PRIM_TRISTRIP 1 /* triangle strip */ -#define SAVAGE_PRIM_TRIFAN 2 /* triangle fan */ -#define SAVAGE_PRIM_TRILIST_201 3 /* reorder verts for correct flat - * shading on s3d */ - -/* Skip flags (vertex format) - */ -#define SAVAGE_SKIP_Z 0x01 -#define SAVAGE_SKIP_W 0x02 -#define SAVAGE_SKIP_C0 0x04 -#define SAVAGE_SKIP_C1 0x08 -#define SAVAGE_SKIP_S0 0x10 -#define SAVAGE_SKIP_T0 0x20 -#define SAVAGE_SKIP_ST0 0x30 -#define SAVAGE_SKIP_S1 0x40 -#define SAVAGE_SKIP_T1 0x80 -#define SAVAGE_SKIP_ST1 0xc0 -#define SAVAGE_SKIP_ALL_S3D 0x3f -#define SAVAGE_SKIP_ALL_S4 0xff - -/* Buffer names for clear command - */ -#define SAVAGE_FRONT 0x1 -#define SAVAGE_BACK 0x2 -#define SAVAGE_DEPTH 0x4 - -/* 64-bit command header - */ -union drm_savage_cmd_header { - struct { - unsigned char cmd; /* command */ - unsigned char pad0; - unsigned short pad1; - unsigned short pad2; - unsigned short pad3; - } cmd; /* generic */ - struct { - unsigned char cmd; - unsigned char global; /* need idle engine? */ - unsigned short count; /* number of consecutive registers */ - unsigned short start; /* first register */ - unsigned short pad3; - } state; /* SAVAGE_CMD_STATE */ - struct { - unsigned char cmd; - unsigned char prim; /* primitive type */ - unsigned short skip; /* vertex format (skip flags) */ - unsigned short count; /* number of vertices */ - unsigned short start; /* first vertex in DMA/vertex buffer */ - } prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */ - struct { - unsigned char cmd; - unsigned char prim; - unsigned short skip; - unsigned short count; /* number of indices that follow */ - unsigned short pad3; - } idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */ - struct { - unsigned char cmd; - unsigned char pad0; - unsigned short pad1; - unsigned int flags; - } clear0; /* SAVAGE_CMD_CLEAR */ - struct { - unsigned int mask; - unsigned int value; - } clear1; /* SAVAGE_CMD_CLEAR data */ -}; - -#endif diff --git a/sys/dev/drm/savage_drv.c b/sys/dev/drm/savage_drv.c deleted file mode 100644 index f6accaed7fac..000000000000 --- a/sys/dev/drm/savage_drv.c +++ /dev/null @@ -1,117 +0,0 @@ -/* savage_drv.c -- Savage DRI driver - */ -/*- - * Copyright 2005 Eric Anholt - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <anholt@FreeBSD.org> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/savage_drm.h" -#include "dev/drm/savage_drv.h" -#include "dev/drm/drm_pciids.h" - -/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */ -static drm_pci_id_list_t savage_pciidlist[] = { - savage_PCI_IDS -}; - -static void savage_configure(struct drm_device *dev) -{ - dev->driver->driver_features = - DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | - DRIVER_HAVE_DMA; - - dev->driver->buf_priv_size = sizeof(drm_savage_buf_priv_t); - dev->driver->load = savage_driver_load; - dev->driver->firstopen = savage_driver_firstopen; - dev->driver->lastclose = savage_driver_lastclose; - dev->driver->unload = savage_driver_unload; - dev->driver->reclaim_buffers_locked = savage_reclaim_buffers; - dev->driver->dma_ioctl = savage_bci_buffers; - - dev->driver->ioctls = savage_ioctls; - dev->driver->max_ioctl = savage_max_ioctl; - - dev->driver->name = DRIVER_NAME; - dev->driver->desc = DRIVER_DESC; - dev->driver->date = DRIVER_DATE; - dev->driver->major = DRIVER_MAJOR; - dev->driver->minor = DRIVER_MINOR; - dev->driver->patchlevel = DRIVER_PATCHLEVEL; -} - -static int -savage_probe(device_t kdev) -{ - return drm_probe(kdev, savage_pciidlist); -} - -static int -savage_attach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - - dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER, - M_WAITOK | M_ZERO); - - savage_configure(dev); - - return drm_attach(kdev, savage_pciidlist); -} - -static int -savage_detach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - int ret; - - ret = drm_detach(kdev); - - free(dev->driver, DRM_MEM_DRIVER); - - return ret; -} - -static device_method_t savage_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, savage_probe), - DEVMETHOD(device_attach, savage_attach), - DEVMETHOD(device_detach, savage_detach), - - { 0, 0 } -}; - -static driver_t savage_driver = { - "drm", - savage_methods, - sizeof(struct drm_device) -}; - -extern devclass_t drm_devclass; -DRIVER_MODULE(savage, vgapci, savage_driver, drm_devclass, 0, 0); -MODULE_DEPEND(savage, drm, 1, 1, 1); diff --git a/sys/dev/drm/savage_drv.h b/sys/dev/drm/savage_drv.h deleted file mode 100644 index e1e7b256eb3b..000000000000 --- a/sys/dev/drm/savage_drv.h +++ /dev/null @@ -1,578 +0,0 @@ -/* savage_drv.h -- Private header for the savage driver */ -/*- - * Copyright 2004 Felix Kuehling - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF - * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __SAVAGE_DRV_H__ -#define __SAVAGE_DRV_H__ - -#define DRIVER_AUTHOR "Felix Kuehling" - -#define DRIVER_NAME "savage" -#define DRIVER_DESC "Savage3D/MX/IX, Savage4, SuperSavage, Twister, ProSavage[DDR]" -#define DRIVER_DATE "20050313" - -#define DRIVER_MAJOR 2 -#define DRIVER_MINOR 4 -#define DRIVER_PATCHLEVEL 1 -/* Interface history: - * - * 1.x The DRM driver from the VIA/S3 code drop, basically a dummy - * 2.0 The first real DRM - * 2.1 Scissors registers managed by the DRM, 3D operations clipped by - * cliprects of the cmdbuf ioctl - * 2.2 Implemented SAVAGE_CMD_DMA_IDX and SAVAGE_CMD_VB_IDX - * 2.3 Event counters used by BCI_EVENT_EMIT/WAIT ioctls are now 32 bits - * wide and thus very long lived (unlikely to ever wrap). The size - * in the struct was 32 bits before, but only 16 bits were used - * 2.4 Implemented command DMA. Now drm_savage_init_t.cmd_dma_offset is - * actually used - */ - -typedef struct drm_savage_age { - uint16_t event; - unsigned int wrap; -} drm_savage_age_t; - -typedef struct drm_savage_buf_priv { - struct drm_savage_buf_priv *next; - struct drm_savage_buf_priv *prev; - drm_savage_age_t age; - struct drm_buf *buf; -} drm_savage_buf_priv_t; - -typedef struct drm_savage_dma_page { - drm_savage_age_t age; - unsigned int used, flushed; -} drm_savage_dma_page_t; -#define SAVAGE_DMA_PAGE_SIZE 1024 /* in dwords */ -/* Fake DMA buffer size in bytes. 4 pages. Allows a maximum command - * size of 16kbytes or 4k entries. Minimum requirement would be - * 10kbytes for 255 40-byte vertices in one drawing command. */ -#define SAVAGE_FAKE_DMA_SIZE (SAVAGE_DMA_PAGE_SIZE*4*4) - -/* interesting bits of hardware state that are saved in dev_priv */ -typedef union { - struct drm_savage_common_state { - uint32_t vbaddr; - } common; - struct { - unsigned char pad[sizeof(struct drm_savage_common_state)]; - uint32_t texctrl, texaddr; - uint32_t scstart, new_scstart; - uint32_t scend, new_scend; - } s3d; - struct { - unsigned char pad[sizeof(struct drm_savage_common_state)]; - uint32_t texdescr, texaddr0, texaddr1; - uint32_t drawctrl0, new_drawctrl0; - uint32_t drawctrl1, new_drawctrl1; - } s4; -} drm_savage_state_t; - -/* these chip tags should match the ones in the 2D driver in savage_regs.h. */ -enum savage_family { - S3_UNKNOWN = 0, - S3_SAVAGE3D, - S3_SAVAGE_MX, - S3_SAVAGE4, - S3_PROSAVAGE, - S3_TWISTER, - S3_PROSAVAGEDDR, - S3_SUPERSAVAGE, - S3_SAVAGE2000, - S3_LAST -}; - -extern struct drm_ioctl_desc savage_ioctls[]; -extern int savage_max_ioctl; - -#define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX)) - -#define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \ - || (chip==S3_PROSAVAGE) \ - || (chip==S3_TWISTER) \ - || (chip==S3_PROSAVAGEDDR)) - -#define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE)) - -#define S3_SAVAGE_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000)) - -#define S3_MOBILE_TWISTER_SERIES(chip) ((chip==S3_TWISTER) \ - ||(chip==S3_PROSAVAGEDDR)) - -/* flags */ -#define SAVAGE_IS_AGP 1 - -typedef struct drm_savage_private { - drm_savage_sarea_t *sarea_priv; - - drm_savage_buf_priv_t head, tail; - - /* who am I? */ - enum savage_family chipset; - - unsigned int cob_size; - unsigned int bci_threshold_lo, bci_threshold_hi; - unsigned int dma_type; - - /* frame buffer layout */ - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - /* bitmap descriptors for swap and clear */ - unsigned int front_bd, back_bd, depth_bd; - - /* local textures */ - unsigned int texture_offset; - unsigned int texture_size; - - /* memory regions in physical memory */ - drm_local_map_t *sarea; - drm_local_map_t *mmio; - drm_local_map_t *fb; - drm_local_map_t *aperture; - drm_local_map_t *status; - drm_local_map_t *agp_textures; - drm_local_map_t *cmd_dma; - drm_local_map_t fake_dma; - - struct { - int handle; - unsigned long base, size; - } mtrr[3]; - - /* BCI and status-related stuff */ - volatile uint32_t *status_ptr, *bci_ptr; - uint32_t status_used_mask; - uint16_t event_counter; - unsigned int event_wrap; - - /* Savage4 command DMA */ - drm_savage_dma_page_t *dma_pages; - unsigned int nr_dma_pages, first_dma_page, current_dma_page; - drm_savage_age_t last_dma_age; - - /* saved hw state for global/local check on S3D */ - uint32_t hw_draw_ctrl, hw_zbuf_ctrl; - /* and for scissors (global, so don't emit if not changed) */ - uint32_t hw_scissors_start, hw_scissors_end; - - drm_savage_state_t state; - - /* after emitting a wait cmd Savage3D needs 63 nops before next DMA */ - unsigned int waiting; - - /* config/hardware-dependent function pointers */ - int (*wait_fifo)(struct drm_savage_private *dev_priv, unsigned int n); - int (*wait_evnt)(struct drm_savage_private *dev_priv, uint16_t e); - /* Err, there is a macro wait_event in include/linux/wait.h. - * Avoid unwanted macro expansion. */ - void (*emit_clip_rect)(struct drm_savage_private *dev_priv, - const struct drm_clip_rect *pbox); - void (*dma_flush)(struct drm_savage_private *dev_priv); -} drm_savage_private_t; - -/* ioctls */ -extern int savage_bci_cmdbuf(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int savage_bci_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv); - -/* BCI functions */ -extern uint16_t savage_bci_emit_event(drm_savage_private_t *dev_priv, - unsigned int flags); -extern void savage_freelist_put(struct drm_device *dev, struct drm_buf *buf); -extern void savage_dma_reset(drm_savage_private_t *dev_priv); -extern void savage_dma_wait(drm_savage_private_t *dev_priv, unsigned int page); -extern uint32_t *savage_dma_alloc(drm_savage_private_t *dev_priv, - unsigned int n); -extern int savage_driver_load(struct drm_device *dev, unsigned long chipset); -extern int savage_driver_firstopen(struct drm_device *dev); -extern void savage_driver_lastclose(struct drm_device *dev); -extern int savage_driver_unload(struct drm_device *dev); -extern void savage_reclaim_buffers(struct drm_device *dev, - struct drm_file *file_priv); - -/* state functions */ -extern void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv, - const struct drm_clip_rect *pbox); -extern void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv, - const struct drm_clip_rect *pbox); - -#define SAVAGE_FB_SIZE_S3 0x01000000 /* 16MB */ -#define SAVAGE_FB_SIZE_S4 0x02000000 /* 32MB */ -#define SAVAGE_MMIO_SIZE 0x00080000 /* 512kB */ -#define SAVAGE_APERTURE_OFFSET 0x02000000 /* 32MB */ -#define SAVAGE_APERTURE_SIZE 0x05000000 /* 5 tiled surfaces, 16MB each */ - -#define SAVAGE_BCI_OFFSET 0x00010000 /* offset of the BCI region - * inside the MMIO region */ -#define SAVAGE_BCI_FIFO_SIZE 32 /* number of entries in on-chip - * BCI FIFO */ - -/* - * MMIO registers - */ -#define SAVAGE_STATUS_WORD0 0x48C00 -#define SAVAGE_STATUS_WORD1 0x48C04 -#define SAVAGE_ALT_STATUS_WORD0 0x48C60 - -#define SAVAGE_FIFO_USED_MASK_S3D 0x0001ffff -#define SAVAGE_FIFO_USED_MASK_S4 0x001fffff - -/* Copied from savage_bci.h in the 2D driver with some renaming. */ - -/* Bitmap descriptors */ -#define SAVAGE_BD_STRIDE_SHIFT 0 -#define SAVAGE_BD_BPP_SHIFT 16 -#define SAVAGE_BD_TILE_SHIFT 24 -#define SAVAGE_BD_BW_DISABLE (1<<28) -/* common: */ -#define SAVAGE_BD_TILE_LINEAR 0 -/* savage4, MX, IX, 3D */ -#define SAVAGE_BD_TILE_16BPP 2 -#define SAVAGE_BD_TILE_32BPP 3 -/* twister, prosavage, DDR, supersavage, 2000 */ -#define SAVAGE_BD_TILE_DEST 1 -#define SAVAGE_BD_TILE_TEXTURE 2 -/* GBD - BCI enable */ -/* savage4, MX, IX, 3D */ -#define SAVAGE_GBD_BCI_ENABLE 8 -/* twister, prosavage, DDR, supersavage, 2000 */ -#define SAVAGE_GBD_BCI_ENABLE_TWISTER 0 - -#define SAVAGE_GBD_BIG_ENDIAN 4 -#define SAVAGE_GBD_LITTLE_ENDIAN 0 -#define SAVAGE_GBD_64 1 - -/* Global Bitmap Descriptor */ -#define SAVAGE_BCI_GLB_BD_LOW 0x8168 -#define SAVAGE_BCI_GLB_BD_HIGH 0x816C - -/* - * BCI registers - */ -/* Savage4/Twister/ProSavage 3D registers */ -#define SAVAGE_DRAWLOCALCTRL_S4 0x1e -#define SAVAGE_TEXPALADDR_S4 0x1f -#define SAVAGE_TEXCTRL0_S4 0x20 -#define SAVAGE_TEXCTRL1_S4 0x21 -#define SAVAGE_TEXADDR0_S4 0x22 -#define SAVAGE_TEXADDR1_S4 0x23 -#define SAVAGE_TEXBLEND0_S4 0x24 -#define SAVAGE_TEXBLEND1_S4 0x25 -#define SAVAGE_TEXXPRCLR_S4 0x26 /* never used */ -#define SAVAGE_TEXDESCR_S4 0x27 -#define SAVAGE_FOGTABLE_S4 0x28 -#define SAVAGE_FOGCTRL_S4 0x30 -#define SAVAGE_STENCILCTRL_S4 0x31 -#define SAVAGE_ZBUFCTRL_S4 0x32 -#define SAVAGE_ZBUFOFF_S4 0x33 -#define SAVAGE_DESTCTRL_S4 0x34 -#define SAVAGE_DRAWCTRL0_S4 0x35 -#define SAVAGE_DRAWCTRL1_S4 0x36 -#define SAVAGE_ZWATERMARK_S4 0x37 -#define SAVAGE_DESTTEXRWWATERMARK_S4 0x38 -#define SAVAGE_TEXBLENDCOLOR_S4 0x39 -/* Savage3D/MX/IX 3D registers */ -#define SAVAGE_TEXPALADDR_S3D 0x18 -#define SAVAGE_TEXXPRCLR_S3D 0x19 /* never used */ -#define SAVAGE_TEXADDR_S3D 0x1A -#define SAVAGE_TEXDESCR_S3D 0x1B -#define SAVAGE_TEXCTRL_S3D 0x1C -#define SAVAGE_FOGTABLE_S3D 0x20 -#define SAVAGE_FOGCTRL_S3D 0x30 -#define SAVAGE_DRAWCTRL_S3D 0x31 -#define SAVAGE_ZBUFCTRL_S3D 0x32 -#define SAVAGE_ZBUFOFF_S3D 0x33 -#define SAVAGE_DESTCTRL_S3D 0x34 -#define SAVAGE_SCSTART_S3D 0x35 -#define SAVAGE_SCEND_S3D 0x36 -#define SAVAGE_ZWATERMARK_S3D 0x37 -#define SAVAGE_DESTTEXRWWATERMARK_S3D 0x38 -/* common stuff */ -#define SAVAGE_VERTBUFADDR 0x3e -#define SAVAGE_BITPLANEWTMASK 0xd7 -#define SAVAGE_DMABUFADDR 0x51 - -/* texture enable bits (needed for tex addr checking) */ -#define SAVAGE_TEXCTRL_TEXEN_MASK 0x00010000 /* S3D */ -#define SAVAGE_TEXDESCR_TEX0EN_MASK 0x02000000 /* S4 */ -#define SAVAGE_TEXDESCR_TEX1EN_MASK 0x04000000 /* S4 */ - -/* Global fields in Savage4/Twister/ProSavage 3D registers: - * - * All texture registers and DrawLocalCtrl are local. All other - * registers are global. */ - -/* Global fields in Savage3D/MX/IX 3D registers: - * - * All texture registers are local. DrawCtrl and ZBufCtrl are - * partially local. All other registers are global. - * - * DrawCtrl global fields: cullMode, alphaTestCmpFunc, alphaTestEn, alphaRefVal - * ZBufCtrl global fields: zCmpFunc, zBufEn - */ -#define SAVAGE_DRAWCTRL_S3D_GLOBAL 0x03f3c00c -#define SAVAGE_ZBUFCTRL_S3D_GLOBAL 0x00000027 - -/* Masks for scissor bits (drawCtrl[01] on s4, scissorStart/End on s3d) - */ -#define SAVAGE_SCISSOR_MASK_S4 0x00fff7ff -#define SAVAGE_SCISSOR_MASK_S3D 0x07ff07ff - -/* - * BCI commands - */ -#define BCI_CMD_NOP 0x40000000 -#define BCI_CMD_RECT 0x48000000 -#define BCI_CMD_RECT_XP 0x01000000 -#define BCI_CMD_RECT_YP 0x02000000 -#define BCI_CMD_SCANLINE 0x50000000 -#define BCI_CMD_LINE 0x5C000000 -#define BCI_CMD_LINE_LAST_PIXEL 0x58000000 -#define BCI_CMD_BYTE_TEXT 0x63000000 -#define BCI_CMD_NT_BYTE_TEXT 0x67000000 -#define BCI_CMD_BIT_TEXT 0x6C000000 -#define BCI_CMD_GET_ROP(cmd) (((cmd) >> 16) & 0xFF) -#define BCI_CMD_SET_ROP(cmd, rop) ((cmd) |= ((rop & 0xFF) << 16)) -#define BCI_CMD_SEND_COLOR 0x00008000 - -#define BCI_CMD_CLIP_NONE 0x00000000 -#define BCI_CMD_CLIP_CURRENT 0x00002000 -#define BCI_CMD_CLIP_LR 0x00004000 -#define BCI_CMD_CLIP_NEW 0x00006000 - -#define BCI_CMD_DEST_GBD 0x00000000 -#define BCI_CMD_DEST_PBD 0x00000800 -#define BCI_CMD_DEST_PBD_NEW 0x00000C00 -#define BCI_CMD_DEST_SBD 0x00001000 -#define BCI_CMD_DEST_SBD_NEW 0x00001400 - -#define BCI_CMD_SRC_TRANSPARENT 0x00000200 -#define BCI_CMD_SRC_SOLID 0x00000000 -#define BCI_CMD_SRC_GBD 0x00000020 -#define BCI_CMD_SRC_COLOR 0x00000040 -#define BCI_CMD_SRC_MONO 0x00000060 -#define BCI_CMD_SRC_PBD_COLOR 0x00000080 -#define BCI_CMD_SRC_PBD_MONO 0x000000A0 -#define BCI_CMD_SRC_PBD_COLOR_NEW 0x000000C0 -#define BCI_CMD_SRC_PBD_MONO_NEW 0x000000E0 -#define BCI_CMD_SRC_SBD_COLOR 0x00000100 -#define BCI_CMD_SRC_SBD_MONO 0x00000120 -#define BCI_CMD_SRC_SBD_COLOR_NEW 0x00000140 -#define BCI_CMD_SRC_SBD_MONO_NEW 0x00000160 - -#define BCI_CMD_PAT_TRANSPARENT 0x00000010 -#define BCI_CMD_PAT_NONE 0x00000000 -#define BCI_CMD_PAT_COLOR 0x00000002 -#define BCI_CMD_PAT_MONO 0x00000003 -#define BCI_CMD_PAT_PBD_COLOR 0x00000004 -#define BCI_CMD_PAT_PBD_MONO 0x00000005 -#define BCI_CMD_PAT_PBD_COLOR_NEW 0x00000006 -#define BCI_CMD_PAT_PBD_MONO_NEW 0x00000007 -#define BCI_CMD_PAT_SBD_COLOR 0x00000008 -#define BCI_CMD_PAT_SBD_MONO 0x00000009 -#define BCI_CMD_PAT_SBD_COLOR_NEW 0x0000000A -#define BCI_CMD_PAT_SBD_MONO_NEW 0x0000000B - -#define BCI_BD_BW_DISABLE 0x10000000 -#define BCI_BD_TILE_MASK 0x03000000 -#define BCI_BD_TILE_NONE 0x00000000 -#define BCI_BD_TILE_16 0x02000000 -#define BCI_BD_TILE_32 0x03000000 -#define BCI_BD_GET_BPP(bd) (((bd) >> 16) & 0xFF) -#define BCI_BD_SET_BPP(bd, bpp) ((bd) |= (((bpp) & 0xFF) << 16)) -#define BCI_BD_GET_STRIDE(bd) ((bd) & 0xFFFF) -#define BCI_BD_SET_STRIDE(bd, st) ((bd) |= ((st) & 0xFFFF)) - -#define BCI_CMD_SET_REGISTER 0x96000000 - -#define BCI_CMD_WAIT 0xC0000000 -#define BCI_CMD_WAIT_3D 0x00010000 -#define BCI_CMD_WAIT_2D 0x00020000 - -#define BCI_CMD_UPDATE_EVENT_TAG 0x98000000 - -#define BCI_CMD_DRAW_PRIM 0x80000000 -#define BCI_CMD_DRAW_INDEXED_PRIM 0x88000000 -#define BCI_CMD_DRAW_CONT 0x01000000 -#define BCI_CMD_DRAW_TRILIST 0x00000000 -#define BCI_CMD_DRAW_TRISTRIP 0x02000000 -#define BCI_CMD_DRAW_TRIFAN 0x04000000 -#define BCI_CMD_DRAW_SKIPFLAGS 0x000000ff -#define BCI_CMD_DRAW_NO_Z 0x00000001 -#define BCI_CMD_DRAW_NO_W 0x00000002 -#define BCI_CMD_DRAW_NO_CD 0x00000004 -#define BCI_CMD_DRAW_NO_CS 0x00000008 -#define BCI_CMD_DRAW_NO_U0 0x00000010 -#define BCI_CMD_DRAW_NO_V0 0x00000020 -#define BCI_CMD_DRAW_NO_UV0 0x00000030 -#define BCI_CMD_DRAW_NO_U1 0x00000040 -#define BCI_CMD_DRAW_NO_V1 0x00000080 -#define BCI_CMD_DRAW_NO_UV1 0x000000c0 - -#define BCI_CMD_DMA 0xa8000000 - -#define BCI_W_H(w, h) ((((h) << 16) | (w)) & 0x0FFF0FFF) -#define BCI_X_Y(x, y) ((((y) << 16) | (x)) & 0x0FFF0FFF) -#define BCI_X_W(x, y) ((((w) << 16) | (x)) & 0x0FFF0FFF) -#define BCI_CLIP_LR(l, r) ((((r) << 16) | (l)) & 0x0FFF0FFF) -#define BCI_CLIP_TL(t, l) ((((t) << 16) | (l)) & 0x0FFF0FFF) -#define BCI_CLIP_BR(b, r) ((((b) << 16) | (r)) & 0x0FFF0FFF) - -#define BCI_LINE_X_Y(x, y) (((y) << 16) | ((x) & 0xFFFF)) -#define BCI_LINE_STEPS(diag, axi) (((axi) << 16) | ((diag) & 0xFFFF)) -#define BCI_LINE_MISC(maj, ym, xp, yp, err) \ - (((maj) & 0x1FFF) | \ - ((ym) ? 1<<13 : 0) | \ - ((xp) ? 1<<14 : 0) | \ - ((yp) ? 1<<15 : 0) | \ - ((err) << 16)) - -/* - * common commands - */ -#define BCI_SET_REGISTERS( first, n ) \ - BCI_WRITE(BCI_CMD_SET_REGISTER | \ - ((uint32_t)(n) & 0xff) << 16 | \ - ((uint32_t)(first) & 0xffff)) -#define DMA_SET_REGISTERS( first, n ) \ - DMA_WRITE(BCI_CMD_SET_REGISTER | \ - ((uint32_t)(n) & 0xff) << 16 | \ - ((uint32_t)(first) & 0xffff)) - -#define BCI_DRAW_PRIMITIVE(n, type, skip) \ - BCI_WRITE(BCI_CMD_DRAW_PRIM | (type) | (skip) | \ - ((n) << 16)) -#define DMA_DRAW_PRIMITIVE(n, type, skip) \ - DMA_WRITE(BCI_CMD_DRAW_PRIM | (type) | (skip) | \ - ((n) << 16)) - -#define BCI_DRAW_INDICES_S3D(n, type, i0) \ - BCI_WRITE(BCI_CMD_DRAW_INDEXED_PRIM | (type) | \ - ((n) << 16) | (i0)) - -#define BCI_DRAW_INDICES_S4(n, type, skip) \ - BCI_WRITE(BCI_CMD_DRAW_INDEXED_PRIM | (type) | \ - (skip) | ((n) << 16)) - -#define BCI_DMA(n) \ - BCI_WRITE(BCI_CMD_DMA | (((n) >> 1) - 1)) - -/* - * access to MMIO - */ -#define SAVAGE_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) -#define SAVAGE_WRITE(reg) DRM_WRITE32( dev_priv->mmio, (reg) ) - -/* - * access to the burst command interface (BCI) - */ -#define SAVAGE_BCI_DEBUG 1 - -#define BCI_LOCALS volatile uint32_t *bci_ptr; - -#define BEGIN_BCI( n ) do { \ - dev_priv->wait_fifo(dev_priv, (n)); \ - bci_ptr = dev_priv->bci_ptr; \ -} while(0) - -#define BCI_WRITE( val ) *bci_ptr++ = (uint32_t)(val) - -/* - * command DMA support - */ -#define SAVAGE_DMA_DEBUG 1 - -#define DMA_LOCALS uint32_t *dma_ptr; - -#define BEGIN_DMA( n ) do { \ - unsigned int cur = dev_priv->current_dma_page; \ - unsigned int rest = SAVAGE_DMA_PAGE_SIZE - \ - dev_priv->dma_pages[cur].used; \ - if ((n) > rest) { \ - dma_ptr = savage_dma_alloc(dev_priv, (n)); \ - } else { /* fast path for small allocations */ \ - dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle + \ - cur * SAVAGE_DMA_PAGE_SIZE + \ - dev_priv->dma_pages[cur].used; \ - if (dev_priv->dma_pages[cur].used == 0) \ - savage_dma_wait(dev_priv, cur); \ - dev_priv->dma_pages[cur].used += (n); \ - } \ -} while(0) - -#define DMA_WRITE( val ) *dma_ptr++ = (uint32_t)(val) - -#define DMA_COPY(src, n) do { \ - memcpy(dma_ptr, (src), (n)*4); \ - dma_ptr += n; \ -} while(0) - -#if SAVAGE_DMA_DEBUG -#define DMA_COMMIT() do { \ - unsigned int cur = dev_priv->current_dma_page; \ - uint32_t *expected = (uint32_t *)dev_priv->cmd_dma->handle + \ - cur * SAVAGE_DMA_PAGE_SIZE + \ - dev_priv->dma_pages[cur].used; \ - if (dma_ptr != expected) { \ - DRM_ERROR("DMA allocation and use don't match: " \ - "%p != %p\n", expected, dma_ptr); \ - savage_dma_reset(dev_priv); \ - } \ -} while(0) -#else -#define DMA_COMMIT() do {/* nothing */} while(0) -#endif - -#define DMA_FLUSH() dev_priv->dma_flush(dev_priv) - -/* Buffer aging via event tag - */ - -#define UPDATE_EVENT_COUNTER( ) do { \ - if (dev_priv->status_ptr) { \ - uint16_t count; \ - /* coordinate with Xserver */ \ - count = dev_priv->status_ptr[1023]; \ - if (count < dev_priv->event_counter) \ - dev_priv->event_wrap++; \ - dev_priv->event_counter = count; \ - } \ -} while(0) - -#define SET_AGE( age, e, w ) do { \ - (age)->event = e; \ - (age)->wrap = w; \ -} while(0) - -#define TEST_AGE( age, e, w ) \ - ( (age)->wrap < (w) || ( (age)->wrap == (w) && (age)->event <= (e) ) ) - -#endif /* __SAVAGE_DRV_H__ */ diff --git a/sys/dev/drm/savage_state.c b/sys/dev/drm/savage_state.c deleted file mode 100644 index b3e7fe175375..000000000000 --- a/sys/dev/drm/savage_state.c +++ /dev/null @@ -1,1168 +0,0 @@ -/* savage_state.c -- State and drawing support for Savage - * - * Copyright 2004 Felix Kuehling - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF - * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); -#include "dev/drm/drmP.h" -#include "dev/drm/savage_drm.h" -#include "dev/drm/savage_drv.h" - -void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv, - const struct drm_clip_rect *pbox) -{ - uint32_t scstart = dev_priv->state.s3d.new_scstart; - uint32_t scend = dev_priv->state.s3d.new_scend; - scstart = (scstart & ~SAVAGE_SCISSOR_MASK_S3D) | - ((uint32_t)pbox->x1 & 0x000007ff) | - (((uint32_t)pbox->y1 << 16) & 0x07ff0000); - scend = (scend & ~SAVAGE_SCISSOR_MASK_S3D) | - (((uint32_t)pbox->x2 - 1) & 0x000007ff) | - ((((uint32_t)pbox->y2 - 1) << 16) & 0x07ff0000); - if (scstart != dev_priv->state.s3d.scstart || - scend != dev_priv->state.s3d.scend) { - DMA_LOCALS; - BEGIN_DMA(4); - DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); - DMA_SET_REGISTERS(SAVAGE_SCSTART_S3D, 2); - DMA_WRITE(scstart); - DMA_WRITE(scend); - dev_priv->state.s3d.scstart = scstart; - dev_priv->state.s3d.scend = scend; - dev_priv->waiting = 1; - DMA_COMMIT(); - } -} - -void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv, - const struct drm_clip_rect *pbox) -{ - uint32_t drawctrl0 = dev_priv->state.s4.new_drawctrl0; - uint32_t drawctrl1 = dev_priv->state.s4.new_drawctrl1; - drawctrl0 = (drawctrl0 & ~SAVAGE_SCISSOR_MASK_S4) | - ((uint32_t)pbox->x1 & 0x000007ff) | - (((uint32_t)pbox->y1 << 12) & 0x00fff000); - drawctrl1 = (drawctrl1 & ~SAVAGE_SCISSOR_MASK_S4) | - (((uint32_t)pbox->x2 - 1) & 0x000007ff) | - ((((uint32_t)pbox->y2 - 1) << 12) & 0x00fff000); - if (drawctrl0 != dev_priv->state.s4.drawctrl0 || - drawctrl1 != dev_priv->state.s4.drawctrl1) { - DMA_LOCALS; - BEGIN_DMA(4); - DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); - DMA_SET_REGISTERS(SAVAGE_DRAWCTRL0_S4, 2); - DMA_WRITE(drawctrl0); - DMA_WRITE(drawctrl1); - dev_priv->state.s4.drawctrl0 = drawctrl0; - dev_priv->state.s4.drawctrl1 = drawctrl1; - dev_priv->waiting = 1; - DMA_COMMIT(); - } -} - -static int savage_verify_texaddr(drm_savage_private_t *dev_priv, int unit, - uint32_t addr) -{ - if ((addr & 6) != 2) { /* reserved bits */ - DRM_ERROR("bad texAddr%d %08x (reserved bits)\n", unit, addr); - return -EINVAL; - } - if (!(addr & 1)) { /* local */ - addr &= ~7; - if (addr < dev_priv->texture_offset || - addr >= dev_priv->texture_offset + dev_priv->texture_size) { - DRM_ERROR - ("bad texAddr%d %08x (local addr out of range)\n", - unit, addr); - return -EINVAL; - } - } else { /* AGP */ - if (!dev_priv->agp_textures) { - DRM_ERROR("bad texAddr%d %08x (AGP not available)\n", - unit, addr); - return -EINVAL; - } - addr &= ~7; - if (addr < dev_priv->agp_textures->offset || - addr >= (dev_priv->agp_textures->offset + - dev_priv->agp_textures->size)) { - DRM_ERROR - ("bad texAddr%d %08x (AGP addr out of range)\n", - unit, addr); - return -EINVAL; - } - } - return 0; -} - -#define SAVE_STATE(reg,where) \ - if(start <= reg && start + count > reg) \ - dev_priv->state.where = regs[reg - start] -#define SAVE_STATE_MASK(reg,where,mask) do { \ - if(start <= reg && start + count > reg) { \ - uint32_t tmp; \ - tmp = regs[reg - start]; \ - dev_priv->state.where = (tmp & (mask)) | \ - (dev_priv->state.where & ~(mask)); \ - } \ -} while (0) -static int savage_verify_state_s3d(drm_savage_private_t *dev_priv, - unsigned int start, unsigned int count, - const uint32_t *regs) -{ - if (start < SAVAGE_TEXPALADDR_S3D || - start + count - 1 > SAVAGE_DESTTEXRWWATERMARK_S3D) { - DRM_ERROR("invalid register range (0x%04x-0x%04x)\n", - start, start + count - 1); - return -EINVAL; - } - - SAVE_STATE_MASK(SAVAGE_SCSTART_S3D, s3d.new_scstart, - ~SAVAGE_SCISSOR_MASK_S3D); - SAVE_STATE_MASK(SAVAGE_SCEND_S3D, s3d.new_scend, - ~SAVAGE_SCISSOR_MASK_S3D); - - /* if any texture regs were changed ... */ - if (start <= SAVAGE_TEXCTRL_S3D && - start + count > SAVAGE_TEXPALADDR_S3D) { - /* ... check texture state */ - SAVE_STATE(SAVAGE_TEXCTRL_S3D, s3d.texctrl); - SAVE_STATE(SAVAGE_TEXADDR_S3D, s3d.texaddr); - if (dev_priv->state.s3d.texctrl & SAVAGE_TEXCTRL_TEXEN_MASK) - return savage_verify_texaddr(dev_priv, 0, - dev_priv->state.s3d.texaddr); - } - - return 0; -} - -static int savage_verify_state_s4(drm_savage_private_t *dev_priv, - unsigned int start, unsigned int count, - const uint32_t *regs) -{ - int ret = 0; - - if (start < SAVAGE_DRAWLOCALCTRL_S4 || - start + count - 1 > SAVAGE_TEXBLENDCOLOR_S4) { - DRM_ERROR("invalid register range (0x%04x-0x%04x)\n", - start, start + count - 1); - return -EINVAL; - } - - SAVE_STATE_MASK(SAVAGE_DRAWCTRL0_S4, s4.new_drawctrl0, - ~SAVAGE_SCISSOR_MASK_S4); - SAVE_STATE_MASK(SAVAGE_DRAWCTRL1_S4, s4.new_drawctrl1, - ~SAVAGE_SCISSOR_MASK_S4); - - /* if any texture regs were changed ... */ - if (start <= SAVAGE_TEXDESCR_S4 && - start + count > SAVAGE_TEXPALADDR_S4) { - /* ... check texture state */ - SAVE_STATE(SAVAGE_TEXDESCR_S4, s4.texdescr); - SAVE_STATE(SAVAGE_TEXADDR0_S4, s4.texaddr0); - SAVE_STATE(SAVAGE_TEXADDR1_S4, s4.texaddr1); - if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX0EN_MASK) - ret |= savage_verify_texaddr(dev_priv, 0, - dev_priv->state.s4.texaddr0); - if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX1EN_MASK) - ret |= savage_verify_texaddr(dev_priv, 1, - dev_priv->state.s4.texaddr1); - } - - return ret; -} -#undef SAVE_STATE -#undef SAVE_STATE_MASK - -static int savage_dispatch_state(drm_savage_private_t *dev_priv, - const drm_savage_cmd_header_t *cmd_header, - const uint32_t *regs) -{ - unsigned int count = cmd_header->state.count; - unsigned int start = cmd_header->state.start; - unsigned int count2 = 0; - unsigned int bci_size; - int ret; - DMA_LOCALS; - - if (!count) - return 0; - - if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - ret = savage_verify_state_s3d(dev_priv, start, count, regs); - if (ret != 0) - return ret; - /* scissor regs are emitted in savage_dispatch_draw */ - if (start < SAVAGE_SCSTART_S3D) { - if (start + count > SAVAGE_SCEND_S3D + 1) - count2 = count - (SAVAGE_SCEND_S3D + 1 - start); - if (start + count > SAVAGE_SCSTART_S3D) - count = SAVAGE_SCSTART_S3D - start; - } else if (start <= SAVAGE_SCEND_S3D) { - if (start + count > SAVAGE_SCEND_S3D + 1) { - count -= SAVAGE_SCEND_S3D + 1 - start; - start = SAVAGE_SCEND_S3D + 1; - } else - return 0; - } - } else { - ret = savage_verify_state_s4(dev_priv, start, count, regs); - if (ret != 0) - return ret; - /* scissor regs are emitted in savage_dispatch_draw */ - if (start < SAVAGE_DRAWCTRL0_S4) { - if (start + count > SAVAGE_DRAWCTRL1_S4 + 1) - count2 = count - - (SAVAGE_DRAWCTRL1_S4 + 1 - start); - if (start + count > SAVAGE_DRAWCTRL0_S4) - count = SAVAGE_DRAWCTRL0_S4 - start; - } else if (start <= SAVAGE_DRAWCTRL1_S4) { - if (start + count > SAVAGE_DRAWCTRL1_S4 + 1) { - count -= SAVAGE_DRAWCTRL1_S4 + 1 - start; - start = SAVAGE_DRAWCTRL1_S4 + 1; - } else - return 0; - } - } - - bci_size = count + (count + 254) / 255 + count2 + (count2 + 254) / 255; - - if (cmd_header->state.global) { - BEGIN_DMA(bci_size + 1); - DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); - dev_priv->waiting = 1; - } else { - BEGIN_DMA(bci_size); - } - - do { - while (count > 0) { - unsigned int n = count < 255 ? count : 255; - DMA_SET_REGISTERS(start, n); - DMA_COPY(regs, n); - count -= n; - start += n; - regs += n; - } - start += 2; - regs += 2; - count = count2; - count2 = 0; - } while (count); - - DMA_COMMIT(); - - return 0; -} - -static int savage_dispatch_dma_prim(drm_savage_private_t *dev_priv, - const drm_savage_cmd_header_t *cmd_header, - const struct drm_buf *dmabuf) -{ - unsigned char reorder = 0; - unsigned int prim = cmd_header->prim.prim; - unsigned int skip = cmd_header->prim.skip; - unsigned int n = cmd_header->prim.count; - unsigned int start = cmd_header->prim.start; - unsigned int i; - BCI_LOCALS; - - if (!dmabuf) { - DRM_ERROR("called without dma buffers!\n"); - return -EINVAL; - } - - if (!n) - return 0; - - switch (prim) { - case SAVAGE_PRIM_TRILIST_201: - reorder = 1; - prim = SAVAGE_PRIM_TRILIST; - case SAVAGE_PRIM_TRILIST: - if (n % 3 != 0) { - DRM_ERROR("wrong number of vertices %u in TRILIST\n", - n); - return -EINVAL; - } - break; - case SAVAGE_PRIM_TRISTRIP: - case SAVAGE_PRIM_TRIFAN: - if (n < 3) { - DRM_ERROR - ("wrong number of vertices %u in TRIFAN/STRIP\n", - n); - return -EINVAL; - } - break; - default: - DRM_ERROR("invalid primitive type %u\n", prim); - return -EINVAL; - } - - if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - if (skip != 0) { - DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); - return -EINVAL; - } - } else { - unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) - - (skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) - - (skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1); - if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) { - DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); - return -EINVAL; - } - if (reorder) { - DRM_ERROR("TRILIST_201 used on Savage4 hardware\n"); - return -EINVAL; - } - } - - if (start + n > dmabuf->total / 32) { - DRM_ERROR("vertex indices (%u-%u) out of range (0-%u)\n", - start, start + n - 1, dmabuf->total / 32); - return -EINVAL; - } - - /* Vertex DMA doesn't work with command DMA at the same time, - * so we use BCI_... to submit commands here. Flush buffered - * faked DMA first. */ - DMA_FLUSH(); - - if (dmabuf->bus_address != dev_priv->state.common.vbaddr) { - BEGIN_BCI(2); - BCI_SET_REGISTERS(SAVAGE_VERTBUFADDR, 1); - BCI_WRITE(dmabuf->bus_address | dev_priv->dma_type); - dev_priv->state.common.vbaddr = dmabuf->bus_address; - } - if (S3_SAVAGE3D_SERIES(dev_priv->chipset) && dev_priv->waiting) { - /* Workaround for what looks like a hardware bug. If a - * WAIT_3D_IDLE was emitted some time before the - * indexed drawing command then the engine will lock - * up. There are two known workarounds: - * WAIT_IDLE_EMPTY or emit at least 63 NOPs. */ - BEGIN_BCI(63); - for (i = 0; i < 63; ++i) - BCI_WRITE(BCI_CMD_WAIT); - dev_priv->waiting = 0; - } - - prim <<= 25; - while (n != 0) { - /* Can emit up to 255 indices (85 triangles) at once. */ - unsigned int count = n > 255 ? 255 : n; - if (reorder) { - /* Need to reorder indices for correct flat - * shading while preserving the clock sense - * for correct culling. Only on Savage3D. */ - int reorder[3] = { -1, -1, -1 }; - reorder[start % 3] = 2; - - BEGIN_BCI((count + 1 + 1) / 2); - BCI_DRAW_INDICES_S3D(count, prim, start + 2); - - for (i = start + 1; i + 1 < start + count; i += 2) - BCI_WRITE((i + reorder[i % 3]) | - ((i + 1 + - reorder[(i + 1) % 3]) << 16)); - if (i < start + count) - BCI_WRITE(i + reorder[i % 3]); - } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - BEGIN_BCI((count + 1 + 1) / 2); - BCI_DRAW_INDICES_S3D(count, prim, start); - - for (i = start + 1; i + 1 < start + count; i += 2) - BCI_WRITE(i | ((i + 1) << 16)); - if (i < start + count) - BCI_WRITE(i); - } else { - BEGIN_BCI((count + 2 + 1) / 2); - BCI_DRAW_INDICES_S4(count, prim, skip); - - for (i = start; i + 1 < start + count; i += 2) - BCI_WRITE(i | ((i + 1) << 16)); - if (i < start + count) - BCI_WRITE(i); - } - - start += count; - n -= count; - - prim |= BCI_CMD_DRAW_CONT; - } - - return 0; -} - -static int savage_dispatch_vb_prim(drm_savage_private_t *dev_priv, - const drm_savage_cmd_header_t *cmd_header, - const uint32_t *vtxbuf, unsigned int vb_size, - unsigned int vb_stride) -{ - unsigned char reorder = 0; - unsigned int prim = cmd_header->prim.prim; - unsigned int skip = cmd_header->prim.skip; - unsigned int n = cmd_header->prim.count; - unsigned int start = cmd_header->prim.start; - unsigned int vtx_size; - unsigned int i; - DMA_LOCALS; - - if (!n) - return 0; - - switch (prim) { - case SAVAGE_PRIM_TRILIST_201: - reorder = 1; - prim = SAVAGE_PRIM_TRILIST; - case SAVAGE_PRIM_TRILIST: - if (n % 3 != 0) { - DRM_ERROR("wrong number of vertices %u in TRILIST\n", - n); - return -EINVAL; - } - break; - case SAVAGE_PRIM_TRISTRIP: - case SAVAGE_PRIM_TRIFAN: - if (n < 3) { - DRM_ERROR - ("wrong number of vertices %u in TRIFAN/STRIP\n", - n); - return -EINVAL; - } - break; - default: - DRM_ERROR("invalid primitive type %u\n", prim); - return -EINVAL; - } - - if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - if (skip > SAVAGE_SKIP_ALL_S3D) { - DRM_ERROR("invalid skip flags 0x%04x\n", skip); - return -EINVAL; - } - vtx_size = 8; /* full vertex */ - } else { - if (skip > SAVAGE_SKIP_ALL_S4) { - DRM_ERROR("invalid skip flags 0x%04x\n", skip); - return -EINVAL; - } - vtx_size = 10; /* full vertex */ - } - - vtx_size -= (skip & 1) + (skip >> 1 & 1) + - (skip >> 2 & 1) + (skip >> 3 & 1) + (skip >> 4 & 1) + - (skip >> 5 & 1) + (skip >> 6 & 1) + (skip >> 7 & 1); - - if (vtx_size > vb_stride) { - DRM_ERROR("vertex size greater than vb stride (%u > %u)\n", - vtx_size, vb_stride); - return -EINVAL; - } - - if (start + n > vb_size / (vb_stride * 4)) { - DRM_ERROR("vertex indices (%u-%u) out of range (0-%u)\n", - start, start + n - 1, vb_size / (vb_stride * 4)); - return -EINVAL; - } - - prim <<= 25; - while (n != 0) { - /* Can emit up to 255 vertices (85 triangles) at once. */ - unsigned int count = n > 255 ? 255 : n; - if (reorder) { - /* Need to reorder vertices for correct flat - * shading while preserving the clock sense - * for correct culling. Only on Savage3D. */ - int reorder[3] = { -1, -1, -1 }; - reorder[start % 3] = 2; - - BEGIN_DMA(count * vtx_size + 1); - DMA_DRAW_PRIMITIVE(count, prim, skip); - - for (i = start; i < start + count; ++i) { - unsigned int j = i + reorder[i % 3]; - DMA_COPY(&vtxbuf[vb_stride * j], vtx_size); - } - - DMA_COMMIT(); - } else { - BEGIN_DMA(count * vtx_size + 1); - DMA_DRAW_PRIMITIVE(count, prim, skip); - - if (vb_stride == vtx_size) { - DMA_COPY(&vtxbuf[vb_stride * start], - vtx_size * count); - } else { - for (i = start; i < start + count; ++i) { - DMA_COPY(&vtxbuf[vb_stride * i], - vtx_size); - } - } - - DMA_COMMIT(); - } - - start += count; - n -= count; - - prim |= BCI_CMD_DRAW_CONT; - } - - return 0; -} - -static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv, - const drm_savage_cmd_header_t *cmd_header, - const uint16_t *idx, - const struct drm_buf *dmabuf) -{ - unsigned char reorder = 0; - unsigned int prim = cmd_header->idx.prim; - unsigned int skip = cmd_header->idx.skip; - unsigned int n = cmd_header->idx.count; - unsigned int i; - BCI_LOCALS; - - if (!dmabuf) { - DRM_ERROR("called without dma buffers!\n"); - return -EINVAL; - } - - if (!n) - return 0; - - switch (prim) { - case SAVAGE_PRIM_TRILIST_201: - reorder = 1; - prim = SAVAGE_PRIM_TRILIST; - case SAVAGE_PRIM_TRILIST: - if (n % 3 != 0) { - DRM_ERROR("wrong number of indices %u in TRILIST\n", n); - return -EINVAL; - } - break; - case SAVAGE_PRIM_TRISTRIP: - case SAVAGE_PRIM_TRIFAN: - if (n < 3) { - DRM_ERROR - ("wrong number of indices %u in TRIFAN/STRIP\n", n); - return -EINVAL; - } - break; - default: - DRM_ERROR("invalid primitive type %u\n", prim); - return -EINVAL; - } - - if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - if (skip != 0) { - DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); - return -EINVAL; - } - } else { - unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) - - (skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) - - (skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1); - if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) { - DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); - return -EINVAL; - } - if (reorder) { - DRM_ERROR("TRILIST_201 used on Savage4 hardware\n"); - return -EINVAL; - } - } - - /* Vertex DMA doesn't work with command DMA at the same time, - * so we use BCI_... to submit commands here. Flush buffered - * faked DMA first. */ - DMA_FLUSH(); - - if (dmabuf->bus_address != dev_priv->state.common.vbaddr) { - BEGIN_BCI(2); - BCI_SET_REGISTERS(SAVAGE_VERTBUFADDR, 1); - BCI_WRITE(dmabuf->bus_address | dev_priv->dma_type); - dev_priv->state.common.vbaddr = dmabuf->bus_address; - } - if (S3_SAVAGE3D_SERIES(dev_priv->chipset) && dev_priv->waiting) { - /* Workaround for what looks like a hardware bug. If a - * WAIT_3D_IDLE was emitted some time before the - * indexed drawing command then the engine will lock - * up. There are two known workarounds: - * WAIT_IDLE_EMPTY or emit at least 63 NOPs. */ - BEGIN_BCI(63); - for (i = 0; i < 63; ++i) - BCI_WRITE(BCI_CMD_WAIT); - dev_priv->waiting = 0; - } - - prim <<= 25; - while (n != 0) { - /* Can emit up to 255 indices (85 triangles) at once. */ - unsigned int count = n > 255 ? 255 : n; - - /* check indices */ - for (i = 0; i < count; ++i) { - if (idx[i] > dmabuf->total / 32) { - DRM_ERROR("idx[%u]=%u out of range (0-%u)\n", - i, idx[i], dmabuf->total / 32); - return -EINVAL; - } - } - - if (reorder) { - /* Need to reorder indices for correct flat - * shading while preserving the clock sense - * for correct culling. Only on Savage3D. */ - int reorder[3] = { 2, -1, -1 }; - - BEGIN_BCI((count + 1 + 1) / 2); - BCI_DRAW_INDICES_S3D(count, prim, idx[2]); - - for (i = 1; i + 1 < count; i += 2) - BCI_WRITE(idx[i + reorder[i % 3]] | - (idx[i + 1 + - reorder[(i + 1) % 3]] << 16)); - if (i < count) - BCI_WRITE(idx[i + reorder[i % 3]]); - } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - BEGIN_BCI((count + 1 + 1) / 2); - BCI_DRAW_INDICES_S3D(count, prim, idx[0]); - - for (i = 1; i + 1 < count; i += 2) - BCI_WRITE(idx[i] | (idx[i + 1] << 16)); - if (i < count) - BCI_WRITE(idx[i]); - } else { - BEGIN_BCI((count + 2 + 1) / 2); - BCI_DRAW_INDICES_S4(count, prim, skip); - - for (i = 0; i + 1 < count; i += 2) - BCI_WRITE(idx[i] | (idx[i + 1] << 16)); - if (i < count) - BCI_WRITE(idx[i]); - } - - idx += count; - n -= count; - - prim |= BCI_CMD_DRAW_CONT; - } - - return 0; -} - -static int savage_dispatch_vb_idx(drm_savage_private_t *dev_priv, - const drm_savage_cmd_header_t *cmd_header, - const uint16_t *idx, - const uint32_t *vtxbuf, - unsigned int vb_size, unsigned int vb_stride) -{ - unsigned char reorder = 0; - unsigned int prim = cmd_header->idx.prim; - unsigned int skip = cmd_header->idx.skip; - unsigned int n = cmd_header->idx.count; - unsigned int vtx_size; - unsigned int i; - DMA_LOCALS; - - if (!n) - return 0; - - switch (prim) { - case SAVAGE_PRIM_TRILIST_201: - reorder = 1; - prim = SAVAGE_PRIM_TRILIST; - case SAVAGE_PRIM_TRILIST: - if (n % 3 != 0) { - DRM_ERROR("wrong number of indices %u in TRILIST\n", n); - return -EINVAL; - } - break; - case SAVAGE_PRIM_TRISTRIP: - case SAVAGE_PRIM_TRIFAN: - if (n < 3) { - DRM_ERROR - ("wrong number of indices %u in TRIFAN/STRIP\n", n); - return -EINVAL; - } - break; - default: - DRM_ERROR("invalid primitive type %u\n", prim); - return -EINVAL; - } - - if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - if (skip > SAVAGE_SKIP_ALL_S3D) { - DRM_ERROR("invalid skip flags 0x%04x\n", skip); - return -EINVAL; - } - vtx_size = 8; /* full vertex */ - } else { - if (skip > SAVAGE_SKIP_ALL_S4) { - DRM_ERROR("invalid skip flags 0x%04x\n", skip); - return -EINVAL; - } - vtx_size = 10; /* full vertex */ - } - - vtx_size -= (skip & 1) + (skip >> 1 & 1) + - (skip >> 2 & 1) + (skip >> 3 & 1) + (skip >> 4 & 1) + - (skip >> 5 & 1) + (skip >> 6 & 1) + (skip >> 7 & 1); - - if (vtx_size > vb_stride) { - DRM_ERROR("vertex size greater than vb stride (%u > %u)\n", - vtx_size, vb_stride); - return -EINVAL; - } - - prim <<= 25; - while (n != 0) { - /* Can emit up to 255 vertices (85 triangles) at once. */ - unsigned int count = n > 255 ? 255 : n; - - /* Check indices */ - for (i = 0; i < count; ++i) { - if (idx[i] > vb_size / (vb_stride * 4)) { - DRM_ERROR("idx[%u]=%u out of range (0-%u)\n", - i, idx[i], vb_size / (vb_stride * 4)); - return -EINVAL; - } - } - - if (reorder) { - /* Need to reorder vertices for correct flat - * shading while preserving the clock sense - * for correct culling. Only on Savage3D. */ - int reorder[3] = { 2, -1, -1 }; - - BEGIN_DMA(count * vtx_size + 1); - DMA_DRAW_PRIMITIVE(count, prim, skip); - - for (i = 0; i < count; ++i) { - unsigned int j = idx[i + reorder[i % 3]]; - DMA_COPY(&vtxbuf[vb_stride * j], vtx_size); - } - - DMA_COMMIT(); - } else { - BEGIN_DMA(count * vtx_size + 1); - DMA_DRAW_PRIMITIVE(count, prim, skip); - - for (i = 0; i < count; ++i) { - unsigned int j = idx[i]; - DMA_COPY(&vtxbuf[vb_stride * j], vtx_size); - } - - DMA_COMMIT(); - } - - idx += count; - n -= count; - - prim |= BCI_CMD_DRAW_CONT; - } - - return 0; -} - -static int savage_dispatch_clear(drm_savage_private_t *dev_priv, - const drm_savage_cmd_header_t *cmd_header, - const drm_savage_cmd_header_t *data, - unsigned int nbox, - const struct drm_clip_rect *boxes) -{ - unsigned int flags = cmd_header->clear0.flags; - unsigned int clear_cmd; - unsigned int i, nbufs; - DMA_LOCALS; - - if (nbox == 0) - return 0; - - clear_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP | - BCI_CMD_SEND_COLOR | BCI_CMD_DEST_PBD_NEW; - BCI_CMD_SET_ROP(clear_cmd,0xCC); - - nbufs = ((flags & SAVAGE_FRONT) ? 1 : 0) + - ((flags & SAVAGE_BACK) ? 1 : 0) + ((flags & SAVAGE_DEPTH) ? 1 : 0); - if (nbufs == 0) - return 0; - - if (data->clear1.mask != 0xffffffff) { - /* set mask */ - BEGIN_DMA(2); - DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1); - DMA_WRITE(data->clear1.mask); - DMA_COMMIT(); - } - for (i = 0; i < nbox; ++i) { - unsigned int x, y, w, h; - unsigned int buf; - - x = boxes[i].x1, y = boxes[i].y1; - w = boxes[i].x2 - boxes[i].x1; - h = boxes[i].y2 - boxes[i].y1; - BEGIN_DMA(nbufs * 6); - for (buf = SAVAGE_FRONT; buf <= SAVAGE_DEPTH; buf <<= 1) { - if (!(flags & buf)) - continue; - DMA_WRITE(clear_cmd); - switch (buf) { - case SAVAGE_FRONT: - DMA_WRITE(dev_priv->front_offset); - DMA_WRITE(dev_priv->front_bd); - break; - case SAVAGE_BACK: - DMA_WRITE(dev_priv->back_offset); - DMA_WRITE(dev_priv->back_bd); - break; - case SAVAGE_DEPTH: - DMA_WRITE(dev_priv->depth_offset); - DMA_WRITE(dev_priv->depth_bd); - break; - } - DMA_WRITE(data->clear1.value); - DMA_WRITE(BCI_X_Y(x, y)); - DMA_WRITE(BCI_W_H(w, h)); - } - DMA_COMMIT(); - } - if (data->clear1.mask != 0xffffffff) { - /* reset mask */ - BEGIN_DMA(2); - DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1); - DMA_WRITE(0xffffffff); - DMA_COMMIT(); - } - - return 0; -} - -static int savage_dispatch_swap(drm_savage_private_t *dev_priv, - unsigned int nbox, const struct drm_clip_rect *boxes) -{ - unsigned int swap_cmd; - unsigned int i; - DMA_LOCALS; - - if (nbox == 0) - return 0; - - swap_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP | - BCI_CMD_SRC_PBD_COLOR_NEW | BCI_CMD_DEST_GBD; - BCI_CMD_SET_ROP(swap_cmd,0xCC); - - for (i = 0; i < nbox; ++i) { - BEGIN_DMA(6); - DMA_WRITE(swap_cmd); - DMA_WRITE(dev_priv->back_offset); - DMA_WRITE(dev_priv->back_bd); - DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[i].y1)); - DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[i].y1)); - DMA_WRITE(BCI_W_H(boxes[i].x2 - boxes[i].x1, - boxes[i].y2 - boxes[i].y1)); - DMA_COMMIT(); - } - - return 0; -} - -static int savage_dispatch_draw(drm_savage_private_t *dev_priv, - const drm_savage_cmd_header_t *start, - const drm_savage_cmd_header_t *end, - const struct drm_buf *dmabuf, - const unsigned int *vtxbuf, - unsigned int vb_size, unsigned int vb_stride, - unsigned int nbox, - const struct drm_clip_rect *boxes) -{ - unsigned int i, j; - int ret; - - for (i = 0; i < nbox; ++i) { - const drm_savage_cmd_header_t *cmdbuf; - dev_priv->emit_clip_rect(dev_priv, &boxes[i]); - - cmdbuf = start; - while (cmdbuf < end) { - drm_savage_cmd_header_t cmd_header; - cmd_header = *cmdbuf; - cmdbuf++; - switch (cmd_header.cmd.cmd) { - case SAVAGE_CMD_DMA_PRIM: - ret = savage_dispatch_dma_prim( - dev_priv, &cmd_header, dmabuf); - break; - case SAVAGE_CMD_VB_PRIM: - ret = savage_dispatch_vb_prim( - dev_priv, &cmd_header, - vtxbuf, vb_size, vb_stride); - break; - case SAVAGE_CMD_DMA_IDX: - j = (cmd_header.idx.count + 3) / 4; - /* j was check in savage_bci_cmdbuf */ - ret = savage_dispatch_dma_idx(dev_priv, - &cmd_header, (const uint16_t *)cmdbuf, - dmabuf); - cmdbuf += j; - break; - case SAVAGE_CMD_VB_IDX: - j = (cmd_header.idx.count + 3) / 4; - /* j was check in savage_bci_cmdbuf */ - ret = savage_dispatch_vb_idx(dev_priv, - &cmd_header, (const uint16_t *)cmdbuf, - (const uint32_t *)vtxbuf, vb_size, - vb_stride); - cmdbuf += j; - break; - default: - /* What's the best return code? EFAULT? */ - DRM_ERROR("IMPLEMENTATION ERROR: " - "non-drawing-command %d\n", - cmd_header.cmd.cmd); - return -EINVAL; - } - - if (ret != 0) - return ret; - } - } - - return 0; -} - -int savage_bci_cmdbuf(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_savage_private_t *dev_priv = dev->dev_private; - struct drm_device_dma *dma = dev->dma; - struct drm_buf *dmabuf; - drm_savage_cmdbuf_t *cmdbuf = data; - drm_savage_cmd_header_t *kcmd_addr = NULL; - drm_savage_cmd_header_t *first_draw_cmd; - unsigned int *kvb_addr = NULL; - struct drm_clip_rect *kbox_addr = NULL; - unsigned int i, j; - int ret = 0; - - DRM_DEBUG("\n"); - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - if (dma && dma->buflist) { - if (cmdbuf->dma_idx > dma->buf_count) { - DRM_ERROR - ("vertex buffer index %u out of range (0-%u)\n", - cmdbuf->dma_idx, dma->buf_count - 1); - return -EINVAL; - } - dmabuf = dma->buflist[cmdbuf->dma_idx]; - } else { - dmabuf = NULL; - } - - /* Copy the user buffers into kernel temporary areas. This hasn't been - * a performance loss compared to VERIFYAREA_READ/ - * COPY_FROM_USER_UNCHECKED when done in other drivers, and is correct - * for locking on FreeBSD. - */ - if (cmdbuf->size) { - kcmd_addr = drm_alloc(cmdbuf->size * 8, DRM_MEM_DRIVER); - if (kcmd_addr == NULL) - return -ENOMEM; - - if (DRM_COPY_FROM_USER(kcmd_addr, cmdbuf->cmd_addr, - cmdbuf->size * 8)) - { - drm_free(kcmd_addr, cmdbuf->size * 8, DRM_MEM_DRIVER); - return -EFAULT; - } - cmdbuf->cmd_addr = kcmd_addr; - } - if (cmdbuf->vb_size) { - kvb_addr = drm_alloc(cmdbuf->vb_size, DRM_MEM_DRIVER); - if (kvb_addr == NULL) { - ret = -ENOMEM; - goto done; - } - - if (DRM_COPY_FROM_USER(kvb_addr, cmdbuf->vb_addr, - cmdbuf->vb_size)) { - ret = -EFAULT; - goto done; - } - cmdbuf->vb_addr = kvb_addr; - } - if (cmdbuf->nbox) { - kbox_addr = drm_alloc(cmdbuf->nbox * - sizeof(struct drm_clip_rect), - DRM_MEM_DRIVER); - if (kbox_addr == NULL) { - ret = -ENOMEM; - goto done; - } - - if (DRM_COPY_FROM_USER(kbox_addr, cmdbuf->box_addr, - cmdbuf->nbox * - sizeof(struct drm_clip_rect))) { - ret = -EFAULT; - goto done; - } - cmdbuf->box_addr = kbox_addr; - } - - /* Make sure writes to DMA buffers are finished before sending - * DMA commands to the graphics hardware. */ - DRM_MEMORYBARRIER(); - - /* Coming from user space. Don't know if the Xserver has - * emitted wait commands. Assuming the worst. */ - dev_priv->waiting = 1; - - i = 0; - first_draw_cmd = NULL; - while (i < cmdbuf->size) { - drm_savage_cmd_header_t cmd_header; - cmd_header = *(drm_savage_cmd_header_t *)cmdbuf->cmd_addr; - cmdbuf->cmd_addr++; - i++; - - /* Group drawing commands with same state to minimize - * iterations over clip rects. */ - j = 0; - switch (cmd_header.cmd.cmd) { - case SAVAGE_CMD_DMA_IDX: - case SAVAGE_CMD_VB_IDX: - j = (cmd_header.idx.count + 3) / 4; - if (i + j > cmdbuf->size) { - DRM_ERROR("indexed drawing command extends " - "beyond end of command buffer\n"); - DMA_FLUSH(); - return -EINVAL; - } - /* fall through */ - case SAVAGE_CMD_DMA_PRIM: - case SAVAGE_CMD_VB_PRIM: - if (!first_draw_cmd) - first_draw_cmd = cmdbuf->cmd_addr - 1; - cmdbuf->cmd_addr += j; - i += j; - break; - default: - if (first_draw_cmd) { - ret = savage_dispatch_draw( - dev_priv, first_draw_cmd, - cmdbuf->cmd_addr - 1, - dmabuf, cmdbuf->vb_addr, - cmdbuf->vb_size, - cmdbuf->vb_stride, - cmdbuf->nbox, cmdbuf->box_addr); - if (ret != 0) - return ret; - first_draw_cmd = NULL; - } - } - if (first_draw_cmd) - continue; - - switch (cmd_header.cmd.cmd) { - case SAVAGE_CMD_STATE: - j = (cmd_header.state.count + 1) / 2; - if (i + j > cmdbuf->size) { - DRM_ERROR("command SAVAGE_CMD_STATE extends " - "beyond end of command buffer\n"); - DMA_FLUSH(); - ret = -EINVAL; - goto done; - } - ret = savage_dispatch_state(dev_priv, &cmd_header, - (const uint32_t *)cmdbuf->cmd_addr); - cmdbuf->cmd_addr += j; - i += j; - break; - case SAVAGE_CMD_CLEAR: - if (i + 1 > cmdbuf->size) { - DRM_ERROR("command SAVAGE_CMD_CLEAR extends " - "beyond end of command buffer\n"); - DMA_FLUSH(); - ret = -EINVAL; - goto done; - } - ret = savage_dispatch_clear(dev_priv, &cmd_header, - cmdbuf->cmd_addr, - cmdbuf->nbox, - cmdbuf->box_addr); - cmdbuf->cmd_addr++; - i++; - break; - case SAVAGE_CMD_SWAP: - ret = savage_dispatch_swap(dev_priv, cmdbuf->nbox, - cmdbuf->box_addr); - break; - default: - DRM_ERROR("invalid command 0x%x\n", - cmd_header.cmd.cmd); - DMA_FLUSH(); - ret = -EINVAL; - goto done; - } - - if (ret != 0) { - DMA_FLUSH(); - goto done; - } - } - - if (first_draw_cmd) { - ret = savage_dispatch_draw( - dev_priv, first_draw_cmd, cmdbuf->cmd_addr, dmabuf, - cmdbuf->vb_addr, cmdbuf->vb_size, cmdbuf->vb_stride, - cmdbuf->nbox, cmdbuf->box_addr); - if (ret != 0) { - DMA_FLUSH(); - goto done; - } - } - - DMA_FLUSH(); - - if (dmabuf && cmdbuf->discard) { - drm_savage_buf_priv_t *buf_priv = dmabuf->dev_private; - uint16_t event; - event = savage_bci_emit_event(dev_priv, SAVAGE_WAIT_3D); - SET_AGE(&buf_priv->age, event, dev_priv->event_wrap); - savage_freelist_put(dev, dmabuf); - } - -done: - /* If we didn't need to allocate them, these'll be NULL */ - drm_free(kcmd_addr, cmdbuf->size * 8, DRM_MEM_DRIVER); - drm_free(kvb_addr, cmdbuf->vb_size, DRM_MEM_DRIVER); - drm_free(kbox_addr, cmdbuf->nbox * sizeof(struct drm_clip_rect), - DRM_MEM_DRIVER); - - return ret; -} diff --git a/sys/dev/drm/sis_drm.h b/sys/dev/drm/sis_drm.h deleted file mode 100644 index 6b260a37386e..000000000000 --- a/sys/dev/drm/sis_drm.h +++ /dev/null @@ -1,70 +0,0 @@ -/* sis_drv.h -- Private header for sis driver -*- linux-c -*- */ -/*- - * Copyright 2005 Eric Anholt - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __SIS_DRM_H__ -#define __SIS_DRM_H__ - -/* SiS specific ioctls */ -#define NOT_USED_0_3 -#define DRM_SIS_FB_ALLOC 0x04 -#define DRM_SIS_FB_FREE 0x05 -#define NOT_USED_6_12 -#define DRM_SIS_AGP_INIT 0x13 -#define DRM_SIS_AGP_ALLOC 0x14 -#define DRM_SIS_AGP_FREE 0x15 -#define DRM_SIS_FB_INIT 0x16 - -#define DRM_IOCTL_SIS_FB_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_FB_ALLOC, drm_sis_mem_t) -#define DRM_IOCTL_SIS_FB_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_FB_FREE, drm_sis_mem_t) -#define DRM_IOCTL_SIS_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_INIT, drm_sis_agp_t) -#define DRM_IOCTL_SIS_AGP_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_ALLOC, drm_sis_mem_t) -#define DRM_IOCTL_SIS_AGP_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_AGP_FREE, drm_sis_mem_t) -#define DRM_IOCTL_SIS_FB_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_FB_INIT, drm_sis_fb_t) -/* -#define DRM_IOCTL_SIS_FLIP DRM_IOW( 0x48, drm_sis_flip_t) -#define DRM_IOCTL_SIS_FLIP_INIT DRM_IO( 0x49) -#define DRM_IOCTL_SIS_FLIP_FINAL DRM_IO( 0x50) -*/ - -typedef struct { - int context; - unsigned int offset; - unsigned int size; - unsigned long free; -} drm_sis_mem_t; - -typedef struct { - unsigned int offset, size; -} drm_sis_agp_t; - -typedef struct { - unsigned int offset, size; -} drm_sis_fb_t; - -#endif /* __SIS_DRM_H__ */ diff --git a/sys/dev/drm/sis_drv.c b/sys/dev/drm/sis_drv.c deleted file mode 100644 index 8e82ac09fae2..000000000000 --- a/sys/dev/drm/sis_drv.c +++ /dev/null @@ -1,111 +0,0 @@ -/* sis.c -- sis driver -*- linux-c -*- - */ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/sis_drm.h" -#include "dev/drm/sis_drv.h" -#include "dev/drm/drm_pciids.h" - -/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */ -static drm_pci_id_list_t sis_pciidlist[] = { - sis_PCI_IDS -}; - -static void sis_configure(struct drm_device *dev) -{ - dev->driver->driver_features = - DRIVER_USE_AGP | DRIVER_USE_MTRR; - - dev->driver->buf_priv_size = 1; /* No dev_priv */ - dev->driver->context_ctor = sis_init_context; - dev->driver->context_dtor = sis_final_context; - - dev->driver->ioctls = sis_ioctls; - dev->driver->max_ioctl = sis_max_ioctl; - - dev->driver->name = DRIVER_NAME; - dev->driver->desc = DRIVER_DESC; - dev->driver->date = DRIVER_DATE; - dev->driver->major = DRIVER_MAJOR; - dev->driver->minor = DRIVER_MINOR; - dev->driver->patchlevel = DRIVER_PATCHLEVEL; -} - -static int -sis_probe(device_t kdev) -{ - return drm_probe(kdev, sis_pciidlist); -} - -static int -sis_attach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - - dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER, - M_WAITOK | M_ZERO); - - sis_configure(dev); - - return drm_attach(kdev, sis_pciidlist); -} - -static int -sis_detach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - int ret; - - ret = drm_detach(kdev); - - free(dev->driver, DRM_MEM_DRIVER); - - return ret; -} - -static device_method_t sis_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, sis_probe), - DEVMETHOD(device_attach, sis_attach), - DEVMETHOD(device_detach, sis_detach), - - { 0, 0 } -}; - -static driver_t sis_driver = { - "drm", - sis_methods, - sizeof(struct drm_device) -}; - -extern devclass_t drm_devclass; -DRIVER_MODULE(sisdrm, vgapci, sis_driver, drm_devclass, 0, 0); -MODULE_DEPEND(sisdrm, drm, 1, 1, 1); diff --git a/sys/dev/drm/sis_drv.h b/sys/dev/drm/sis_drv.h deleted file mode 100644 index 18b1503cb37e..000000000000 --- a/sys/dev/drm/sis_drv.h +++ /dev/null @@ -1,93 +0,0 @@ -/* sis_drv.h -- Private header for sis driver -*- linux-c -*- */ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef _SIS_DRV_H_ -#define _SIS_DRV_H_ - -/* General customization: - */ - -#define DRIVER_AUTHOR "SIS, Tungsten Graphics" -#define DRIVER_NAME "sis" -#define DRIVER_DESC "SIS 300/630/540 and XGI V3XE/V5/V8" -#define DRIVER_DATE "20070626" -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 3 -#define DRIVER_PATCHLEVEL 0 - -enum sis_family { - SIS_OTHER = 0, - SIS_CHIP_315 = 1, -}; - -#if defined(__linux__) -#define SIS_HAVE_CORE_MM -#endif - -#ifdef SIS_HAVE_CORE_MM -#include "dev/drm/drm_sman.h" - -#define SIS_BASE (dev_priv->mmio) -#define SIS_READ(reg) DRM_READ32(SIS_BASE, reg); -#define SIS_WRITE(reg, val) DRM_WRITE32(SIS_BASE, reg, val); - -typedef struct drm_sis_private { - drm_local_map_t *mmio; - unsigned int idle_fault; - struct drm_sman sman; - unsigned int chipset; - int vram_initialized; - int agp_initialized; - unsigned long vram_offset; - unsigned long agp_offset; -} drm_sis_private_t; - -extern int sis_idle(struct drm_device *dev); -extern void sis_reclaim_buffers_locked(struct drm_device *dev, - struct drm_file *file_priv); -extern void sis_lastclose(struct drm_device *dev); - -#else -#include "dev/drm/sis_ds.h" - -typedef struct drm_sis_private { - memHeap_t *AGPHeap; - memHeap_t *FBHeap; -} drm_sis_private_t; - -extern int sis_init_context(struct drm_device * dev, int context); -extern int sis_final_context(struct drm_device * dev, int context); - -#endif - -extern struct drm_ioctl_desc sis_ioctls[]; -extern int sis_max_ioctl; - -#endif diff --git a/sys/dev/drm/sis_ds.c b/sys/dev/drm/sis_ds.c deleted file mode 100644 index fc5be83de292..000000000000 --- a/sys/dev/drm/sis_ds.c +++ /dev/null @@ -1,302 +0,0 @@ -/* sis_ds.c -- Private header for Direct Rendering Manager -*- linux-c -*- - * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw - * - * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Sung-Ching Lin <sclin@sis.com.tw> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/sis_ds.h" - -/* Set Data Structure, not check repeated value - * temporarily used - */ - -set_t *setInit(void) -{ - int i; - set_t *set; - - set = (set_t *) drm_alloc(sizeof(set_t), DRM_MEM_DRIVER); - if (set != NULL) { - for (i = 0; i < SET_SIZE; i++) { - set->list[i].free_next = i + 1; - set->list[i].alloc_next = -1; - } - set->list[SET_SIZE - 1].free_next = -1; - set->free = 0; - set->alloc = -1; - set->trace = -1; - } - return set; -} - -int setAdd(set_t * set, ITEM_TYPE item) -{ - int free = set->free; - - if (free != -1) { - set->list[free].val = item; - set->free = set->list[free].free_next; - } else { - return 0; - } - - set->list[free].alloc_next = set->alloc; - set->alloc = free; - set->list[free].free_next = -1; - - return 1; -} - -int setDel(set_t * set, ITEM_TYPE item) -{ - int alloc = set->alloc; - int prev = -1; - - while (alloc != -1) { - if (set->list[alloc].val == item) { - if (prev != -1) - set->list[prev].alloc_next = - set->list[alloc].alloc_next; - else - set->alloc = set->list[alloc].alloc_next; - break; - } - prev = alloc; - alloc = set->list[alloc].alloc_next; - } - - if (alloc == -1) - return 0; - - set->list[alloc].free_next = set->free; - set->free = alloc; - set->list[alloc].alloc_next = -1; - - return 1; -} - -/* setFirst -> setAdd -> setNext is wrong */ - -int setFirst(set_t * set, ITEM_TYPE * item) -{ - if (set->alloc == -1) - return 0; - - *item = set->list[set->alloc].val; - set->trace = set->list[set->alloc].alloc_next; - - return 1; -} - -int setNext(set_t * set, ITEM_TYPE * item) -{ - if (set->trace == -1) - return 0; - - *item = set->list[set->trace].val; - set->trace = set->list[set->trace].alloc_next; - - return 1; -} - -int setDestroy(set_t * set) -{ - drm_free(set, sizeof(set_t), DRM_MEM_DRIVER); - - return 1; -} - -/* - * GLX Hardware Device Driver common code - * Copyright (C) 1999 Wittawat Yamwong - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * WITTAWAT YAMWONG, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE - * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -#define ISFREE(bptr) ((bptr)->free) - -memHeap_t *mmInit(int ofs, int size) -{ - PMemBlock blocks; - - if (size <= 0) - return NULL; - - blocks = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock), DRM_MEM_DRIVER); - if (blocks != NULL) { - blocks->ofs = ofs; - blocks->size = size; - blocks->free = 1; - return (memHeap_t *) blocks; - } else - return NULL; -} - -/* Checks if a pointer 'b' is part of the heap 'heap' */ -int mmBlockInHeap(memHeap_t * heap, PMemBlock b) -{ - TMemBlock *p; - - if (heap == NULL || b == NULL) - return 0; - - p = heap; - while (p != NULL && p != b) { - p = p->next; - } - if (p == b) - return 1; - else - return 0; -} - -static TMemBlock *SliceBlock(TMemBlock * p, - int startofs, int size, - int reserved, int alignment) -{ - TMemBlock *newblock; - - /* break left */ - if (startofs > p->ofs) { - newblock = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock), - DRM_MEM_DRIVER); - newblock->ofs = startofs; - newblock->size = p->size - (startofs - p->ofs); - newblock->free = 1; - newblock->next = p->next; - p->size -= newblock->size; - p->next = newblock; - p = newblock; - } - - /* break right */ - if (size < p->size) { - newblock = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock), - DRM_MEM_DRIVER); - newblock->ofs = startofs + size; - newblock->size = p->size - size; - newblock->free = 1; - newblock->next = p->next; - p->size = size; - p->next = newblock; - } - - /* p = middle block */ - p->align = alignment; - p->free = 0; - p->reserved = reserved; - return p; -} - -PMemBlock mmAllocMem(memHeap_t * heap, int size, int align2, int startSearch) -{ - int mask, startofs, endofs; - TMemBlock *p; - - if (heap == NULL || align2 < 0 || size <= 0) - return NULL; - - mask = (1 << align2) - 1; - startofs = 0; - p = (TMemBlock *) heap; - while (p != NULL) { - if (ISFREE(p)) { - startofs = (p->ofs + mask) & ~mask; - if (startofs < startSearch) { - startofs = startSearch; - } - endofs = startofs + size; - if (endofs <= (p->ofs + p->size)) - break; - } - p = p->next; - } - if (p == NULL) - return NULL; - p = SliceBlock(p, startofs, size, 0, mask + 1); - p->heap = heap; - return p; -} - -static __inline__ int Join2Blocks(TMemBlock * p) -{ - if (p->free && p->next && p->next->free) { - TMemBlock *q = p->next; - p->size += q->size; - p->next = q->next; - drm_free(q, sizeof(TMemBlock), DRM_MEM_DRIVER); - return 1; - } - return 0; -} - -int mmFreeMem(PMemBlock b) -{ - TMemBlock *p, *prev; - - if (b == NULL) - return 0; - if (b->heap == NULL) - return -1; - - p = b->heap; - prev = NULL; - while (p != NULL && p != b) { - prev = p; - p = p->next; - } - if (p == NULL || p->free || p->reserved) - return -1; - - p->free = 1; - Join2Blocks(p); - if (prev) - Join2Blocks(prev); - return 0; -} diff --git a/sys/dev/drm/sis_ds.h b/sys/dev/drm/sis_ds.h deleted file mode 100644 index 94c7e04a9fc1..000000000000 --- a/sys/dev/drm/sis_ds.h +++ /dev/null @@ -1,149 +0,0 @@ -/* sis_ds.h -- Private header for Direct Rendering Manager -*- linux-c -*- - * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw - */ -/*- - * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Sung-Ching Lin <sclin@sis.com.tw> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __SIS_DS_H__ -#define __SIS_DS_H__ - -/* Set Data Structure */ - -#define SET_SIZE 5000 - -typedef unsigned long ITEM_TYPE; - -typedef struct { - ITEM_TYPE val; - int alloc_next, free_next; -} list_item_t; - -typedef struct { - int alloc; - int free; - int trace; - list_item_t list[SET_SIZE]; -} set_t; - -set_t *setInit(void); -int setAdd(set_t * set, ITEM_TYPE item); -int setDel(set_t * set, ITEM_TYPE item); -int setFirst(set_t * set, ITEM_TYPE * item); -int setNext(set_t * set, ITEM_TYPE * item); -int setDestroy(set_t * set); - -/* - * GLX Hardware Device Driver common code - * Copyright (C) 1999 Wittawat Yamwong - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * WITTAWAT YAMWONG, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE - * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -struct mem_block_t { - struct mem_block_t *next; - struct mem_block_t *heap; - int ofs, size; - int align; - unsigned int free:1; - unsigned int reserved:1; -}; -typedef struct mem_block_t TMemBlock; -typedef struct mem_block_t *PMemBlock; - -/* a heap is just the first block in a chain */ -typedef struct mem_block_t memHeap_t; - -static __inline__ int mmBlockSize(PMemBlock b) -{ - return b->size; -} - -static __inline__ int mmOffset(PMemBlock b) -{ - return b->ofs; -} - -static __inline__ void mmMarkReserved(PMemBlock b) -{ - b->reserved = 1; -} - -/* - * input: total size in bytes - * return: a heap pointer if OK, NULL if error - */ -memHeap_t *mmInit(int ofs, int size); - -/* - * Allocate 'size' bytes with 2^align2 bytes alignment, - * restrict the search to free memory after 'startSearch' - * depth and back buffers should be in different 4mb banks - * to get better page hits if possible - * input: size = size of block - * align2 = 2^align2 bytes alignment - * startSearch = linear offset from start of heap to begin search - * return: pointer to the allocated block, 0 if error - */ -PMemBlock mmAllocMem(memHeap_t * heap, int size, int align2, int startSearch); - -/* - * Returns 1 if the block 'b' is part of the heap 'heap' - */ -int mmBlockInHeap(PMemBlock heap, PMemBlock b); - -/* - * Free block starts at offset - * input: pointer to a block - * return: 0 if OK, -1 if error - */ -int mmFreeMem(PMemBlock b); - -/* For debuging purpose. */ -void mmDumpMemInfo(memHeap_t * mmInit); - -#endif /* __SIS_DS_H__ */ diff --git a/sys/dev/drm/sis_mm.c b/sys/dev/drm/sis_mm.c deleted file mode 100644 index ea04eaa71140..000000000000 --- a/sys/dev/drm/sis_mm.c +++ /dev/null @@ -1,389 +0,0 @@ -/* sis_mm.c -- Private header for Direct Rendering Manager -*- linux-c -*- - * Created: Mon Jan 4 10:05:05 1999 by sclin@sis.com.tw - * - * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Sung-Ching Lin <sclin@sis.com.tw> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#if defined(__linux__) && defined(CONFIG_FB_SIS) -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) -#include <video/sisfb.h> -#else -#include <linux/sisfb.h> -#endif -#endif -#include "dev/drm/drmP.h" -#include "dev/drm/sis_drm.h" -#include "dev/drm/sis_drv.h" -#include "dev/drm/sis_ds.h" - -#define MAX_CONTEXT 100 -#define VIDEO_TYPE 0 -#define AGP_TYPE 1 - -typedef struct { - int used; - int context; - set_t *sets[2]; /* 0 for video, 1 for AGP */ -} sis_context_t; - -static sis_context_t global_ppriv[MAX_CONTEXT]; - -static int add_alloc_set(int context, int type, unsigned int val) -{ - int i, retval = 0; - - for (i = 0; i < MAX_CONTEXT; i++) { - if (global_ppriv[i].used && global_ppriv[i].context == context) { - retval = setAdd(global_ppriv[i].sets[type], val); - break; - } - } - return retval; -} - -static int del_alloc_set(int context, int type, unsigned int val) -{ - int i, retval = 0; - - for (i = 0; i < MAX_CONTEXT; i++) { - if (global_ppriv[i].used && global_ppriv[i].context == context) { - retval = setDel(global_ppriv[i].sets[type], val); - break; - } - } - return retval; -} - -/* fb management via fb device */ -#if defined(__linux__) && defined(CONFIG_FB_SIS) - -static int sis_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - return 0; -} - -static int sis_fb_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_sis_mem_t *fb = data; - struct sis_memreq req; - int retval = 0; - - req.size = fb->size; - sis_malloc(&req); - if (req.offset) { - /* TODO */ - fb->offset = req.offset; - fb->free = req.offset; - if (!add_alloc_set(fb->context, VIDEO_TYPE, fb->free)) { - DRM_DEBUG("adding to allocation set fails\n"); - sis_free(req.offset); - retval = -EINVAL; - } - } else { - fb->offset = 0; - fb->size = 0; - fb->free = 0; - } - - DRM_DEBUG("alloc fb, size = %d, offset = %ld\n", fb->size, req.offset); - - return retval; -} - -static int sis_fb_free(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_sis_mem_t fb; - int retval = 0; - - if (!fb->free) - return -EINVAL; - - if (!del_alloc_set(fb->context, VIDEO_TYPE, fb->free)) - retval = -EINVAL; - sis_free(fb->free); - - DRM_DEBUG("free fb, offset = 0x%lx\n", fb->free); - - return retval; -} - -#else - -/* Called by the X Server to initialize the FB heap. Allocations will fail - * unless this is called. Offset is the beginning of the heap from the - * framebuffer offset (MaxXFBMem in XFree86). - * - * Memory layout according to Thomas Winischofer: - * |------------------|DDDDDDDDDDDDDDDDDDDDDDDDDDDDD|HHHH|CCCCCCCCCCC| - * - * X driver/sisfb HW- Command- - * framebuffer memory DRI heap Cursor queue - */ -static int sis_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_fb_t *fb = data; - - if (dev_priv == NULL) { - dev->dev_private = drm_calloc(1, sizeof(drm_sis_private_t), - DRM_MEM_DRIVER); - dev_priv = dev->dev_private; - if (dev_priv == NULL) - return ENOMEM; - } - - if (dev_priv->FBHeap != NULL) - return -EINVAL; - - dev_priv->FBHeap = mmInit(fb->offset, fb->size); - - DRM_DEBUG("offset = %u, size = %u", fb->offset, fb->size); - - return 0; -} - -static int sis_fb_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_mem_t *fb = data; - PMemBlock block; - int retval = 0; - - if (dev_priv == NULL || dev_priv->FBHeap == NULL) - return -EINVAL; - - block = mmAllocMem(dev_priv->FBHeap, fb->size, 0, 0); - if (block) { - /* TODO */ - fb->offset = block->ofs; - fb->free = (unsigned long)block; - if (!add_alloc_set(fb->context, VIDEO_TYPE, fb->free)) { - DRM_DEBUG("adding to allocation set fails\n"); - mmFreeMem((PMemBlock) fb->free); - retval = -EINVAL; - } - } else { - fb->offset = 0; - fb->size = 0; - fb->free = 0; - } - - DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb->size, fb->offset); - - return retval; -} - -static int sis_fb_free(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_mem_t *fb = data; - - if (dev_priv == NULL || dev_priv->FBHeap == NULL) - return -EINVAL; - - if (!mmBlockInHeap(dev_priv->FBHeap, (PMemBlock) fb->free)) - return -EINVAL; - - if (!del_alloc_set(fb->context, VIDEO_TYPE, fb->free)) - return -EINVAL; - mmFreeMem((PMemBlock) fb->free); - - DRM_DEBUG("free fb, free = 0x%lx\n", fb->free); - - return 0; -} - -#endif - -/* agp memory management */ - -static int sis_ioctl_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_agp_t *agp = data; - - if (dev_priv == NULL) { - dev->dev_private = drm_calloc(1, sizeof(drm_sis_private_t), - DRM_MEM_DRIVER); - dev_priv = dev->dev_private; - if (dev_priv == NULL) - return ENOMEM; - } - - if (dev_priv->AGPHeap != NULL) - return -EINVAL; - - dev_priv->AGPHeap = mmInit(agp->offset, agp->size); - - DRM_DEBUG("offset = %u, size = %u", agp->offset, agp->size); - - return 0; -} - -static int sis_ioctl_agp_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_mem_t *agp = data; - PMemBlock block; - int retval = 0; - - if (dev_priv == NULL || dev_priv->AGPHeap == NULL) - return -EINVAL; - - block = mmAllocMem(dev_priv->AGPHeap, agp->size, 0, 0); - if (block) { - /* TODO */ - agp->offset = block->ofs; - agp->free = (unsigned long)block; - if (!add_alloc_set(agp->context, AGP_TYPE, agp->free)) { - DRM_DEBUG("adding to allocation set fails\n"); - mmFreeMem((PMemBlock) agp->free); - retval = -1; - } - } else { - agp->offset = 0; - agp->size = 0; - agp->free = 0; - } - - DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp->size, - agp->offset); - - return retval; -} - -static int sis_ioctl_agp_free(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_sis_private_t *dev_priv = dev->dev_private; - drm_sis_mem_t *agp = data; - - if (dev_priv == NULL || dev_priv->AGPHeap == NULL) - return -EINVAL; - - if (!mmBlockInHeap(dev_priv->AGPHeap, (PMemBlock) agp->free)) - return -EINVAL; - - mmFreeMem((PMemBlock) agp->free); - if (!del_alloc_set(agp->context, AGP_TYPE, agp->free)) - return -EINVAL; - - DRM_DEBUG("free agp, free = 0x%lx\n", agp->free); - - return 0; -} - -int sis_init_context(struct drm_device *dev, int context) -{ - int i; - - for (i = 0; i < MAX_CONTEXT; i++) { - if (global_ppriv[i].used && - (global_ppriv[i].context == context)) - break; - } - - if (i >= MAX_CONTEXT) { - for (i = 0; i < MAX_CONTEXT; i++) { - if (!global_ppriv[i].used) { - global_ppriv[i].context = context; - global_ppriv[i].used = 1; - global_ppriv[i].sets[0] = setInit(); - global_ppriv[i].sets[1] = setInit(); - DRM_DEBUG("init allocation set, socket=%d, " - "context = %d\n", i, context); - break; - } - } - if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) || - (global_ppriv[i].sets[1] == NULL)) { - return 0; - } - } - - return 1; -} - -int sis_final_context(struct drm_device *dev, int context) -{ - int i; - - for (i = 0; i < MAX_CONTEXT; i++) { - if (global_ppriv[i].used && - (global_ppriv[i].context == context)) - break; - } - - if (i < MAX_CONTEXT) { - set_t *set; - ITEM_TYPE item; - int retval; - - DRM_DEBUG("find socket %d, context = %d\n", i, context); - - /* Video Memory */ - set = global_ppriv[i].sets[0]; - retval = setFirst(set, &item); - while (retval) { - DRM_DEBUG("free video memory 0x%lx\n", item); -#if defined(__linux__) && defined(CONFIG_FB_SIS) - sis_free(item); -#else - mmFreeMem((PMemBlock) item); -#endif - retval = setNext(set, &item); - } - setDestroy(set); - - /* AGP Memory */ - set = global_ppriv[i].sets[1]; - retval = setFirst(set, &item); - while (retval) { - DRM_DEBUG("free agp memory 0x%lx\n", item); - mmFreeMem((PMemBlock) item); - retval = setNext(set, &item); - } - setDestroy(set); - - global_ppriv[i].used = 0; - } - - return 1; -} - -drm_ioctl_desc_t sis_ioctls[] = { - DRM_IOCTL_DEF(DRM_SIS_FB_ALLOC, sis_fb_alloc, DRM_AUTH), - DRM_IOCTL_DEF(DRM_SIS_FB_FREE, sis_fb_free, DRM_AUTH), - DRM_IOCTL_DEF(DRM_SIS_AGP_INIT, sis_ioctl_agp_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_SIS_AGP_ALLOC, sis_ioctl_agp_alloc, DRM_AUTH), - DRM_IOCTL_DEF(DRM_SIS_AGP_FREE, sis_ioctl_agp_free, DRM_AUTH), - DRM_IOCTL_DEF(DRM_SIS_FB_INIT, sis_fb_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY) -}; - -int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls); diff --git a/sys/dev/drm/tdfx_drv.c b/sys/dev/drm/tdfx_drv.c deleted file mode 100644 index 2fe9eee634c8..000000000000 --- a/sys/dev/drm/tdfx_drv.c +++ /dev/null @@ -1,113 +0,0 @@ -/* tdfx_drv.c -- tdfx driver -*- linux-c -*- - * Created: Thu Oct 7 10:38:32 1999 by faith@precisioninsight.com - */ -/*- - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Daryll Strauss <daryll@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/tdfx_drv.h" -#include "dev/drm/drmP.h" -#include "dev/drm/drm_pciids.h" - -/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */ -static drm_pci_id_list_t tdfx_pciidlist[] = { - tdfx_PCI_IDS -}; - -static void tdfx_configure(struct drm_device *dev) -{ - dev->driver->driver_features = - DRIVER_USE_MTRR; - - dev->driver->buf_priv_size = 1; /* No dev_priv */ - - dev->driver->max_ioctl = 0; - - dev->driver->name = DRIVER_NAME; - dev->driver->desc = DRIVER_DESC; - dev->driver->date = DRIVER_DATE; - dev->driver->major = DRIVER_MAJOR; - dev->driver->minor = DRIVER_MINOR; - dev->driver->patchlevel = DRIVER_PATCHLEVEL; -} - -static int -tdfx_probe(device_t kdev) -{ - return drm_probe(kdev, tdfx_pciidlist); -} - -static int -tdfx_attach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - - dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER, - M_WAITOK | M_ZERO); - - tdfx_configure(dev); - - return drm_attach(kdev, tdfx_pciidlist); -} - -static int -tdfx_detach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - int ret; - - ret = drm_detach(kdev); - - free(dev->driver, DRM_MEM_DRIVER); - - return ret; -} - -static device_method_t tdfx_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, tdfx_probe), - DEVMETHOD(device_attach, tdfx_attach), - DEVMETHOD(device_detach, tdfx_detach), - - { 0, 0 } -}; - -static driver_t tdfx_driver = { - "drm", - tdfx_methods, - sizeof(struct drm_device) -}; - -extern devclass_t drm_devclass; -DRIVER_MODULE(tdfx, vgapci, tdfx_driver, drm_devclass, 0, 0); -MODULE_DEPEND(tdfx, drm, 1, 1, 1); diff --git a/sys/dev/drm/tdfx_drv.h b/sys/dev/drm/tdfx_drv.h deleted file mode 100644 index d798569cb3fe..000000000000 --- a/sys/dev/drm/tdfx_drv.h +++ /dev/null @@ -1,50 +0,0 @@ -/* tdfx.h -- 3dfx DRM template customization -*- linux-c -*- - * Created: Wed Feb 14 12:32:32 2001 by gareth@valinux.com - */ -/*- - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef __TDFX_H__ -#define __TDFX_H__ - -/* General customization: - */ - -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "tdfx" -#define DRIVER_DESC "3dfx Banshee/Voodoo3+" -#define DRIVER_DATE "20010216" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 0 - -#endif diff --git a/sys/dev/drm/via_3d_reg.h b/sys/dev/drm/via_3d_reg.h deleted file mode 100644 index 7a5b3b6e5ba4..000000000000 --- a/sys/dev/drm/via_3d_reg.h +++ /dev/null @@ -1,1653 +0,0 @@ -/*- - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef VIA_3D_REG_H -#define VIA_3D_REG_H -#define HC_REG_BASE 0x0400 - -#define HC_REG_TRANS_SPACE 0x0040 - -#define HC_ParaN_MASK 0xffffffff -#define HC_Para_MASK 0x00ffffff -#define HC_SubA_MASK 0xff000000 -#define HC_SubA_SHIFT 24 -/* Transmission Setting - */ -#define HC_REG_TRANS_SET 0x003c -#define HC_ParaSubType_MASK 0xff000000 -#define HC_ParaType_MASK 0x00ff0000 -#define HC_ParaOS_MASK 0x0000ff00 -#define HC_ParaAdr_MASK 0x000000ff -#define HC_ParaSubType_SHIFT 24 -#define HC_ParaType_SHIFT 16 -#define HC_ParaOS_SHIFT 8 -#define HC_ParaAdr_SHIFT 0 - -#define HC_ParaType_CmdVdata 0x0000 -#define HC_ParaType_NotTex 0x0001 -#define HC_ParaType_Tex 0x0002 -#define HC_ParaType_Palette 0x0003 -#define HC_ParaType_PreCR 0x0010 -#define HC_ParaType_Auto 0x00fe - -/* Transmission Space - */ -#define HC_REG_Hpara0 0x0040 -#define HC_REG_HpataAF 0x02fc - -/* Read - */ -#define HC_REG_HREngSt 0x0000 -#define HC_REG_HRFIFOempty 0x0004 -#define HC_REG_HRFIFOfull 0x0008 -#define HC_REG_HRErr 0x000c -#define HC_REG_FIFOstatus 0x0010 -/* HC_REG_HREngSt 0x0000 - */ -#define HC_HDASZC_MASK 0x00010000 -#define HC_HSGEMI_MASK 0x0000f000 -#define HC_HLGEMISt_MASK 0x00000f00 -#define HC_HCRSt_MASK 0x00000080 -#define HC_HSE0St_MASK 0x00000040 -#define HC_HSE1St_MASK 0x00000020 -#define HC_HPESt_MASK 0x00000010 -#define HC_HXESt_MASK 0x00000008 -#define HC_HBESt_MASK 0x00000004 -#define HC_HE2St_MASK 0x00000002 -#define HC_HE3St_MASK 0x00000001 -/* HC_REG_HRFIFOempty 0x0004 - */ -#define HC_HRZDempty_MASK 0x00000010 -#define HC_HRTXAempty_MASK 0x00000008 -#define HC_HRTXDempty_MASK 0x00000004 -#define HC_HWZDempty_MASK 0x00000002 -#define HC_HWCDempty_MASK 0x00000001 -/* HC_REG_HRFIFOfull 0x0008 - */ -#define HC_HRZDfull_MASK 0x00000010 -#define HC_HRTXAfull_MASK 0x00000008 -#define HC_HRTXDfull_MASK 0x00000004 -#define HC_HWZDfull_MASK 0x00000002 -#define HC_HWCDfull_MASK 0x00000001 -/* HC_REG_HRErr 0x000c - */ -#define HC_HAGPCMErr_MASK 0x80000000 -#define HC_HAGPCMErrC_MASK 0x70000000 -/* HC_REG_FIFOstatus 0x0010 - */ -#define HC_HRFIFOATall_MASK 0x80000000 -#define HC_HRFIFOATbusy_MASK 0x40000000 -#define HC_HRATFGMDo_MASK 0x00000100 -#define HC_HRATFGMDi_MASK 0x00000080 -#define HC_HRATFRZD_MASK 0x00000040 -#define HC_HRATFRTXA_MASK 0x00000020 -#define HC_HRATFRTXD_MASK 0x00000010 -#define HC_HRATFWZD_MASK 0x00000008 -#define HC_HRATFWCD_MASK 0x00000004 -#define HC_HRATTXTAG_MASK 0x00000002 -#define HC_HRATTXCH_MASK 0x00000001 - -/* AGP Command Setting - */ -#define HC_SubA_HAGPBstL 0x0060 -#define HC_SubA_HAGPBendL 0x0061 -#define HC_SubA_HAGPCMNT 0x0062 -#define HC_SubA_HAGPBpL 0x0063 -#define HC_SubA_HAGPBpH 0x0064 -/* HC_SubA_HAGPCMNT 0x0062 - */ -#define HC_HAGPCMNT_MASK 0x00800000 -#define HC_HCmdErrClr_MASK 0x00400000 -#define HC_HAGPBendH_MASK 0x0000ff00 -#define HC_HAGPBstH_MASK 0x000000ff -#define HC_HAGPBendH_SHIFT 8 -#define HC_HAGPBstH_SHIFT 0 -/* HC_SubA_HAGPBpL 0x0063 - */ -#define HC_HAGPBpL_MASK 0x00fffffc -#define HC_HAGPBpID_MASK 0x00000003 -#define HC_HAGPBpID_PAUSE 0x00000000 -#define HC_HAGPBpID_JUMP 0x00000001 -#define HC_HAGPBpID_STOP 0x00000002 -/* HC_SubA_HAGPBpH 0x0064 - */ -#define HC_HAGPBpH_MASK 0x00ffffff - -/* Miscellaneous Settings - */ -#define HC_SubA_HClipTB 0x0070 -#define HC_SubA_HClipLR 0x0071 -#define HC_SubA_HFPClipTL 0x0072 -#define HC_SubA_HFPClipBL 0x0073 -#define HC_SubA_HFPClipLL 0x0074 -#define HC_SubA_HFPClipRL 0x0075 -#define HC_SubA_HFPClipTBH 0x0076 -#define HC_SubA_HFPClipLRH 0x0077 -#define HC_SubA_HLP 0x0078 -#define HC_SubA_HLPRF 0x0079 -#define HC_SubA_HSolidCL 0x007a -#define HC_SubA_HPixGC 0x007b -#define HC_SubA_HSPXYOS 0x007c -#define HC_SubA_HVertexCNT 0x007d - -#define HC_HClipT_MASK 0x00fff000 -#define HC_HClipT_SHIFT 12 -#define HC_HClipB_MASK 0x00000fff -#define HC_HClipB_SHIFT 0 -#define HC_HClipL_MASK 0x00fff000 -#define HC_HClipL_SHIFT 12 -#define HC_HClipR_MASK 0x00000fff -#define HC_HClipR_SHIFT 0 -#define HC_HFPClipBH_MASK 0x0000ff00 -#define HC_HFPClipBH_SHIFT 8 -#define HC_HFPClipTH_MASK 0x000000ff -#define HC_HFPClipTH_SHIFT 0 -#define HC_HFPClipRH_MASK 0x0000ff00 -#define HC_HFPClipRH_SHIFT 8 -#define HC_HFPClipLH_MASK 0x000000ff -#define HC_HFPClipLH_SHIFT 0 -#define HC_HSolidCH_MASK 0x000000ff -#define HC_HPixGC_MASK 0x00800000 -#define HC_HSPXOS_MASK 0x00fff000 -#define HC_HSPXOS_SHIFT 12 -#define HC_HSPYOS_MASK 0x00000fff - -/* Command - * Command A - */ -#define HC_HCmdHeader_MASK 0xfe000000 /*0xffe00000 */ -#define HC_HE3Fire_MASK 0x00100000 -#define HC_HPMType_MASK 0x000f0000 -#define HC_HEFlag_MASK 0x0000e000 -#define HC_HShading_MASK 0x00001c00 -#define HC_HPMValidN_MASK 0x00000200 -#define HC_HPLEND_MASK 0x00000100 -#define HC_HVCycle_MASK 0x000000ff -#define HC_HVCycle_Style_MASK 0x000000c0 -#define HC_HVCycle_ChgA_MASK 0x00000030 -#define HC_HVCycle_ChgB_MASK 0x0000000c -#define HC_HVCycle_ChgC_MASK 0x00000003 -#define HC_HPMType_Point 0x00000000 -#define HC_HPMType_Line 0x00010000 -#define HC_HPMType_Tri 0x00020000 -#define HC_HPMType_TriWF 0x00040000 -#define HC_HEFlag_NoAA 0x00000000 -#define HC_HEFlag_ab 0x00008000 -#define HC_HEFlag_bc 0x00004000 -#define HC_HEFlag_ca 0x00002000 -#define HC_HShading_Solid 0x00000000 -#define HC_HShading_FlatA 0x00000400 -#define HC_HShading_FlatB 0x00000800 -#define HC_HShading_FlatC 0x00000c00 -#define HC_HShading_Gouraud 0x00001000 -#define HC_HVCycle_Full 0x00000000 -#define HC_HVCycle_AFP 0x00000040 -#define HC_HVCycle_One 0x000000c0 -#define HC_HVCycle_NewA 0x00000000 -#define HC_HVCycle_AA 0x00000010 -#define HC_HVCycle_AB 0x00000020 -#define HC_HVCycle_AC 0x00000030 -#define HC_HVCycle_NewB 0x00000000 -#define HC_HVCycle_BA 0x00000004 -#define HC_HVCycle_BB 0x00000008 -#define HC_HVCycle_BC 0x0000000c -#define HC_HVCycle_NewC 0x00000000 -#define HC_HVCycle_CA 0x00000001 -#define HC_HVCycle_CB 0x00000002 -#define HC_HVCycle_CC 0x00000003 - -/* Command B - */ -#define HC_HLPrst_MASK 0x00010000 -#define HC_HLLastP_MASK 0x00008000 -#define HC_HVPMSK_MASK 0x00007f80 -#define HC_HBFace_MASK 0x00000040 -#define HC_H2nd1VT_MASK 0x0000003f -#define HC_HVPMSK_X 0x00004000 -#define HC_HVPMSK_Y 0x00002000 -#define HC_HVPMSK_Z 0x00001000 -#define HC_HVPMSK_W 0x00000800 -#define HC_HVPMSK_Cd 0x00000400 -#define HC_HVPMSK_Cs 0x00000200 -#define HC_HVPMSK_S 0x00000100 -#define HC_HVPMSK_T 0x00000080 - -/* Enable Setting - */ -#define HC_SubA_HEnable 0x0000 -#define HC_HenTXEnvMap_MASK 0x00200000 -#define HC_HenVertexCNT_MASK 0x00100000 -#define HC_HenCPUDAZ_MASK 0x00080000 -#define HC_HenDASZWC_MASK 0x00040000 -#define HC_HenFBCull_MASK 0x00020000 -#define HC_HenCW_MASK 0x00010000 -#define HC_HenAA_MASK 0x00008000 -#define HC_HenST_MASK 0x00004000 -#define HC_HenZT_MASK 0x00002000 -#define HC_HenZW_MASK 0x00001000 -#define HC_HenAT_MASK 0x00000800 -#define HC_HenAW_MASK 0x00000400 -#define HC_HenSP_MASK 0x00000200 -#define HC_HenLP_MASK 0x00000100 -#define HC_HenTXCH_MASK 0x00000080 -#define HC_HenTXMP_MASK 0x00000040 -#define HC_HenTXPP_MASK 0x00000020 -#define HC_HenTXTR_MASK 0x00000010 -#define HC_HenCS_MASK 0x00000008 -#define HC_HenFOG_MASK 0x00000004 -#define HC_HenABL_MASK 0x00000002 -#define HC_HenDT_MASK 0x00000001 - -/* Z Setting - */ -#define HC_SubA_HZWBBasL 0x0010 -#define HC_SubA_HZWBBasH 0x0011 -#define HC_SubA_HZWBType 0x0012 -#define HC_SubA_HZBiasL 0x0013 -#define HC_SubA_HZWBend 0x0014 -#define HC_SubA_HZWTMD 0x0015 -#define HC_SubA_HZWCDL 0x0016 -#define HC_SubA_HZWCTAGnum 0x0017 -#define HC_SubA_HZCYNum 0x0018 -#define HC_SubA_HZWCFire 0x0019 -/* HC_SubA_HZWBType - */ -#define HC_HZWBType_MASK 0x00800000 -#define HC_HZBiasedWB_MASK 0x00400000 -#define HC_HZONEasFF_MASK 0x00200000 -#define HC_HZOONEasFF_MASK 0x00100000 -#define HC_HZWBFM_MASK 0x00030000 -#define HC_HZWBLoc_MASK 0x0000c000 -#define HC_HZWBPit_MASK 0x00003fff -#define HC_HZWBFM_16 0x00000000 -#define HC_HZWBFM_32 0x00020000 -#define HC_HZWBFM_24 0x00030000 -#define HC_HZWBLoc_Local 0x00000000 -#define HC_HZWBLoc_SyS 0x00004000 -/* HC_SubA_HZWBend - */ -#define HC_HZWBend_MASK 0x00ffe000 -#define HC_HZBiasH_MASK 0x000000ff -#define HC_HZWBend_SHIFT 10 -/* HC_SubA_HZWTMD - */ -#define HC_HZWTMD_MASK 0x00070000 -#define HC_HEBEBias_MASK 0x00007f00 -#define HC_HZNF_MASK 0x000000ff -#define HC_HZWTMD_NeverPass 0x00000000 -#define HC_HZWTMD_LT 0x00010000 -#define HC_HZWTMD_EQ 0x00020000 -#define HC_HZWTMD_LE 0x00030000 -#define HC_HZWTMD_GT 0x00040000 -#define HC_HZWTMD_NE 0x00050000 -#define HC_HZWTMD_GE 0x00060000 -#define HC_HZWTMD_AllPass 0x00070000 -#define HC_HEBEBias_SHIFT 8 -/* HC_SubA_HZWCDL 0x0016 - */ -#define HC_HZWCDL_MASK 0x00ffffff -/* HC_SubA_HZWCTAGnum 0x0017 - */ -#define HC_HZWCTAGnum_MASK 0x00ff0000 -#define HC_HZWCTAGnum_SHIFT 16 -#define HC_HZWCDH_MASK 0x000000ff -#define HC_HZWCDH_SHIFT 0 -/* HC_SubA_HZCYNum 0x0018 - */ -#define HC_HZCYNum_MASK 0x00030000 -#define HC_HZCYNum_SHIFT 16 -#define HC_HZWCQWnum_MASK 0x00003fff -#define HC_HZWCQWnum_SHIFT 0 -/* HC_SubA_HZWCFire 0x0019 - */ -#define HC_ZWCFire_MASK 0x00010000 -#define HC_HZWCQWnumLast_MASK 0x00003fff -#define HC_HZWCQWnumLast_SHIFT 0 - -/* Stencil Setting - */ -#define HC_SubA_HSTREF 0x0023 -#define HC_SubA_HSTMD 0x0024 -/* HC_SubA_HSBFM - */ -#define HC_HSBFM_MASK 0x00030000 -#define HC_HSBLoc_MASK 0x0000c000 -#define HC_HSBPit_MASK 0x00003fff -/* HC_SubA_HSTREF - */ -#define HC_HSTREF_MASK 0x00ff0000 -#define HC_HSTOPMSK_MASK 0x0000ff00 -#define HC_HSTBMSK_MASK 0x000000ff -#define HC_HSTREF_SHIFT 16 -#define HC_HSTOPMSK_SHIFT 8 -/* HC_SubA_HSTMD - */ -#define HC_HSTMD_MASK 0x00070000 -#define HC_HSTOPSF_MASK 0x000001c0 -#define HC_HSTOPSPZF_MASK 0x00000038 -#define HC_HSTOPSPZP_MASK 0x00000007 -#define HC_HSTMD_NeverPass 0x00000000 -#define HC_HSTMD_LT 0x00010000 -#define HC_HSTMD_EQ 0x00020000 -#define HC_HSTMD_LE 0x00030000 -#define HC_HSTMD_GT 0x00040000 -#define HC_HSTMD_NE 0x00050000 -#define HC_HSTMD_GE 0x00060000 -#define HC_HSTMD_AllPass 0x00070000 -#define HC_HSTOPSF_KEEP 0x00000000 -#define HC_HSTOPSF_ZERO 0x00000040 -#define HC_HSTOPSF_REPLACE 0x00000080 -#define HC_HSTOPSF_INCRSAT 0x000000c0 -#define HC_HSTOPSF_DECRSAT 0x00000100 -#define HC_HSTOPSF_INVERT 0x00000140 -#define HC_HSTOPSF_INCR 0x00000180 -#define HC_HSTOPSF_DECR 0x000001c0 -#define HC_HSTOPSPZF_KEEP 0x00000000 -#define HC_HSTOPSPZF_ZERO 0x00000008 -#define HC_HSTOPSPZF_REPLACE 0x00000010 -#define HC_HSTOPSPZF_INCRSAT 0x00000018 -#define HC_HSTOPSPZF_DECRSAT 0x00000020 -#define HC_HSTOPSPZF_INVERT 0x00000028 -#define HC_HSTOPSPZF_INCR 0x00000030 -#define HC_HSTOPSPZF_DECR 0x00000038 -#define HC_HSTOPSPZP_KEEP 0x00000000 -#define HC_HSTOPSPZP_ZERO 0x00000001 -#define HC_HSTOPSPZP_REPLACE 0x00000002 -#define HC_HSTOPSPZP_INCRSAT 0x00000003 -#define HC_HSTOPSPZP_DECRSAT 0x00000004 -#define HC_HSTOPSPZP_INVERT 0x00000005 -#define HC_HSTOPSPZP_INCR 0x00000006 -#define HC_HSTOPSPZP_DECR 0x00000007 - -/* Alpha Setting - */ -#define HC_SubA_HABBasL 0x0030 -#define HC_SubA_HABBasH 0x0031 -#define HC_SubA_HABFM 0x0032 -#define HC_SubA_HATMD 0x0033 -#define HC_SubA_HABLCsat 0x0034 -#define HC_SubA_HABLCop 0x0035 -#define HC_SubA_HABLAsat 0x0036 -#define HC_SubA_HABLAop 0x0037 -#define HC_SubA_HABLRCa 0x0038 -#define HC_SubA_HABLRFCa 0x0039 -#define HC_SubA_HABLRCbias 0x003a -#define HC_SubA_HABLRCb 0x003b -#define HC_SubA_HABLRFCb 0x003c -#define HC_SubA_HABLRAa 0x003d -#define HC_SubA_HABLRAb 0x003e -/* HC_SubA_HABFM - */ -#define HC_HABFM_MASK 0x00030000 -#define HC_HABLoc_MASK 0x0000c000 -#define HC_HABPit_MASK 0x000007ff -/* HC_SubA_HATMD - */ -#define HC_HATMD_MASK 0x00000700 -#define HC_HATREF_MASK 0x000000ff -#define HC_HATMD_NeverPass 0x00000000 -#define HC_HATMD_LT 0x00000100 -#define HC_HATMD_EQ 0x00000200 -#define HC_HATMD_LE 0x00000300 -#define HC_HATMD_GT 0x00000400 -#define HC_HATMD_NE 0x00000500 -#define HC_HATMD_GE 0x00000600 -#define HC_HATMD_AllPass 0x00000700 -/* HC_SubA_HABLCsat - */ -#define HC_HABLCsat_MASK 0x00010000 -#define HC_HABLCa_MASK 0x0000fc00 -#define HC_HABLCa_C_MASK 0x0000c000 -#define HC_HABLCa_OPC_MASK 0x00003c00 -#define HC_HABLFCa_MASK 0x000003f0 -#define HC_HABLFCa_C_MASK 0x00000300 -#define HC_HABLFCa_OPC_MASK 0x000000f0 -#define HC_HABLCbias_MASK 0x0000000f -#define HC_HABLCbias_C_MASK 0x00000008 -#define HC_HABLCbias_OPC_MASK 0x00000007 -/*-- Define the input color. - */ -#define HC_XC_Csrc 0x00000000 -#define HC_XC_Cdst 0x00000001 -#define HC_XC_Asrc 0x00000002 -#define HC_XC_Adst 0x00000003 -#define HC_XC_Fog 0x00000004 -#define HC_XC_HABLRC 0x00000005 -#define HC_XC_minSrcDst 0x00000006 -#define HC_XC_maxSrcDst 0x00000007 -#define HC_XC_mimAsrcInvAdst 0x00000008 -#define HC_XC_OPC 0x00000000 -#define HC_XC_InvOPC 0x00000010 -#define HC_XC_OPCp5 0x00000020 -/*-- Define the input Alpha - */ -#define HC_XA_OPA 0x00000000 -#define HC_XA_InvOPA 0x00000010 -#define HC_XA_OPAp5 0x00000020 -#define HC_XA_0 0x00000000 -#define HC_XA_Asrc 0x00000001 -#define HC_XA_Adst 0x00000002 -#define HC_XA_Fog 0x00000003 -#define HC_XA_minAsrcFog 0x00000004 -#define HC_XA_minAsrcAdst 0x00000005 -#define HC_XA_maxAsrcFog 0x00000006 -#define HC_XA_maxAsrcAdst 0x00000007 -#define HC_XA_HABLRA 0x00000008 -#define HC_XA_minAsrcInvAdst 0x00000008 -#define HC_XA_HABLFRA 0x00000009 -/*-- - */ -#define HC_HABLCa_OPC (HC_XC_OPC << 10) -#define HC_HABLCa_InvOPC (HC_XC_InvOPC << 10) -#define HC_HABLCa_OPCp5 (HC_XC_OPCp5 << 10) -#define HC_HABLCa_Csrc (HC_XC_Csrc << 10) -#define HC_HABLCa_Cdst (HC_XC_Cdst << 10) -#define HC_HABLCa_Asrc (HC_XC_Asrc << 10) -#define HC_HABLCa_Adst (HC_XC_Adst << 10) -#define HC_HABLCa_Fog (HC_XC_Fog << 10) -#define HC_HABLCa_HABLRCa (HC_XC_HABLRC << 10) -#define HC_HABLCa_minSrcDst (HC_XC_minSrcDst << 10) -#define HC_HABLCa_maxSrcDst (HC_XC_maxSrcDst << 10) -#define HC_HABLFCa_OPC (HC_XC_OPC << 4) -#define HC_HABLFCa_InvOPC (HC_XC_InvOPC << 4) -#define HC_HABLFCa_OPCp5 (HC_XC_OPCp5 << 4) -#define HC_HABLFCa_Csrc (HC_XC_Csrc << 4) -#define HC_HABLFCa_Cdst (HC_XC_Cdst << 4) -#define HC_HABLFCa_Asrc (HC_XC_Asrc << 4) -#define HC_HABLFCa_Adst (HC_XC_Adst << 4) -#define HC_HABLFCa_Fog (HC_XC_Fog << 4) -#define HC_HABLFCa_HABLRCa (HC_XC_HABLRC << 4) -#define HC_HABLFCa_minSrcDst (HC_XC_minSrcDst << 4) -#define HC_HABLFCa_maxSrcDst (HC_XC_maxSrcDst << 4) -#define HC_HABLFCa_mimAsrcInvAdst (HC_XC_mimAsrcInvAdst << 4) -#define HC_HABLCbias_HABLRCbias 0x00000000 -#define HC_HABLCbias_Asrc 0x00000001 -#define HC_HABLCbias_Adst 0x00000002 -#define HC_HABLCbias_Fog 0x00000003 -#define HC_HABLCbias_Cin 0x00000004 -/* HC_SubA_HABLCop 0x0035 - */ -#define HC_HABLdot_MASK 0x00010000 -#define HC_HABLCop_MASK 0x00004000 -#define HC_HABLCb_MASK 0x00003f00 -#define HC_HABLCb_C_MASK 0x00003000 -#define HC_HABLCb_OPC_MASK 0x00000f00 -#define HC_HABLFCb_MASK 0x000000fc -#define HC_HABLFCb_C_MASK 0x000000c0 -#define HC_HABLFCb_OPC_MASK 0x0000003c -#define HC_HABLCshift_MASK 0x00000003 -#define HC_HABLCb_OPC (HC_XC_OPC << 8) -#define HC_HABLCb_InvOPC (HC_XC_InvOPC << 8) -#define HC_HABLCb_OPCp5 (HC_XC_OPCp5 << 8) -#define HC_HABLCb_Csrc (HC_XC_Csrc << 8) -#define HC_HABLCb_Cdst (HC_XC_Cdst << 8) -#define HC_HABLCb_Asrc (HC_XC_Asrc << 8) -#define HC_HABLCb_Adst (HC_XC_Adst << 8) -#define HC_HABLCb_Fog (HC_XC_Fog << 8) -#define HC_HABLCb_HABLRCa (HC_XC_HABLRC << 8) -#define HC_HABLCb_minSrcDst (HC_XC_minSrcDst << 8) -#define HC_HABLCb_maxSrcDst (HC_XC_maxSrcDst << 8) -#define HC_HABLFCb_OPC (HC_XC_OPC << 2) -#define HC_HABLFCb_InvOPC (HC_XC_InvOPC << 2) -#define HC_HABLFCb_OPCp5 (HC_XC_OPCp5 << 2) -#define HC_HABLFCb_Csrc (HC_XC_Csrc << 2) -#define HC_HABLFCb_Cdst (HC_XC_Cdst << 2) -#define HC_HABLFCb_Asrc (HC_XC_Asrc << 2) -#define HC_HABLFCb_Adst (HC_XC_Adst << 2) -#define HC_HABLFCb_Fog (HC_XC_Fog << 2) -#define HC_HABLFCb_HABLRCb (HC_XC_HABLRC << 2) -#define HC_HABLFCb_minSrcDst (HC_XC_minSrcDst << 2) -#define HC_HABLFCb_maxSrcDst (HC_XC_maxSrcDst << 2) -#define HC_HABLFCb_mimAsrcInvAdst (HC_XC_mimAsrcInvAdst << 2) -/* HC_SubA_HABLAsat 0x0036 - */ -#define HC_HABLAsat_MASK 0x00010000 -#define HC_HABLAa_MASK 0x0000fc00 -#define HC_HABLAa_A_MASK 0x0000c000 -#define HC_HABLAa_OPA_MASK 0x00003c00 -#define HC_HABLFAa_MASK 0x000003f0 -#define HC_HABLFAa_A_MASK 0x00000300 -#define HC_HABLFAa_OPA_MASK 0x000000f0 -#define HC_HABLAbias_MASK 0x0000000f -#define HC_HABLAbias_A_MASK 0x00000008 -#define HC_HABLAbias_OPA_MASK 0x00000007 -#define HC_HABLAa_OPA (HC_XA_OPA << 10) -#define HC_HABLAa_InvOPA (HC_XA_InvOPA << 10) -#define HC_HABLAa_OPAp5 (HC_XA_OPAp5 << 10) -#define HC_HABLAa_0 (HC_XA_0 << 10) -#define HC_HABLAa_Asrc (HC_XA_Asrc << 10) -#define HC_HABLAa_Adst (HC_XA_Adst << 10) -#define HC_HABLAa_Fog (HC_XA_Fog << 10) -#define HC_HABLAa_minAsrcFog (HC_XA_minAsrcFog << 10) -#define HC_HABLAa_minAsrcAdst (HC_XA_minAsrcAdst << 10) -#define HC_HABLAa_maxAsrcFog (HC_XA_maxAsrcFog << 10) -#define HC_HABLAa_maxAsrcAdst (HC_XA_maxAsrcAdst << 10) -#define HC_HABLAa_HABLRA (HC_XA_HABLRA << 10) -#define HC_HABLFAa_OPA (HC_XA_OPA << 4) -#define HC_HABLFAa_InvOPA (HC_XA_InvOPA << 4) -#define HC_HABLFAa_OPAp5 (HC_XA_OPAp5 << 4) -#define HC_HABLFAa_0 (HC_XA_0 << 4) -#define HC_HABLFAa_Asrc (HC_XA_Asrc << 4) -#define HC_HABLFAa_Adst (HC_XA_Adst << 4) -#define HC_HABLFAa_Fog (HC_XA_Fog << 4) -#define HC_HABLFAa_minAsrcFog (HC_XA_minAsrcFog << 4) -#define HC_HABLFAa_minAsrcAdst (HC_XA_minAsrcAdst << 4) -#define HC_HABLFAa_maxAsrcFog (HC_XA_maxAsrcFog << 4) -#define HC_HABLFAa_maxAsrcAdst (HC_XA_maxAsrcAdst << 4) -#define HC_HABLFAa_minAsrcInvAdst (HC_XA_minAsrcInvAdst << 4) -#define HC_HABLFAa_HABLFRA (HC_XA_HABLFRA << 4) -#define HC_HABLAbias_HABLRAbias 0x00000000 -#define HC_HABLAbias_Asrc 0x00000001 -#define HC_HABLAbias_Adst 0x00000002 -#define HC_HABLAbias_Fog 0x00000003 -#define HC_HABLAbias_Aaa 0x00000004 -/* HC_SubA_HABLAop 0x0037 - */ -#define HC_HABLAop_MASK 0x00004000 -#define HC_HABLAb_MASK 0x00003f00 -#define HC_HABLAb_OPA_MASK 0x00000f00 -#define HC_HABLFAb_MASK 0x000000fc -#define HC_HABLFAb_OPA_MASK 0x0000003c -#define HC_HABLAshift_MASK 0x00000003 -#define HC_HABLAb_OPA (HC_XA_OPA << 8) -#define HC_HABLAb_InvOPA (HC_XA_InvOPA << 8) -#define HC_HABLAb_OPAp5 (HC_XA_OPAp5 << 8) -#define HC_HABLAb_0 (HC_XA_0 << 8) -#define HC_HABLAb_Asrc (HC_XA_Asrc << 8) -#define HC_HABLAb_Adst (HC_XA_Adst << 8) -#define HC_HABLAb_Fog (HC_XA_Fog << 8) -#define HC_HABLAb_minAsrcFog (HC_XA_minAsrcFog << 8) -#define HC_HABLAb_minAsrcAdst (HC_XA_minAsrcAdst << 8) -#define HC_HABLAb_maxAsrcFog (HC_XA_maxAsrcFog << 8) -#define HC_HABLAb_maxAsrcAdst (HC_XA_maxAsrcAdst << 8) -#define HC_HABLAb_HABLRA (HC_XA_HABLRA << 8) -#define HC_HABLFAb_OPA (HC_XA_OPA << 2) -#define HC_HABLFAb_InvOPA (HC_XA_InvOPA << 2) -#define HC_HABLFAb_OPAp5 (HC_XA_OPAp5 << 2) -#define HC_HABLFAb_0 (HC_XA_0 << 2) -#define HC_HABLFAb_Asrc (HC_XA_Asrc << 2) -#define HC_HABLFAb_Adst (HC_XA_Adst << 2) -#define HC_HABLFAb_Fog (HC_XA_Fog << 2) -#define HC_HABLFAb_minAsrcFog (HC_XA_minAsrcFog << 2) -#define HC_HABLFAb_minAsrcAdst (HC_XA_minAsrcAdst << 2) -#define HC_HABLFAb_maxAsrcFog (HC_XA_maxAsrcFog << 2) -#define HC_HABLFAb_maxAsrcAdst (HC_XA_maxAsrcAdst << 2) -#define HC_HABLFAb_minAsrcInvAdst (HC_XA_minAsrcInvAdst << 2) -#define HC_HABLFAb_HABLFRA (HC_XA_HABLFRA << 2) -/* HC_SubA_HABLRAa 0x003d - */ -#define HC_HABLRAa_MASK 0x00ff0000 -#define HC_HABLRFAa_MASK 0x0000ff00 -#define HC_HABLRAbias_MASK 0x000000ff -#define HC_HABLRAa_SHIFT 16 -#define HC_HABLRFAa_SHIFT 8 -/* HC_SubA_HABLRAb 0x003e - */ -#define HC_HABLRAb_MASK 0x0000ff00 -#define HC_HABLRFAb_MASK 0x000000ff -#define HC_HABLRAb_SHIFT 8 - -/* Destination Setting - */ -#define HC_SubA_HDBBasL 0x0040 -#define HC_SubA_HDBBasH 0x0041 -#define HC_SubA_HDBFM 0x0042 -#define HC_SubA_HFBBMSKL 0x0043 -#define HC_SubA_HROP 0x0044 -/* HC_SubA_HDBFM 0x0042 - */ -#define HC_HDBFM_MASK 0x001f0000 -#define HC_HDBLoc_MASK 0x0000c000 -#define HC_HDBPit_MASK 0x00003fff -#define HC_HDBFM_RGB555 0x00000000 -#define HC_HDBFM_RGB565 0x00010000 -#define HC_HDBFM_ARGB4444 0x00020000 -#define HC_HDBFM_ARGB1555 0x00030000 -#define HC_HDBFM_BGR555 0x00040000 -#define HC_HDBFM_BGR565 0x00050000 -#define HC_HDBFM_ABGR4444 0x00060000 -#define HC_HDBFM_ABGR1555 0x00070000 -#define HC_HDBFM_ARGB0888 0x00080000 -#define HC_HDBFM_ARGB8888 0x00090000 -#define HC_HDBFM_ABGR0888 0x000a0000 -#define HC_HDBFM_ABGR8888 0x000b0000 -#define HC_HDBLoc_Local 0x00000000 -#define HC_HDBLoc_Sys 0x00004000 -/* HC_SubA_HROP 0x0044 - */ -#define HC_HROP_MASK 0x00000f00 -#define HC_HFBBMSKH_MASK 0x000000ff -#define HC_HROP_BLACK 0x00000000 -#define HC_HROP_DPon 0x00000100 -#define HC_HROP_DPna 0x00000200 -#define HC_HROP_Pn 0x00000300 -#define HC_HROP_PDna 0x00000400 -#define HC_HROP_Dn 0x00000500 -#define HC_HROP_DPx 0x00000600 -#define HC_HROP_DPan 0x00000700 -#define HC_HROP_DPa 0x00000800 -#define HC_HROP_DPxn 0x00000900 -#define HC_HROP_D 0x00000a00 -#define HC_HROP_DPno 0x00000b00 -#define HC_HROP_P 0x00000c00 -#define HC_HROP_PDno 0x00000d00 -#define HC_HROP_DPo 0x00000e00 -#define HC_HROP_WHITE 0x00000f00 - -/* Fog Setting - */ -#define HC_SubA_HFogLF 0x0050 -#define HC_SubA_HFogCL 0x0051 -#define HC_SubA_HFogCH 0x0052 -#define HC_SubA_HFogStL 0x0053 -#define HC_SubA_HFogStH 0x0054 -#define HC_SubA_HFogOOdMF 0x0055 -#define HC_SubA_HFogOOdEF 0x0056 -#define HC_SubA_HFogEndL 0x0057 -#define HC_SubA_HFogDenst 0x0058 -/* HC_SubA_FogLF 0x0050 - */ -#define HC_FogLF_MASK 0x00000010 -#define HC_FogEq_MASK 0x00000008 -#define HC_FogMD_MASK 0x00000007 -#define HC_FogMD_LocalFog 0x00000000 -#define HC_FogMD_LinearFog 0x00000002 -#define HC_FogMD_ExponentialFog 0x00000004 -#define HC_FogMD_Exponential2Fog 0x00000005 -/* #define HC_FogMD_FogTable 0x00000003 */ - -/* HC_SubA_HFogDenst 0x0058 - */ -#define HC_FogDenst_MASK 0x001fff00 -#define HC_FogEndL_MASK 0x000000ff - -/* Texture subtype definitions - */ -#define HC_SubType_Tex0 0x00000000 -#define HC_SubType_Tex1 0x00000001 -#define HC_SubType_TexGeneral 0x000000fe - -/* Attribute of texture n - */ -#define HC_SubA_HTXnL0BasL 0x0000 -#define HC_SubA_HTXnL1BasL 0x0001 -#define HC_SubA_HTXnL2BasL 0x0002 -#define HC_SubA_HTXnL3BasL 0x0003 -#define HC_SubA_HTXnL4BasL 0x0004 -#define HC_SubA_HTXnL5BasL 0x0005 -#define HC_SubA_HTXnL6BasL 0x0006 -#define HC_SubA_HTXnL7BasL 0x0007 -#define HC_SubA_HTXnL8BasL 0x0008 -#define HC_SubA_HTXnL9BasL 0x0009 -#define HC_SubA_HTXnLaBasL 0x000a -#define HC_SubA_HTXnLbBasL 0x000b -#define HC_SubA_HTXnLcBasL 0x000c -#define HC_SubA_HTXnLdBasL 0x000d -#define HC_SubA_HTXnLeBasL 0x000e -#define HC_SubA_HTXnLfBasL 0x000f -#define HC_SubA_HTXnL10BasL 0x0010 -#define HC_SubA_HTXnL11BasL 0x0011 -#define HC_SubA_HTXnL012BasH 0x0020 -#define HC_SubA_HTXnL345BasH 0x0021 -#define HC_SubA_HTXnL678BasH 0x0022 -#define HC_SubA_HTXnL9abBasH 0x0023 -#define HC_SubA_HTXnLcdeBasH 0x0024 -#define HC_SubA_HTXnLf1011BasH 0x0025 -#define HC_SubA_HTXnL0Pit 0x002b -#define HC_SubA_HTXnL1Pit 0x002c -#define HC_SubA_HTXnL2Pit 0x002d -#define HC_SubA_HTXnL3Pit 0x002e -#define HC_SubA_HTXnL4Pit 0x002f -#define HC_SubA_HTXnL5Pit 0x0030 -#define HC_SubA_HTXnL6Pit 0x0031 -#define HC_SubA_HTXnL7Pit 0x0032 -#define HC_SubA_HTXnL8Pit 0x0033 -#define HC_SubA_HTXnL9Pit 0x0034 -#define HC_SubA_HTXnLaPit 0x0035 -#define HC_SubA_HTXnLbPit 0x0036 -#define HC_SubA_HTXnLcPit 0x0037 -#define HC_SubA_HTXnLdPit 0x0038 -#define HC_SubA_HTXnLePit 0x0039 -#define HC_SubA_HTXnLfPit 0x003a -#define HC_SubA_HTXnL10Pit 0x003b -#define HC_SubA_HTXnL11Pit 0x003c -#define HC_SubA_HTXnL0_5WE 0x004b -#define HC_SubA_HTXnL6_bWE 0x004c -#define HC_SubA_HTXnLc_11WE 0x004d -#define HC_SubA_HTXnL0_5HE 0x0051 -#define HC_SubA_HTXnL6_bHE 0x0052 -#define HC_SubA_HTXnLc_11HE 0x0053 -#define HC_SubA_HTXnL0OS 0x0077 -#define HC_SubA_HTXnTB 0x0078 -#define HC_SubA_HTXnMPMD 0x0079 -#define HC_SubA_HTXnCLODu 0x007a -#define HC_SubA_HTXnFM 0x007b -#define HC_SubA_HTXnTRCH 0x007c -#define HC_SubA_HTXnTRCL 0x007d -#define HC_SubA_HTXnTBC 0x007e -#define HC_SubA_HTXnTRAH 0x007f -#define HC_SubA_HTXnTBLCsat 0x0080 -#define HC_SubA_HTXnTBLCop 0x0081 -#define HC_SubA_HTXnTBLMPfog 0x0082 -#define HC_SubA_HTXnTBLAsat 0x0083 -#define HC_SubA_HTXnTBLRCa 0x0085 -#define HC_SubA_HTXnTBLRCb 0x0086 -#define HC_SubA_HTXnTBLRCc 0x0087 -#define HC_SubA_HTXnTBLRCbias 0x0088 -#define HC_SubA_HTXnTBLRAa 0x0089 -#define HC_SubA_HTXnTBLRFog 0x008a -#define HC_SubA_HTXnBumpM00 0x0090 -#define HC_SubA_HTXnBumpM01 0x0091 -#define HC_SubA_HTXnBumpM10 0x0092 -#define HC_SubA_HTXnBumpM11 0x0093 -#define HC_SubA_HTXnLScale 0x0094 -#define HC_SubA_HTXSMD 0x0000 -/* HC_SubA_HTXnL012BasH 0x0020 - */ -#define HC_HTXnL0BasH_MASK 0x000000ff -#define HC_HTXnL1BasH_MASK 0x0000ff00 -#define HC_HTXnL2BasH_MASK 0x00ff0000 -#define HC_HTXnL1BasH_SHIFT 8 -#define HC_HTXnL2BasH_SHIFT 16 -/* HC_SubA_HTXnL345BasH 0x0021 - */ -#define HC_HTXnL3BasH_MASK 0x000000ff -#define HC_HTXnL4BasH_MASK 0x0000ff00 -#define HC_HTXnL5BasH_MASK 0x00ff0000 -#define HC_HTXnL4BasH_SHIFT 8 -#define HC_HTXnL5BasH_SHIFT 16 -/* HC_SubA_HTXnL678BasH 0x0022 - */ -#define HC_HTXnL6BasH_MASK 0x000000ff -#define HC_HTXnL7BasH_MASK 0x0000ff00 -#define HC_HTXnL8BasH_MASK 0x00ff0000 -#define HC_HTXnL7BasH_SHIFT 8 -#define HC_HTXnL8BasH_SHIFT 16 -/* HC_SubA_HTXnL9abBasH 0x0023 - */ -#define HC_HTXnL9BasH_MASK 0x000000ff -#define HC_HTXnLaBasH_MASK 0x0000ff00 -#define HC_HTXnLbBasH_MASK 0x00ff0000 -#define HC_HTXnLaBasH_SHIFT 8 -#define HC_HTXnLbBasH_SHIFT 16 -/* HC_SubA_HTXnLcdeBasH 0x0024 - */ -#define HC_HTXnLcBasH_MASK 0x000000ff -#define HC_HTXnLdBasH_MASK 0x0000ff00 -#define HC_HTXnLeBasH_MASK 0x00ff0000 -#define HC_HTXnLdBasH_SHIFT 8 -#define HC_HTXnLeBasH_SHIFT 16 -/* HC_SubA_HTXnLcdeBasH 0x0025 - */ -#define HC_HTXnLfBasH_MASK 0x000000ff -#define HC_HTXnL10BasH_MASK 0x0000ff00 -#define HC_HTXnL11BasH_MASK 0x00ff0000 -#define HC_HTXnL10BasH_SHIFT 8 -#define HC_HTXnL11BasH_SHIFT 16 -/* HC_SubA_HTXnL0Pit 0x002b - */ -#define HC_HTXnLnPit_MASK 0x00003fff -#define HC_HTXnEnPit_MASK 0x00080000 -#define HC_HTXnLnPitE_MASK 0x00f00000 -#define HC_HTXnLnPitE_SHIFT 20 -/* HC_SubA_HTXnL0_5WE 0x004b - */ -#define HC_HTXnL0WE_MASK 0x0000000f -#define HC_HTXnL1WE_MASK 0x000000f0 -#define HC_HTXnL2WE_MASK 0x00000f00 -#define HC_HTXnL3WE_MASK 0x0000f000 -#define HC_HTXnL4WE_MASK 0x000f0000 -#define HC_HTXnL5WE_MASK 0x00f00000 -#define HC_HTXnL1WE_SHIFT 4 -#define HC_HTXnL2WE_SHIFT 8 -#define HC_HTXnL3WE_SHIFT 12 -#define HC_HTXnL4WE_SHIFT 16 -#define HC_HTXnL5WE_SHIFT 20 -/* HC_SubA_HTXnL6_bWE 0x004c - */ -#define HC_HTXnL6WE_MASK 0x0000000f -#define HC_HTXnL7WE_MASK 0x000000f0 -#define HC_HTXnL8WE_MASK 0x00000f00 -#define HC_HTXnL9WE_MASK 0x0000f000 -#define HC_HTXnLaWE_MASK 0x000f0000 -#define HC_HTXnLbWE_MASK 0x00f00000 -#define HC_HTXnL7WE_SHIFT 4 -#define HC_HTXnL8WE_SHIFT 8 -#define HC_HTXnL9WE_SHIFT 12 -#define HC_HTXnLaWE_SHIFT 16 -#define HC_HTXnLbWE_SHIFT 20 -/* HC_SubA_HTXnLc_11WE 0x004d - */ -#define HC_HTXnLcWE_MASK 0x0000000f -#define HC_HTXnLdWE_MASK 0x000000f0 -#define HC_HTXnLeWE_MASK 0x00000f00 -#define HC_HTXnLfWE_MASK 0x0000f000 -#define HC_HTXnL10WE_MASK 0x000f0000 -#define HC_HTXnL11WE_MASK 0x00f00000 -#define HC_HTXnLdWE_SHIFT 4 -#define HC_HTXnLeWE_SHIFT 8 -#define HC_HTXnLfWE_SHIFT 12 -#define HC_HTXnL10WE_SHIFT 16 -#define HC_HTXnL11WE_SHIFT 20 -/* HC_SubA_HTXnL0_5HE 0x0051 - */ -#define HC_HTXnL0HE_MASK 0x0000000f -#define HC_HTXnL1HE_MASK 0x000000f0 -#define HC_HTXnL2HE_MASK 0x00000f00 -#define HC_HTXnL3HE_MASK 0x0000f000 -#define HC_HTXnL4HE_MASK 0x000f0000 -#define HC_HTXnL5HE_MASK 0x00f00000 -#define HC_HTXnL1HE_SHIFT 4 -#define HC_HTXnL2HE_SHIFT 8 -#define HC_HTXnL3HE_SHIFT 12 -#define HC_HTXnL4HE_SHIFT 16 -#define HC_HTXnL5HE_SHIFT 20 -/* HC_SubA_HTXnL6_bHE 0x0052 - */ -#define HC_HTXnL6HE_MASK 0x0000000f -#define HC_HTXnL7HE_MASK 0x000000f0 -#define HC_HTXnL8HE_MASK 0x00000f00 -#define HC_HTXnL9HE_MASK 0x0000f000 -#define HC_HTXnLaHE_MASK 0x000f0000 -#define HC_HTXnLbHE_MASK 0x00f00000 -#define HC_HTXnL7HE_SHIFT 4 -#define HC_HTXnL8HE_SHIFT 8 -#define HC_HTXnL9HE_SHIFT 12 -#define HC_HTXnLaHE_SHIFT 16 -#define HC_HTXnLbHE_SHIFT 20 -/* HC_SubA_HTXnLc_11HE 0x0053 - */ -#define HC_HTXnLcHE_MASK 0x0000000f -#define HC_HTXnLdHE_MASK 0x000000f0 -#define HC_HTXnLeHE_MASK 0x00000f00 -#define HC_HTXnLfHE_MASK 0x0000f000 -#define HC_HTXnL10HE_MASK 0x000f0000 -#define HC_HTXnL11HE_MASK 0x00f00000 -#define HC_HTXnLdHE_SHIFT 4 -#define HC_HTXnLeHE_SHIFT 8 -#define HC_HTXnLfHE_SHIFT 12 -#define HC_HTXnL10HE_SHIFT 16 -#define HC_HTXnL11HE_SHIFT 20 -/* HC_SubA_HTXnL0OS 0x0077 - */ -#define HC_HTXnL0OS_MASK 0x003ff000 -#define HC_HTXnLVmax_MASK 0x00000fc0 -#define HC_HTXnLVmin_MASK 0x0000003f -#define HC_HTXnL0OS_SHIFT 12 -#define HC_HTXnLVmax_SHIFT 6 -/* HC_SubA_HTXnTB 0x0078 - */ -#define HC_HTXnTB_MASK 0x00f00000 -#define HC_HTXnFLSe_MASK 0x0000e000 -#define HC_HTXnFLSs_MASK 0x00001c00 -#define HC_HTXnFLTe_MASK 0x00000380 -#define HC_HTXnFLTs_MASK 0x00000070 -#define HC_HTXnFLDs_MASK 0x0000000f -#define HC_HTXnTB_NoTB 0x00000000 -#define HC_HTXnTB_TBC_S 0x00100000 -#define HC_HTXnTB_TBC_T 0x00200000 -#define HC_HTXnTB_TB_S 0x00400000 -#define HC_HTXnTB_TB_T 0x00800000 -#define HC_HTXnFLSe_Nearest 0x00000000 -#define HC_HTXnFLSe_Linear 0x00002000 -#define HC_HTXnFLSe_NonLinear 0x00004000 -#define HC_HTXnFLSe_Sharp 0x00008000 -#define HC_HTXnFLSe_Flat_Gaussian_Cubic 0x0000c000 -#define HC_HTXnFLSs_Nearest 0x00000000 -#define HC_HTXnFLSs_Linear 0x00000400 -#define HC_HTXnFLSs_NonLinear 0x00000800 -#define HC_HTXnFLSs_Flat_Gaussian_Cubic 0x00001800 -#define HC_HTXnFLTe_Nearest 0x00000000 -#define HC_HTXnFLTe_Linear 0x00000080 -#define HC_HTXnFLTe_NonLinear 0x00000100 -#define HC_HTXnFLTe_Sharp 0x00000180 -#define HC_HTXnFLTe_Flat_Gaussian_Cubic 0x00000300 -#define HC_HTXnFLTs_Nearest 0x00000000 -#define HC_HTXnFLTs_Linear 0x00000010 -#define HC_HTXnFLTs_NonLinear 0x00000020 -#define HC_HTXnFLTs_Flat_Gaussian_Cubic 0x00000060 -#define HC_HTXnFLDs_Tex0 0x00000000 -#define HC_HTXnFLDs_Nearest 0x00000001 -#define HC_HTXnFLDs_Linear 0x00000002 -#define HC_HTXnFLDs_NonLinear 0x00000003 -#define HC_HTXnFLDs_Dither 0x00000004 -#define HC_HTXnFLDs_ConstLOD 0x00000005 -#define HC_HTXnFLDs_Ani 0x00000006 -#define HC_HTXnFLDs_AniDither 0x00000007 -/* HC_SubA_HTXnMPMD 0x0079 - */ -#define HC_HTXnMPMD_SMASK 0x00070000 -#define HC_HTXnMPMD_TMASK 0x00380000 -#define HC_HTXnLODDTf_MASK 0x00000007 -#define HC_HTXnXY2ST_MASK 0x00000008 -#define HC_HTXnMPMD_Tsingle 0x00000000 -#define HC_HTXnMPMD_Tclamp 0x00080000 -#define HC_HTXnMPMD_Trepeat 0x00100000 -#define HC_HTXnMPMD_Tmirror 0x00180000 -#define HC_HTXnMPMD_Twrap 0x00200000 -#define HC_HTXnMPMD_Ssingle 0x00000000 -#define HC_HTXnMPMD_Sclamp 0x00010000 -#define HC_HTXnMPMD_Srepeat 0x00020000 -#define HC_HTXnMPMD_Smirror 0x00030000 -#define HC_HTXnMPMD_Swrap 0x00040000 -/* HC_SubA_HTXnCLODu 0x007a - */ -#define HC_HTXnCLODu_MASK 0x000ffc00 -#define HC_HTXnCLODd_MASK 0x000003ff -#define HC_HTXnCLODu_SHIFT 10 -/* HC_SubA_HTXnFM 0x007b - */ -#define HC_HTXnFM_MASK 0x00ff0000 -#define HC_HTXnLoc_MASK 0x00000003 -#define HC_HTXnFM_INDEX 0x00000000 -#define HC_HTXnFM_Intensity 0x00080000 -#define HC_HTXnFM_Lum 0x00100000 -#define HC_HTXnFM_Alpha 0x00180000 -#define HC_HTXnFM_DX 0x00280000 -#define HC_HTXnFM_ARGB16 0x00880000 -#define HC_HTXnFM_ARGB32 0x00980000 -#define HC_HTXnFM_ABGR16 0x00a80000 -#define HC_HTXnFM_ABGR32 0x00b80000 -#define HC_HTXnFM_RGBA16 0x00c80000 -#define HC_HTXnFM_RGBA32 0x00d80000 -#define HC_HTXnFM_BGRA16 0x00e80000 -#define HC_HTXnFM_BGRA32 0x00f80000 -#define HC_HTXnFM_BUMPMAP 0x00380000 -#define HC_HTXnFM_Index1 (HC_HTXnFM_INDEX | 0x00000000) -#define HC_HTXnFM_Index2 (HC_HTXnFM_INDEX | 0x00010000) -#define HC_HTXnFM_Index4 (HC_HTXnFM_INDEX | 0x00020000) -#define HC_HTXnFM_Index8 (HC_HTXnFM_INDEX | 0x00030000) -#define HC_HTXnFM_T1 (HC_HTXnFM_Intensity | 0x00000000) -#define HC_HTXnFM_T2 (HC_HTXnFM_Intensity | 0x00010000) -#define HC_HTXnFM_T4 (HC_HTXnFM_Intensity | 0x00020000) -#define HC_HTXnFM_T8 (HC_HTXnFM_Intensity | 0x00030000) -#define HC_HTXnFM_L1 (HC_HTXnFM_Lum | 0x00000000) -#define HC_HTXnFM_L2 (HC_HTXnFM_Lum | 0x00010000) -#define HC_HTXnFM_L4 (HC_HTXnFM_Lum | 0x00020000) -#define HC_HTXnFM_L8 (HC_HTXnFM_Lum | 0x00030000) -#define HC_HTXnFM_AL44 (HC_HTXnFM_Lum | 0x00040000) -#define HC_HTXnFM_AL88 (HC_HTXnFM_Lum | 0x00050000) -#define HC_HTXnFM_A1 (HC_HTXnFM_Alpha | 0x00000000) -#define HC_HTXnFM_A2 (HC_HTXnFM_Alpha | 0x00010000) -#define HC_HTXnFM_A4 (HC_HTXnFM_Alpha | 0x00020000) -#define HC_HTXnFM_A8 (HC_HTXnFM_Alpha | 0x00030000) -#define HC_HTXnFM_DX1 (HC_HTXnFM_DX | 0x00010000) -#define HC_HTXnFM_DX23 (HC_HTXnFM_DX | 0x00020000) -#define HC_HTXnFM_DX45 (HC_HTXnFM_DX | 0x00030000) -#define HC_HTXnFM_RGB555 (HC_HTXnFM_ARGB16 | 0x00000000) -#define HC_HTXnFM_RGB565 (HC_HTXnFM_ARGB16 | 0x00010000) -#define HC_HTXnFM_ARGB1555 (HC_HTXnFM_ARGB16 | 0x00020000) -#define HC_HTXnFM_ARGB4444 (HC_HTXnFM_ARGB16 | 0x00030000) -#define HC_HTXnFM_ARGB0888 (HC_HTXnFM_ARGB32 | 0x00000000) -#define HC_HTXnFM_ARGB8888 (HC_HTXnFM_ARGB32 | 0x00010000) -#define HC_HTXnFM_BGR555 (HC_HTXnFM_ABGR16 | 0x00000000) -#define HC_HTXnFM_BGR565 (HC_HTXnFM_ABGR16 | 0x00010000) -#define HC_HTXnFM_ABGR1555 (HC_HTXnFM_ABGR16 | 0x00020000) -#define HC_HTXnFM_ABGR4444 (HC_HTXnFM_ABGR16 | 0x00030000) -#define HC_HTXnFM_ABGR0888 (HC_HTXnFM_ABGR32 | 0x00000000) -#define HC_HTXnFM_ABGR8888 (HC_HTXnFM_ABGR32 | 0x00010000) -#define HC_HTXnFM_RGBA5550 (HC_HTXnFM_RGBA16 | 0x00000000) -#define HC_HTXnFM_RGBA5551 (HC_HTXnFM_RGBA16 | 0x00020000) -#define HC_HTXnFM_RGBA4444 (HC_HTXnFM_RGBA16 | 0x00030000) -#define HC_HTXnFM_RGBA8880 (HC_HTXnFM_RGBA32 | 0x00000000) -#define HC_HTXnFM_RGBA8888 (HC_HTXnFM_RGBA32 | 0x00010000) -#define HC_HTXnFM_BGRA5550 (HC_HTXnFM_BGRA16 | 0x00000000) -#define HC_HTXnFM_BGRA5551 (HC_HTXnFM_BGRA16 | 0x00020000) -#define HC_HTXnFM_BGRA4444 (HC_HTXnFM_BGRA16 | 0x00030000) -#define HC_HTXnFM_BGRA8880 (HC_HTXnFM_BGRA32 | 0x00000000) -#define HC_HTXnFM_BGRA8888 (HC_HTXnFM_BGRA32 | 0x00010000) -#define HC_HTXnFM_VU88 (HC_HTXnFM_BUMPMAP | 0x00000000) -#define HC_HTXnFM_LVU655 (HC_HTXnFM_BUMPMAP | 0x00010000) -#define HC_HTXnFM_LVU888 (HC_HTXnFM_BUMPMAP | 0x00020000) -#define HC_HTXnLoc_Local 0x00000000 -#define HC_HTXnLoc_Sys 0x00000002 -#define HC_HTXnLoc_AGP 0x00000003 -/* HC_SubA_HTXnTRAH 0x007f - */ -#define HC_HTXnTRAH_MASK 0x00ff0000 -#define HC_HTXnTRAL_MASK 0x0000ff00 -#define HC_HTXnTBA_MASK 0x000000ff -#define HC_HTXnTRAH_SHIFT 16 -#define HC_HTXnTRAL_SHIFT 8 -/* HC_SubA_HTXnTBLCsat 0x0080 - *-- Define the input texture. - */ -#define HC_XTC_TOPC 0x00000000 -#define HC_XTC_InvTOPC 0x00000010 -#define HC_XTC_TOPCp5 0x00000020 -#define HC_XTC_Cbias 0x00000000 -#define HC_XTC_InvCbias 0x00000010 -#define HC_XTC_0 0x00000000 -#define HC_XTC_Dif 0x00000001 -#define HC_XTC_Spec 0x00000002 -#define HC_XTC_Tex 0x00000003 -#define HC_XTC_Cur 0x00000004 -#define HC_XTC_Adif 0x00000005 -#define HC_XTC_Fog 0x00000006 -#define HC_XTC_Atex 0x00000007 -#define HC_XTC_Acur 0x00000008 -#define HC_XTC_HTXnTBLRC 0x00000009 -#define HC_XTC_Ctexnext 0x0000000a -/*-- - */ -#define HC_HTXnTBLCsat_MASK 0x00800000 -#define HC_HTXnTBLCa_MASK 0x000fc000 -#define HC_HTXnTBLCb_MASK 0x00001f80 -#define HC_HTXnTBLCc_MASK 0x0000003f -#define HC_HTXnTBLCa_TOPC (HC_XTC_TOPC << 14) -#define HC_HTXnTBLCa_InvTOPC (HC_XTC_InvTOPC << 14) -#define HC_HTXnTBLCa_TOPCp5 (HC_XTC_TOPCp5 << 14) -#define HC_HTXnTBLCa_0 (HC_XTC_0 << 14) -#define HC_HTXnTBLCa_Dif (HC_XTC_Dif << 14) -#define HC_HTXnTBLCa_Spec (HC_XTC_Spec << 14) -#define HC_HTXnTBLCa_Tex (HC_XTC_Tex << 14) -#define HC_HTXnTBLCa_Cur (HC_XTC_Cur << 14) -#define HC_HTXnTBLCa_Adif (HC_XTC_Adif << 14) -#define HC_HTXnTBLCa_Fog (HC_XTC_Fog << 14) -#define HC_HTXnTBLCa_Atex (HC_XTC_Atex << 14) -#define HC_HTXnTBLCa_Acur (HC_XTC_Acur << 14) -#define HC_HTXnTBLCa_HTXnTBLRC (HC_XTC_HTXnTBLRC << 14) -#define HC_HTXnTBLCa_Ctexnext (HC_XTC_Ctexnext << 14) -#define HC_HTXnTBLCb_TOPC (HC_XTC_TOPC << 7) -#define HC_HTXnTBLCb_InvTOPC (HC_XTC_InvTOPC << 7) -#define HC_HTXnTBLCb_TOPCp5 (HC_XTC_TOPCp5 << 7) -#define HC_HTXnTBLCb_0 (HC_XTC_0 << 7) -#define HC_HTXnTBLCb_Dif (HC_XTC_Dif << 7) -#define HC_HTXnTBLCb_Spec (HC_XTC_Spec << 7) -#define HC_HTXnTBLCb_Tex (HC_XTC_Tex << 7) -#define HC_HTXnTBLCb_Cur (HC_XTC_Cur << 7) -#define HC_HTXnTBLCb_Adif (HC_XTC_Adif << 7) -#define HC_HTXnTBLCb_Fog (HC_XTC_Fog << 7) -#define HC_HTXnTBLCb_Atex (HC_XTC_Atex << 7) -#define HC_HTXnTBLCb_Acur (HC_XTC_Acur << 7) -#define HC_HTXnTBLCb_HTXnTBLRC (HC_XTC_HTXnTBLRC << 7) -#define HC_HTXnTBLCb_Ctexnext (HC_XTC_Ctexnext << 7) -#define HC_HTXnTBLCc_TOPC (HC_XTC_TOPC << 0) -#define HC_HTXnTBLCc_InvTOPC (HC_XTC_InvTOPC << 0) -#define HC_HTXnTBLCc_TOPCp5 (HC_XTC_TOPCp5 << 0) -#define HC_HTXnTBLCc_0 (HC_XTC_0 << 0) -#define HC_HTXnTBLCc_Dif (HC_XTC_Dif << 0) -#define HC_HTXnTBLCc_Spec (HC_XTC_Spec << 0) -#define HC_HTXnTBLCc_Tex (HC_XTC_Tex << 0) -#define HC_HTXnTBLCc_Cur (HC_XTC_Cur << 0) -#define HC_HTXnTBLCc_Adif (HC_XTC_Adif << 0) -#define HC_HTXnTBLCc_Fog (HC_XTC_Fog << 0) -#define HC_HTXnTBLCc_Atex (HC_XTC_Atex << 0) -#define HC_HTXnTBLCc_Acur (HC_XTC_Acur << 0) -#define HC_HTXnTBLCc_HTXnTBLRC (HC_XTC_HTXnTBLRC << 0) -#define HC_HTXnTBLCc_Ctexnext (HC_XTC_Ctexnext << 0) -/* HC_SubA_HTXnTBLCop 0x0081 - */ -#define HC_HTXnTBLdot_MASK 0x00c00000 -#define HC_HTXnTBLCop_MASK 0x00380000 -#define HC_HTXnTBLCbias_MASK 0x0007c000 -#define HC_HTXnTBLCshift_MASK 0x00001800 -#define HC_HTXnTBLAop_MASK 0x00000380 -#define HC_HTXnTBLAbias_MASK 0x00000078 -#define HC_HTXnTBLAshift_MASK 0x00000003 -#define HC_HTXnTBLCop_Add 0x00000000 -#define HC_HTXnTBLCop_Sub 0x00080000 -#define HC_HTXnTBLCop_Min 0x00100000 -#define HC_HTXnTBLCop_Max 0x00180000 -#define HC_HTXnTBLCop_Mask 0x00200000 -#define HC_HTXnTBLCbias_Cbias (HC_XTC_Cbias << 14) -#define HC_HTXnTBLCbias_InvCbias (HC_XTC_InvCbias << 14) -#define HC_HTXnTBLCbias_0 (HC_XTC_0 << 14) -#define HC_HTXnTBLCbias_Dif (HC_XTC_Dif << 14) -#define HC_HTXnTBLCbias_Spec (HC_XTC_Spec << 14) -#define HC_HTXnTBLCbias_Tex (HC_XTC_Tex << 14) -#define HC_HTXnTBLCbias_Cur (HC_XTC_Cur << 14) -#define HC_HTXnTBLCbias_Adif (HC_XTC_Adif << 14) -#define HC_HTXnTBLCbias_Fog (HC_XTC_Fog << 14) -#define HC_HTXnTBLCbias_Atex (HC_XTC_Atex << 14) -#define HC_HTXnTBLCbias_Acur (HC_XTC_Acur << 14) -#define HC_HTXnTBLCbias_HTXnTBLRC (HC_XTC_HTXnTBLRC << 14) -#define HC_HTXnTBLCshift_1 0x00000000 -#define HC_HTXnTBLCshift_2 0x00000800 -#define HC_HTXnTBLCshift_No 0x00001000 -#define HC_HTXnTBLCshift_DotP 0x00001800 -/*=* John Sheng [2003.7.18] texture combine *=*/ -#define HC_HTXnTBLDOT3 0x00080000 -#define HC_HTXnTBLDOT4 0x000C0000 - -#define HC_HTXnTBLAop_Add 0x00000000 -#define HC_HTXnTBLAop_Sub 0x00000080 -#define HC_HTXnTBLAop_Min 0x00000100 -#define HC_HTXnTBLAop_Max 0x00000180 -#define HC_HTXnTBLAop_Mask 0x00000200 -#define HC_HTXnTBLAbias_Inv 0x00000040 -#define HC_HTXnTBLAbias_Adif 0x00000000 -#define HC_HTXnTBLAbias_Fog 0x00000008 -#define HC_HTXnTBLAbias_Acur 0x00000010 -#define HC_HTXnTBLAbias_HTXnTBLRAbias 0x00000018 -#define HC_HTXnTBLAbias_Atex 0x00000020 -#define HC_HTXnTBLAshift_1 0x00000000 -#define HC_HTXnTBLAshift_2 0x00000001 -#define HC_HTXnTBLAshift_No 0x00000002 -/* #define HC_HTXnTBLAshift_DotP 0x00000003 */ -/* HC_SubA_HTXnTBLMPFog 0x0082 - */ -#define HC_HTXnTBLMPfog_MASK 0x00e00000 -#define HC_HTXnTBLMPfog_0 0x00000000 -#define HC_HTXnTBLMPfog_Adif 0x00200000 -#define HC_HTXnTBLMPfog_Fog 0x00400000 -#define HC_HTXnTBLMPfog_Atex 0x00600000 -#define HC_HTXnTBLMPfog_Acur 0x00800000 -#define HC_HTXnTBLMPfog_GHTXnTBLRFog 0x00a00000 -/* HC_SubA_HTXnTBLAsat 0x0083 - *-- Define the texture alpha input. - */ -#define HC_XTA_TOPA 0x00000000 -#define HC_XTA_InvTOPA 0x00000008 -#define HC_XTA_TOPAp5 0x00000010 -#define HC_XTA_Adif 0x00000000 -#define HC_XTA_Fog 0x00000001 -#define HC_XTA_Acur 0x00000002 -#define HC_XTA_HTXnTBLRA 0x00000003 -#define HC_XTA_Atex 0x00000004 -#define HC_XTA_Atexnext 0x00000005 -/*-- - */ -#define HC_HTXnTBLAsat_MASK 0x00800000 -#define HC_HTXnTBLAMB_MASK 0x00700000 -#define HC_HTXnTBLAa_MASK 0x0007c000 -#define HC_HTXnTBLAb_MASK 0x00000f80 -#define HC_HTXnTBLAc_MASK 0x0000001f -#define HC_HTXnTBLAMB_SHIFT 20 -#define HC_HTXnTBLAa_TOPA (HC_XTA_TOPA << 14) -#define HC_HTXnTBLAa_InvTOPA (HC_XTA_InvTOPA << 14) -#define HC_HTXnTBLAa_TOPAp5 (HC_XTA_TOPAp5 << 14) -#define HC_HTXnTBLAa_Adif (HC_XTA_Adif << 14) -#define HC_HTXnTBLAa_Fog (HC_XTA_Fog << 14) -#define HC_HTXnTBLAa_Acur (HC_XTA_Acur << 14) -#define HC_HTXnTBLAa_HTXnTBLRA (HC_XTA_HTXnTBLRA << 14) -#define HC_HTXnTBLAa_Atex (HC_XTA_Atex << 14) -#define HC_HTXnTBLAa_Atexnext (HC_XTA_Atexnext << 14) -#define HC_HTXnTBLAb_TOPA (HC_XTA_TOPA << 7) -#define HC_HTXnTBLAb_InvTOPA (HC_XTA_InvTOPA << 7) -#define HC_HTXnTBLAb_TOPAp5 (HC_XTA_TOPAp5 << 7) -#define HC_HTXnTBLAb_Adif (HC_XTA_Adif << 7) -#define HC_HTXnTBLAb_Fog (HC_XTA_Fog << 7) -#define HC_HTXnTBLAb_Acur (HC_XTA_Acur << 7) -#define HC_HTXnTBLAb_HTXnTBLRA (HC_XTA_HTXnTBLRA << 7) -#define HC_HTXnTBLAb_Atex (HC_XTA_Atex << 7) -#define HC_HTXnTBLAb_Atexnext (HC_XTA_Atexnext << 7) -#define HC_HTXnTBLAc_TOPA (HC_XTA_TOPA << 0) -#define HC_HTXnTBLAc_InvTOPA (HC_XTA_InvTOPA << 0) -#define HC_HTXnTBLAc_TOPAp5 (HC_XTA_TOPAp5 << 0) -#define HC_HTXnTBLAc_Adif (HC_XTA_Adif << 0) -#define HC_HTXnTBLAc_Fog (HC_XTA_Fog << 0) -#define HC_HTXnTBLAc_Acur (HC_XTA_Acur << 0) -#define HC_HTXnTBLAc_HTXnTBLRA (HC_XTA_HTXnTBLRA << 0) -#define HC_HTXnTBLAc_Atex (HC_XTA_Atex << 0) -#define HC_HTXnTBLAc_Atexnext (HC_XTA_Atexnext << 0) -/* HC_SubA_HTXnTBLRAa 0x0089 - */ -#define HC_HTXnTBLRAa_MASK 0x00ff0000 -#define HC_HTXnTBLRAb_MASK 0x0000ff00 -#define HC_HTXnTBLRAc_MASK 0x000000ff -#define HC_HTXnTBLRAa_SHIFT 16 -#define HC_HTXnTBLRAb_SHIFT 8 -#define HC_HTXnTBLRAc_SHIFT 0 -/* HC_SubA_HTXnTBLRFog 0x008a - */ -#define HC_HTXnTBLRFog_MASK 0x0000ff00 -#define HC_HTXnTBLRAbias_MASK 0x000000ff -#define HC_HTXnTBLRFog_SHIFT 8 -#define HC_HTXnTBLRAbias_SHIFT 0 -/* HC_SubA_HTXnLScale 0x0094 - */ -#define HC_HTXnLScale_MASK 0x0007fc00 -#define HC_HTXnLOff_MASK 0x000001ff -#define HC_HTXnLScale_SHIFT 10 -/* HC_SubA_HTXSMD 0x0000 - */ -#define HC_HTXSMD_MASK 0x00000080 -#define HC_HTXTMD_MASK 0x00000040 -#define HC_HTXNum_MASK 0x00000038 -#define HC_HTXTRMD_MASK 0x00000006 -#define HC_HTXCHCLR_MASK 0x00000001 -#define HC_HTXNum_SHIFT 3 - -/* Texture Palette n - */ -#define HC_SubType_TexPalette0 0x00000000 -#define HC_SubType_TexPalette1 0x00000001 -#define HC_SubType_FogTable 0x00000010 -#define HC_SubType_Stipple 0x00000014 -/* HC_SubA_TexPalette0 0x0000 - */ -#define HC_HTPnA_MASK 0xff000000 -#define HC_HTPnR_MASK 0x00ff0000 -#define HC_HTPnG_MASK 0x0000ff00 -#define HC_HTPnB_MASK 0x000000ff -/* HC_SubA_FogTable 0x0010 - */ -#define HC_HFPn3_MASK 0xff000000 -#define HC_HFPn2_MASK 0x00ff0000 -#define HC_HFPn1_MASK 0x0000ff00 -#define HC_HFPn_MASK 0x000000ff -#define HC_HFPn3_SHIFT 24 -#define HC_HFPn2_SHIFT 16 -#define HC_HFPn1_SHIFT 8 - -/* Auto Testing & Security - */ -#define HC_SubA_HenFIFOAT 0x0000 -#define HC_SubA_HFBDrawFirst 0x0004 -#define HC_SubA_HFBBasL 0x0005 -#define HC_SubA_HFBDst 0x0006 -/* HC_SubA_HenFIFOAT 0x0000 - */ -#define HC_HenFIFOAT_MASK 0x00000020 -#define HC_HenGEMILock_MASK 0x00000010 -#define HC_HenFBASwap_MASK 0x00000008 -#define HC_HenOT_MASK 0x00000004 -#define HC_HenCMDQ_MASK 0x00000002 -#define HC_HenTXCTSU_MASK 0x00000001 -/* HC_SubA_HFBDrawFirst 0x0004 - */ -#define HC_HFBDrawFirst_MASK 0x00000800 -#define HC_HFBQueue_MASK 0x00000400 -#define HC_HFBLock_MASK 0x00000200 -#define HC_HEOF_MASK 0x00000100 -#define HC_HFBBasH_MASK 0x000000ff - -/* GEMI Setting - */ -#define HC_SubA_HTArbRCM 0x0008 -#define HC_SubA_HTArbRZ 0x000a -#define HC_SubA_HTArbWZ 0x000b -#define HC_SubA_HTArbRTX 0x000c -#define HC_SubA_HTArbRCW 0x000d -#define HC_SubA_HTArbE2 0x000e -#define HC_SubA_HArbRQCM 0x0010 -#define HC_SubA_HArbWQCM 0x0011 -#define HC_SubA_HGEMITout 0x0020 -#define HC_SubA_HFthRTXD 0x0040 -#define HC_SubA_HFthRTXA 0x0044 -#define HC_SubA_HCMDQstL 0x0050 -#define HC_SubA_HCMDQendL 0x0051 -#define HC_SubA_HCMDQLen 0x0052 -/* HC_SubA_HTArbRCM 0x0008 - */ -#define HC_HTArbRCM_MASK 0x0000ffff -/* HC_SubA_HTArbRZ 0x000a - */ -#define HC_HTArbRZ_MASK 0x0000ffff -/* HC_SubA_HTArbWZ 0x000b - */ -#define HC_HTArbWZ_MASK 0x0000ffff -/* HC_SubA_HTArbRTX 0x000c - */ -#define HC_HTArbRTX_MASK 0x0000ffff -/* HC_SubA_HTArbRCW 0x000d - */ -#define HC_HTArbRCW_MASK 0x0000ffff -/* HC_SubA_HTArbE2 0x000e - */ -#define HC_HTArbE2_MASK 0x0000ffff -/* HC_SubA_HArbRQCM 0x0010 - */ -#define HC_HTArbRQCM_MASK 0x0000ffff -/* HC_SubA_HArbWQCM 0x0011 - */ -#define HC_HArbWQCM_MASK 0x0000ffff -/* HC_SubA_HGEMITout 0x0020 - */ -#define HC_HGEMITout_MASK 0x000f0000 -#define HC_HNPArbZC_MASK 0x0000ffff -#define HC_HGEMITout_SHIFT 16 -/* HC_SubA_HFthRTXD 0x0040 - */ -#define HC_HFthRTXD_MASK 0x00ff0000 -#define HC_HFthRZD_MASK 0x0000ff00 -#define HC_HFthWZD_MASK 0x000000ff -#define HC_HFthRTXD_SHIFT 16 -#define HC_HFthRZD_SHIFT 8 -/* HC_SubA_HFthRTXA 0x0044 - */ -#define HC_HFthRTXA_MASK 0x000000ff - -/****************************************************************************** -** Define the Halcyon Internal register access constants. For simulator only. -******************************************************************************/ -#define HC_SIMA_HAGPBstL 0x0000 -#define HC_SIMA_HAGPBendL 0x0001 -#define HC_SIMA_HAGPCMNT 0x0002 -#define HC_SIMA_HAGPBpL 0x0003 -#define HC_SIMA_HAGPBpH 0x0004 -#define HC_SIMA_HClipTB 0x0005 -#define HC_SIMA_HClipLR 0x0006 -#define HC_SIMA_HFPClipTL 0x0007 -#define HC_SIMA_HFPClipBL 0x0008 -#define HC_SIMA_HFPClipLL 0x0009 -#define HC_SIMA_HFPClipRL 0x000a -#define HC_SIMA_HFPClipTBH 0x000b -#define HC_SIMA_HFPClipLRH 0x000c -#define HC_SIMA_HLP 0x000d -#define HC_SIMA_HLPRF 0x000e -#define HC_SIMA_HSolidCL 0x000f -#define HC_SIMA_HPixGC 0x0010 -#define HC_SIMA_HSPXYOS 0x0011 -#define HC_SIMA_HCmdA 0x0012 -#define HC_SIMA_HCmdB 0x0013 -#define HC_SIMA_HEnable 0x0014 -#define HC_SIMA_HZWBBasL 0x0015 -#define HC_SIMA_HZWBBasH 0x0016 -#define HC_SIMA_HZWBType 0x0017 -#define HC_SIMA_HZBiasL 0x0018 -#define HC_SIMA_HZWBend 0x0019 -#define HC_SIMA_HZWTMD 0x001a -#define HC_SIMA_HZWCDL 0x001b -#define HC_SIMA_HZWCTAGnum 0x001c -#define HC_SIMA_HZCYNum 0x001d -#define HC_SIMA_HZWCFire 0x001e -/* #define HC_SIMA_HSBBasL 0x001d */ -/* #define HC_SIMA_HSBBasH 0x001e */ -/* #define HC_SIMA_HSBFM 0x001f */ -#define HC_SIMA_HSTREF 0x0020 -#define HC_SIMA_HSTMD 0x0021 -#define HC_SIMA_HABBasL 0x0022 -#define HC_SIMA_HABBasH 0x0023 -#define HC_SIMA_HABFM 0x0024 -#define HC_SIMA_HATMD 0x0025 -#define HC_SIMA_HABLCsat 0x0026 -#define HC_SIMA_HABLCop 0x0027 -#define HC_SIMA_HABLAsat 0x0028 -#define HC_SIMA_HABLAop 0x0029 -#define HC_SIMA_HABLRCa 0x002a -#define HC_SIMA_HABLRFCa 0x002b -#define HC_SIMA_HABLRCbias 0x002c -#define HC_SIMA_HABLRCb 0x002d -#define HC_SIMA_HABLRFCb 0x002e -#define HC_SIMA_HABLRAa 0x002f -#define HC_SIMA_HABLRAb 0x0030 -#define HC_SIMA_HDBBasL 0x0031 -#define HC_SIMA_HDBBasH 0x0032 -#define HC_SIMA_HDBFM 0x0033 -#define HC_SIMA_HFBBMSKL 0x0034 -#define HC_SIMA_HROP 0x0035 -#define HC_SIMA_HFogLF 0x0036 -#define HC_SIMA_HFogCL 0x0037 -#define HC_SIMA_HFogCH 0x0038 -#define HC_SIMA_HFogStL 0x0039 -#define HC_SIMA_HFogStH 0x003a -#define HC_SIMA_HFogOOdMF 0x003b -#define HC_SIMA_HFogOOdEF 0x003c -#define HC_SIMA_HFogEndL 0x003d -#define HC_SIMA_HFogDenst 0x003e -/*---- start of texture 0 setting ---- - */ -#define HC_SIMA_HTX0L0BasL 0x0040 -#define HC_SIMA_HTX0L1BasL 0x0041 -#define HC_SIMA_HTX0L2BasL 0x0042 -#define HC_SIMA_HTX0L3BasL 0x0043 -#define HC_SIMA_HTX0L4BasL 0x0044 -#define HC_SIMA_HTX0L5BasL 0x0045 -#define HC_SIMA_HTX0L6BasL 0x0046 -#define HC_SIMA_HTX0L7BasL 0x0047 -#define HC_SIMA_HTX0L8BasL 0x0048 -#define HC_SIMA_HTX0L9BasL 0x0049 -#define HC_SIMA_HTX0LaBasL 0x004a -#define HC_SIMA_HTX0LbBasL 0x004b -#define HC_SIMA_HTX0LcBasL 0x004c -#define HC_SIMA_HTX0LdBasL 0x004d -#define HC_SIMA_HTX0LeBasL 0x004e -#define HC_SIMA_HTX0LfBasL 0x004f -#define HC_SIMA_HTX0L10BasL 0x0050 -#define HC_SIMA_HTX0L11BasL 0x0051 -#define HC_SIMA_HTX0L012BasH 0x0052 -#define HC_SIMA_HTX0L345BasH 0x0053 -#define HC_SIMA_HTX0L678BasH 0x0054 -#define HC_SIMA_HTX0L9abBasH 0x0055 -#define HC_SIMA_HTX0LcdeBasH 0x0056 -#define HC_SIMA_HTX0Lf1011BasH 0x0057 -#define HC_SIMA_HTX0L0Pit 0x0058 -#define HC_SIMA_HTX0L1Pit 0x0059 -#define HC_SIMA_HTX0L2Pit 0x005a -#define HC_SIMA_HTX0L3Pit 0x005b -#define HC_SIMA_HTX0L4Pit 0x005c -#define HC_SIMA_HTX0L5Pit 0x005d -#define HC_SIMA_HTX0L6Pit 0x005e -#define HC_SIMA_HTX0L7Pit 0x005f -#define HC_SIMA_HTX0L8Pit 0x0060 -#define HC_SIMA_HTX0L9Pit 0x0061 -#define HC_SIMA_HTX0LaPit 0x0062 -#define HC_SIMA_HTX0LbPit 0x0063 -#define HC_SIMA_HTX0LcPit 0x0064 -#define HC_SIMA_HTX0LdPit 0x0065 -#define HC_SIMA_HTX0LePit 0x0066 -#define HC_SIMA_HTX0LfPit 0x0067 -#define HC_SIMA_HTX0L10Pit 0x0068 -#define HC_SIMA_HTX0L11Pit 0x0069 -#define HC_SIMA_HTX0L0_5WE 0x006a -#define HC_SIMA_HTX0L6_bWE 0x006b -#define HC_SIMA_HTX0Lc_11WE 0x006c -#define HC_SIMA_HTX0L0_5HE 0x006d -#define HC_SIMA_HTX0L6_bHE 0x006e -#define HC_SIMA_HTX0Lc_11HE 0x006f -#define HC_SIMA_HTX0L0OS 0x0070 -#define HC_SIMA_HTX0TB 0x0071 -#define HC_SIMA_HTX0MPMD 0x0072 -#define HC_SIMA_HTX0CLODu 0x0073 -#define HC_SIMA_HTX0FM 0x0074 -#define HC_SIMA_HTX0TRCH 0x0075 -#define HC_SIMA_HTX0TRCL 0x0076 -#define HC_SIMA_HTX0TBC 0x0077 -#define HC_SIMA_HTX0TRAH 0x0078 -#define HC_SIMA_HTX0TBLCsat 0x0079 -#define HC_SIMA_HTX0TBLCop 0x007a -#define HC_SIMA_HTX0TBLMPfog 0x007b -#define HC_SIMA_HTX0TBLAsat 0x007c -#define HC_SIMA_HTX0TBLRCa 0x007d -#define HC_SIMA_HTX0TBLRCb 0x007e -#define HC_SIMA_HTX0TBLRCc 0x007f -#define HC_SIMA_HTX0TBLRCbias 0x0080 -#define HC_SIMA_HTX0TBLRAa 0x0081 -#define HC_SIMA_HTX0TBLRFog 0x0082 -#define HC_SIMA_HTX0BumpM00 0x0083 -#define HC_SIMA_HTX0BumpM01 0x0084 -#define HC_SIMA_HTX0BumpM10 0x0085 -#define HC_SIMA_HTX0BumpM11 0x0086 -#define HC_SIMA_HTX0LScale 0x0087 -/*---- end of texture 0 setting ---- 0x008f - */ -#define HC_SIMA_TX0TX1_OFF 0x0050 -/*---- start of texture 1 setting ---- - */ -#define HC_SIMA_HTX1L0BasL (HC_SIMA_HTX0L0BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L1BasL (HC_SIMA_HTX0L1BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L2BasL (HC_SIMA_HTX0L2BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L3BasL (HC_SIMA_HTX0L3BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L4BasL (HC_SIMA_HTX0L4BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L5BasL (HC_SIMA_HTX0L5BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L6BasL (HC_SIMA_HTX0L6BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L7BasL (HC_SIMA_HTX0L7BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L8BasL (HC_SIMA_HTX0L8BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L9BasL (HC_SIMA_HTX0L9BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LaBasL (HC_SIMA_HTX0LaBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LbBasL (HC_SIMA_HTX0LbBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LcBasL (HC_SIMA_HTX0LcBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LdBasL (HC_SIMA_HTX0LdBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LeBasL (HC_SIMA_HTX0LeBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LfBasL (HC_SIMA_HTX0LfBasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L10BasL (HC_SIMA_HTX0L10BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L11BasL (HC_SIMA_HTX0L11BasL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L012BasH (HC_SIMA_HTX0L012BasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L345BasH (HC_SIMA_HTX0L345BasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L678BasH (HC_SIMA_HTX0L678BasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L9abBasH (HC_SIMA_HTX0L9abBasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LcdeBasH (HC_SIMA_HTX0LcdeBasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1Lf1011BasH (HC_SIMA_HTX0Lf1011BasH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L0Pit (HC_SIMA_HTX0L0Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L1Pit (HC_SIMA_HTX0L1Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L2Pit (HC_SIMA_HTX0L2Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L3Pit (HC_SIMA_HTX0L3Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L4Pit (HC_SIMA_HTX0L4Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L5Pit (HC_SIMA_HTX0L5Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L6Pit (HC_SIMA_HTX0L6Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L7Pit (HC_SIMA_HTX0L7Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L8Pit (HC_SIMA_HTX0L8Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L9Pit (HC_SIMA_HTX0L9Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LaPit (HC_SIMA_HTX0LaPit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LbPit (HC_SIMA_HTX0LbPit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LcPit (HC_SIMA_HTX0LcPit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LdPit (HC_SIMA_HTX0LdPit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LePit (HC_SIMA_HTX0LePit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LfPit (HC_SIMA_HTX0LfPit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L10Pit (HC_SIMA_HTX0L10Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L11Pit (HC_SIMA_HTX0L11Pit + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L0_5WE (HC_SIMA_HTX0L0_5WE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L6_bWE (HC_SIMA_HTX0L6_bWE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1Lc_11WE (HC_SIMA_HTX0Lc_11WE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L0_5HE (HC_SIMA_HTX0L0_5HE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L6_bHE (HC_SIMA_HTX0L6_bHE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1Lc_11HE (HC_SIMA_HTX0Lc_11HE + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1L0OS (HC_SIMA_HTX0L0OS + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TB (HC_SIMA_HTX0TB + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1MPMD (HC_SIMA_HTX0MPMD + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1CLODu (HC_SIMA_HTX0CLODu + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1FM (HC_SIMA_HTX0FM + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TRCH (HC_SIMA_HTX0TRCH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TRCL (HC_SIMA_HTX0TRCL + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBC (HC_SIMA_HTX0TBC + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TRAH (HC_SIMA_HTX0TRAH + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LTC (HC_SIMA_HTX0LTC + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LTA (HC_SIMA_HTX0LTA + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLCsat (HC_SIMA_HTX0TBLCsat + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLCop (HC_SIMA_HTX0TBLCop + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLMPfog (HC_SIMA_HTX0TBLMPfog + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLAsat (HC_SIMA_HTX0TBLAsat + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRCa (HC_SIMA_HTX0TBLRCa + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRCb (HC_SIMA_HTX0TBLRCb + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRCc (HC_SIMA_HTX0TBLRCc + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRCbias (HC_SIMA_HTX0TBLRCbias + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRAa (HC_SIMA_HTX0TBLRAa + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1TBLRFog (HC_SIMA_HTX0TBLRFog + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1BumpM00 (HC_SIMA_HTX0BumpM00 + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1BumpM01 (HC_SIMA_HTX0BumpM01 + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1BumpM10 (HC_SIMA_HTX0BumpM10 + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1BumpM11 (HC_SIMA_HTX0BumpM11 + HC_SIMA_TX0TX1_OFF) -#define HC_SIMA_HTX1LScale (HC_SIMA_HTX0LScale + HC_SIMA_TX0TX1_OFF) -/*---- end of texture 1 setting ---- 0xaf - */ -#define HC_SIMA_HTXSMD 0x00b0 -#define HC_SIMA_HenFIFOAT 0x00b1 -#define HC_SIMA_HFBDrawFirst 0x00b2 -#define HC_SIMA_HFBBasL 0x00b3 -#define HC_SIMA_HTArbRCM 0x00b4 -#define HC_SIMA_HTArbRZ 0x00b5 -#define HC_SIMA_HTArbWZ 0x00b6 -#define HC_SIMA_HTArbRTX 0x00b7 -#define HC_SIMA_HTArbRCW 0x00b8 -#define HC_SIMA_HTArbE2 0x00b9 -#define HC_SIMA_HGEMITout 0x00ba -#define HC_SIMA_HFthRTXD 0x00bb -#define HC_SIMA_HFthRTXA 0x00bc -/* Define the texture palette 0 - */ -#define HC_SIMA_HTP0 0x0100 -#define HC_SIMA_HTP1 0x0200 -#define HC_SIMA_FOGTABLE 0x0300 -#define HC_SIMA_STIPPLE 0x0400 -#define HC_SIMA_HE3Fire 0x0440 -#define HC_SIMA_TRANS_SET 0x0441 -#define HC_SIMA_HREngSt 0x0442 -#define HC_SIMA_HRFIFOempty 0x0443 -#define HC_SIMA_HRFIFOfull 0x0444 -#define HC_SIMA_HRErr 0x0445 -#define HC_SIMA_FIFOstatus 0x0446 - -/****************************************************************************** -** Define the AGP command header. -******************************************************************************/ -#define HC_ACMD_MASK 0xfe000000 -#define HC_ACMD_SUB_MASK 0x0c000000 -#define HC_ACMD_HCmdA 0xee000000 -#define HC_ACMD_HCmdB 0xec000000 -#define HC_ACMD_HCmdC 0xea000000 -#define HC_ACMD_H1 0xf0000000 -#define HC_ACMD_H2 0xf2000000 -#define HC_ACMD_H3 0xf4000000 -#define HC_ACMD_H4 0xf6000000 - -#define HC_ACMD_H1IO_MASK 0x000001ff -#define HC_ACMD_H2IO1_MASK 0x001ff000 -#define HC_ACMD_H2IO2_MASK 0x000001ff -#define HC_ACMD_H2IO1_SHIFT 12 -#define HC_ACMD_H2IO2_SHIFT 0 -#define HC_ACMD_H3IO_MASK 0x000001ff -#define HC_ACMD_H3COUNT_MASK 0x01fff000 -#define HC_ACMD_H3COUNT_SHIFT 12 -#define HC_ACMD_H4ID_MASK 0x000001ff -#define HC_ACMD_H4COUNT_MASK 0x01fffe00 -#define HC_ACMD_H4COUNT_SHIFT 9 - -/******************************************************************************** -** Define Header -********************************************************************************/ -#define HC_HEADER2 0xF210F110 - -/******************************************************************************** -** Define Dummy Value -********************************************************************************/ -#define HC_DUMMY 0xCCCCCCCC -/******************************************************************************** -** Define for DMA use -********************************************************************************/ -#define HALCYON_HEADER2 0XF210F110 -#define HALCYON_FIRECMD 0XEE100000 -#define HALCYON_FIREMASK 0XFFF00000 -#define HALCYON_CMDB 0XEC000000 -#define HALCYON_CMDBMASK 0XFFFE0000 -#define HALCYON_SUB_ADDR0 0X00000000 -#define HALCYON_HEADER1MASK 0XFFFFFC00 -#define HALCYON_HEADER1 0XF0000000 -#define HC_SubA_HAGPBstL 0x0060 -#define HC_SubA_HAGPBendL 0x0061 -#define HC_SubA_HAGPCMNT 0x0062 -#define HC_SubA_HAGPBpL 0x0063 -#define HC_SubA_HAGPBpH 0x0064 -#define HC_HAGPCMNT_MASK 0x00800000 -#define HC_HCmdErrClr_MASK 0x00400000 -#define HC_HAGPBendH_MASK 0x0000ff00 -#define HC_HAGPBstH_MASK 0x000000ff -#define HC_HAGPBendH_SHIFT 8 -#define HC_HAGPBstH_SHIFT 0 -#define HC_HAGPBpL_MASK 0x00fffffc -#define HC_HAGPBpID_MASK 0x00000003 -#define HC_HAGPBpID_PAUSE 0x00000000 -#define HC_HAGPBpID_JUMP 0x00000001 -#define HC_HAGPBpID_STOP 0x00000002 -#define HC_HAGPBpH_MASK 0x00ffffff - -#define VIA_VIDEO_HEADER5 0xFE040000 -#define VIA_VIDEO_HEADER6 0xFE050000 -#define VIA_VIDEO_HEADER7 0xFE060000 -#define VIA_VIDEOMASK 0xFFFF0000 -#endif diff --git a/sys/dev/drm/via_dma.c b/sys/dev/drm/via_dma.c deleted file mode 100644 index 53f806cddaea..000000000000 --- a/sys/dev/drm/via_dma.c +++ /dev/null @@ -1,767 +0,0 @@ -/* via_dma.c -- DMA support for the VIA Unichrome/Pro - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Copyright 2004 Digeo, Inc., Palo Alto, CA, U.S.A. - * All Rights Reserved. - * - * Copyright 2004 The Unichrome project. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Tungsten Graphics, - * Erdi Chen, - * Thomas Hellstrom. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/via_drm.h" -#include "dev/drm/via_drv.h" -#include "dev/drm/via_3d_reg.h" - -#define CMDBUF_ALIGNMENT_SIZE (0x100) -#define CMDBUF_ALIGNMENT_MASK (0x0ff) - -/* defines for VIA 3D registers */ -#define VIA_REG_STATUS 0x400 -#define VIA_REG_TRANSET 0x43C -#define VIA_REG_TRANSPACE 0x440 - -/* VIA_REG_STATUS(0x400): Engine Status */ -#define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */ -#define VIA_2D_ENG_BUSY 0x00000001 /* 2D Engine is busy */ -#define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */ -#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */ - -#define SetReg2DAGP(nReg, nData) { \ - *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \ - *((uint32_t *)(vb) + 1) = (nData); \ - vb = ((uint32_t *)vb) + 2; \ - dev_priv->dma_low +=8; \ -} - -#define via_flush_write_combine() DRM_MEMORYBARRIER() - -#define VIA_OUT_RING_QW(w1,w2) \ - *vb++ = (w1); \ - *vb++ = (w2); \ - dev_priv->dma_low += 8; - -static void via_cmdbuf_start(drm_via_private_t * dev_priv); -static void via_cmdbuf_pause(drm_via_private_t * dev_priv); -static void via_cmdbuf_reset(drm_via_private_t * dev_priv); -static void via_cmdbuf_rewind(drm_via_private_t * dev_priv); -static int via_wait_idle(drm_via_private_t * dev_priv); -static void via_pad_cache(drm_via_private_t * dev_priv, int qwords); - -/* - * Free space in command buffer. - */ - -static uint32_t via_cmdbuf_space(drm_via_private_t * dev_priv) -{ - uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; - - return ((hw_addr <= dev_priv->dma_low) ? - (dev_priv->dma_high + hw_addr - dev_priv->dma_low) : - (hw_addr - dev_priv->dma_low)); -} - -/* - * How much does the command regulator lag behind? - */ - -static uint32_t via_cmdbuf_lag(drm_via_private_t * dev_priv) -{ - uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; - - return ((hw_addr <= dev_priv->dma_low) ? - (dev_priv->dma_low - hw_addr) : - (dev_priv->dma_wrap + dev_priv->dma_low - hw_addr)); -} - -/* - * Check that the given size fits in the buffer, otherwise wait. - */ - -static inline int -via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) -{ - uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - uint32_t cur_addr, hw_addr, next_addr; - volatile uint32_t *hw_addr_ptr; - uint32_t count; - hw_addr_ptr = dev_priv->hw_addr_ptr; - cur_addr = dev_priv->dma_low; - next_addr = cur_addr + size + 512 * 1024; - count = 1000000; - do { - hw_addr = *hw_addr_ptr - agp_base; - if (count-- == 0) { - DRM_ERROR - ("via_cmdbuf_wait timed out hw %x cur_addr %x next_addr %x\n", - hw_addr, cur_addr, next_addr); - return -1; - } - if ((cur_addr < hw_addr) && (next_addr >= hw_addr)) - DRM_UDELAY(1000); - } while ((cur_addr < hw_addr) && (next_addr >= hw_addr)); - return 0; -} - -/* - * Checks whether buffer head has reach the end. Rewind the ring buffer - * when necessary. - * - * Returns virtual pointer to ring buffer. - */ - -static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv, - unsigned int size) -{ - if ((dev_priv->dma_low + size + 4 * CMDBUF_ALIGNMENT_SIZE) > - dev_priv->dma_high) { - via_cmdbuf_rewind(dev_priv); - } - if (via_cmdbuf_wait(dev_priv, size) != 0) { - return NULL; - } - - return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); -} - -int via_dma_cleanup(struct drm_device * dev) -{ - drm_via_blitq_t *blitq; - int i; - - if (dev->dev_private) { - drm_via_private_t *dev_priv = - (drm_via_private_t *) dev->dev_private; - - if (dev_priv->ring.virtual_start) { - via_cmdbuf_reset(dev_priv); - - drm_core_ioremapfree(&dev_priv->ring.map, dev); - dev_priv->ring.virtual_start = NULL; - } - - for (i=0; i< VIA_NUM_BLIT_ENGINES; ++i) { - blitq = dev_priv->blit_queues + i; - mtx_destroy(&blitq->blit_lock); - } - } - - return 0; -} - -static int via_initialize(struct drm_device * dev, - drm_via_private_t * dev_priv, - drm_via_dma_init_t * init) -{ - if (!dev_priv || !dev_priv->mmio) { - DRM_ERROR("via_dma_init called before via_map_init\n"); - return -EFAULT; - } - - if (dev_priv->ring.virtual_start != NULL) { - DRM_ERROR("called again without calling cleanup\n"); - return -EFAULT; - } - - if (!dev->agp || !dev->agp->base) { - DRM_ERROR("called with no agp memory available\n"); - return -EFAULT; - } - - if (dev_priv->chipset == VIA_DX9_0) { - DRM_ERROR("AGP DMA is not supported on this chip\n"); - return -EINVAL; - } - - dev_priv->ring.map.offset = dev->agp->base + init->offset; - dev_priv->ring.map.size = init->size; - dev_priv->ring.map.type = 0; - dev_priv->ring.map.flags = 0; - dev_priv->ring.map.mtrr = 0; - - drm_core_ioremap_wc(&dev_priv->ring.map, dev); - - if (dev_priv->ring.map.virtual == NULL) { - via_dma_cleanup(dev); - DRM_ERROR("can not ioremap virtual address for" - " ring buffer\n"); - return -ENOMEM; - } - - dev_priv->ring.virtual_start = dev_priv->ring.map.virtual; - - dev_priv->dma_ptr = dev_priv->ring.virtual_start; - dev_priv->dma_low = 0; - dev_priv->dma_high = init->size; - dev_priv->dma_wrap = init->size; - dev_priv->dma_offset = init->offset; - dev_priv->last_pause_ptr = NULL; - dev_priv->hw_addr_ptr = - (volatile uint32_t *)((char *)dev_priv->mmio->virtual + - init->reg_pause_addr); - - via_cmdbuf_start(dev_priv); - - return 0; -} - -static int via_dma_init(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - drm_via_dma_init_t *init = data; - int retcode = 0; - - switch (init->func) { - case VIA_INIT_DMA: - if (!DRM_SUSER(DRM_CURPROC)) - retcode = -EPERM; - else - retcode = via_initialize(dev, dev_priv, init); - break; - case VIA_CLEANUP_DMA: - if (!DRM_SUSER(DRM_CURPROC)) - retcode = -EPERM; - else - retcode = via_dma_cleanup(dev); - break; - case VIA_DMA_INITIALIZED: - retcode = (dev_priv->ring.virtual_start != NULL) ? - 0 : -EFAULT; - break; - default: - retcode = -EINVAL; - break; - } - - return retcode; -} - -static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t * cmd) -{ - drm_via_private_t *dev_priv; - uint32_t *vb; - int ret; - - dev_priv = (drm_via_private_t *) dev->dev_private; - - if (dev_priv->ring.virtual_start == NULL) { - DRM_ERROR("called without initializing AGP ring buffer.\n"); - return -EFAULT; - } - - if (cmd->size > VIA_PCI_BUF_SIZE) { - return -ENOMEM; - } - - if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) - return -EFAULT; - - /* - * Running this function on AGP memory is dead slow. Therefore - * we run it on a temporary cacheable system memory buffer and - * copy it to AGP memory when ready. - */ - - if ((ret = - via_verify_command_stream((uint32_t *) dev_priv->pci_buf, - cmd->size, dev, 1))) { - return ret; - } - - vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size); - if (vb == NULL) { - return -EAGAIN; - } - - memcpy(vb, dev_priv->pci_buf, cmd->size); - - dev_priv->dma_low += cmd->size; - - /* - * Small submissions somehow stalls the CPU. (AGP cache effects?) - * pad to greater size. - */ - - if (cmd->size < 0x100) - via_pad_cache(dev_priv, (0x100 - cmd->size) >> 3); - via_cmdbuf_pause(dev_priv); - - return 0; -} - -int via_driver_dma_quiescent(struct drm_device * dev) -{ - drm_via_private_t *dev_priv = dev->dev_private; - - if (!via_wait_idle(dev_priv)) { - return -EBUSY; - } - return 0; -} - -static int via_flush_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - return via_driver_dma_quiescent(dev); -} - -static int via_cmdbuffer(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_via_cmdbuffer_t *cmdbuf = data; - int ret; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size); - - ret = via_dispatch_cmdbuffer(dev, cmdbuf); - if (ret) { - return ret; - } - - return 0; -} - -static int via_dispatch_pci_cmdbuffer(struct drm_device * dev, - drm_via_cmdbuffer_t * cmd) -{ - drm_via_private_t *dev_priv = dev->dev_private; - int ret; - - if (cmd->size > VIA_PCI_BUF_SIZE) { - return -ENOMEM; - } - if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) - return -EFAULT; - - if ((ret = - via_verify_command_stream((uint32_t *) dev_priv->pci_buf, - cmd->size, dev, 0))) { - return ret; - } - - ret = - via_parse_command_stream(dev, (const uint32_t *)dev_priv->pci_buf, - cmd->size); - return ret; -} - -static int via_pci_cmdbuffer(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_via_cmdbuffer_t *cmdbuf = data; - int ret; - - LOCK_TEST_WITH_RETURN(dev, file_priv); - - DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size); - - ret = via_dispatch_pci_cmdbuffer(dev, cmdbuf); - if (ret) { - return ret; - } - - return 0; -} - -static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv, - uint32_t * vb, int qw_count) -{ - for (; qw_count > 0; --qw_count) { - VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY); - } - return vb; -} - -/* - * This function is used internally by ring buffer management code. - * - * Returns virtual pointer to ring buffer. - */ -static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv) -{ - return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); -} - -/* - * Hooks a segment of data into the tail of the ring-buffer by - * modifying the pause address stored in the buffer itself. If - * the regulator has already paused, restart it. - */ -static int via_hook_segment(drm_via_private_t * dev_priv, - uint32_t pause_addr_hi, uint32_t pause_addr_lo, - int no_pci_fire) -{ - int paused, count; - volatile uint32_t *paused_at = dev_priv->last_pause_ptr; - uint32_t reader,ptr; - uint32_t diff; - - paused = 0; - via_flush_write_combine(); - (void) *(volatile uint32_t *)(via_get_dma(dev_priv) -1); - - *paused_at = pause_addr_lo; - via_flush_write_combine(); - (void) *paused_at; - - reader = *(dev_priv->hw_addr_ptr); - ptr = ((volatile char *)paused_at - dev_priv->dma_ptr) + - dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4; - - dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1; - - /* - * If there is a possibility that the command reader will - * miss the new pause address and pause on the old one, - * In that case we need to program the new start address - * using PCI. - */ - - diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; - count = 10000000; - while(diff == 0 && count--) { - paused = (VIA_READ(0x41c) & 0x80000000); - if (paused) - break; - reader = *(dev_priv->hw_addr_ptr); - diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; - } - - paused = VIA_READ(0x41c) & 0x80000000; - - if (paused && !no_pci_fire) { - reader = *(dev_priv->hw_addr_ptr); - diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; - diff &= (dev_priv->dma_high - 1); - if (diff != 0 && diff < (dev_priv->dma_high >> 1)) { - DRM_ERROR("Paused at incorrect address. " - "0x%08x, 0x%08x 0x%08x\n", - ptr, reader, dev_priv->dma_diff); - } else if (diff == 0) { - /* - * There is a concern that these writes may stall the PCI bus - * if the GPU is not idle. However, idling the GPU first - * doesn't make a difference. - */ - - VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); - (void)VIA_READ(VIA_REG_TRANSPACE); - } - } - return paused; -} - -static int via_wait_idle(drm_via_private_t * dev_priv) -{ - int count = 10000000; - - while (!(VIA_READ(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && --count) - ; - - while (count && (VIA_READ(VIA_REG_STATUS) & - (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | - VIA_3D_ENG_BUSY))) - --count; - return count; -} - -static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, - uint32_t addr, uint32_t * cmd_addr_hi, - uint32_t * cmd_addr_lo, int skip_wait) -{ - uint32_t agp_base; - uint32_t cmd_addr, addr_lo, addr_hi; - uint32_t *vb; - uint32_t qw_pad_count; - - if (!skip_wait) - via_cmdbuf_wait(dev_priv, 2 * CMDBUF_ALIGNMENT_SIZE); - - vb = via_get_dma(dev_priv); - VIA_OUT_RING_QW(HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | - (VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16); - agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) - - ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); - - cmd_addr = (addr) ? addr : - agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); - addr_lo = ((HC_SubA_HAGPBpL << 24) | (cmd_type & HC_HAGPBpID_MASK) | - (cmd_addr & HC_HAGPBpL_MASK)); - addr_hi = ((HC_SubA_HAGPBpH << 24) | (cmd_addr >> 24)); - - vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1); - VIA_OUT_RING_QW(*cmd_addr_hi = addr_hi, *cmd_addr_lo = addr_lo); - return vb; -} - -static void via_cmdbuf_start(drm_via_private_t * dev_priv) -{ - uint32_t pause_addr_lo, pause_addr_hi; - uint32_t start_addr, start_addr_lo; - uint32_t end_addr, end_addr_lo; - uint32_t command; - uint32_t agp_base; - uint32_t ptr; - uint32_t reader; - int count; - - dev_priv->dma_low = 0; - - agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - start_addr = agp_base; - end_addr = agp_base + dev_priv->dma_high; - - start_addr_lo = ((HC_SubA_HAGPBstL << 24) | (start_addr & 0xFFFFFF)); - end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF)); - command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) | - ((end_addr & 0xff000000) >> 16)); - - dev_priv->last_pause_ptr = - via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, - &pause_addr_hi, &pause_addr_lo, 1) - 1; - - via_flush_write_combine(); - (void) *(volatile uint32_t *)dev_priv->last_pause_ptr; - - VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); - VIA_WRITE(VIA_REG_TRANSPACE, command); - VIA_WRITE(VIA_REG_TRANSPACE, start_addr_lo); - VIA_WRITE(VIA_REG_TRANSPACE, end_addr_lo); - - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); - DRM_WRITEMEMORYBARRIER(); - VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); - (void)VIA_READ(VIA_REG_TRANSPACE); - - dev_priv->dma_diff = 0; - - count = 10000000; - while (!(VIA_READ(0x41c) & 0x80000000) && count--); - - reader = *(dev_priv->hw_addr_ptr); - ptr = ((volatile char *)dev_priv->last_pause_ptr - dev_priv->dma_ptr) + - dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4; - - /* - * This is the difference between where we tell the - * command reader to pause and where it actually pauses. - * This differs between hw implementation so we need to - * detect it. - */ - - dev_priv->dma_diff = ptr - reader; -} - -static void via_pad_cache(drm_via_private_t * dev_priv, int qwords) -{ - uint32_t *vb; - - via_cmdbuf_wait(dev_priv, qwords + 2); - vb = via_get_dma(dev_priv); - VIA_OUT_RING_QW(HC_HEADER2, HC_ParaType_NotTex << 16); - via_align_buffer(dev_priv, vb, qwords); -} - -static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) -{ - uint32_t *vb = via_get_dma(dev_priv); - SetReg2DAGP(0x0C, (0 | (0 << 16))); - SetReg2DAGP(0x10, 0 | (0 << 16)); - SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000); -} - -static void via_cmdbuf_jump(drm_via_private_t * dev_priv) -{ - uint32_t agp_base; - uint32_t pause_addr_lo, pause_addr_hi; - uint32_t jump_addr_lo, jump_addr_hi; - volatile uint32_t *last_pause_ptr; - uint32_t dma_low_save1, dma_low_save2; - - agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi, - &jump_addr_lo, 0); - - dev_priv->dma_wrap = dev_priv->dma_low; - - /* - * Wrap command buffer to the beginning. - */ - - dev_priv->dma_low = 0; - if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0) { - DRM_ERROR("via_cmdbuf_jump failed\n"); - } - - via_dummy_bitblt(dev_priv); - via_dummy_bitblt(dev_priv); - - last_pause_ptr = - via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, - &pause_addr_lo, 0) - 1; - via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, - &pause_addr_lo, 0); - - *last_pause_ptr = pause_addr_lo; - dma_low_save1 = dev_priv->dma_low; - - /* - * Now, set a trap that will pause the regulator if it tries to rerun the old - * command buffer. (Which may happen if via_hook_segment detecs a command regulator pause - * and reissues the jump command over PCI, while the regulator has already taken the jump - * and actually paused at the current buffer end). - * There appears to be no other way to detect this condition, since the hw_addr_pointer - * does not seem to get updated immediately when a jump occurs. - */ - - last_pause_ptr = - via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, - &pause_addr_lo, 0) - 1; - via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, - &pause_addr_lo, 0); - *last_pause_ptr = pause_addr_lo; - - dma_low_save2 = dev_priv->dma_low; - dev_priv->dma_low = dma_low_save1; - via_hook_segment(dev_priv, jump_addr_hi, jump_addr_lo, 0); - dev_priv->dma_low = dma_low_save2; - via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0); -} - - -static void via_cmdbuf_rewind(drm_via_private_t * dev_priv) -{ - via_cmdbuf_jump(dev_priv); -} - -static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) -{ - uint32_t pause_addr_lo, pause_addr_hi; - - via_align_cmd(dev_priv, cmd_type, 0, &pause_addr_hi, &pause_addr_lo, 0); - via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0); -} - -static void via_cmdbuf_pause(drm_via_private_t * dev_priv) -{ - via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE); -} - -static void via_cmdbuf_reset(drm_via_private_t * dev_priv) -{ - via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP); - via_wait_idle(dev_priv); -} - -/* - * User interface to the space and lag functions. - */ - -static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_via_cmdbuf_size_t *d_siz = data; - int ret = 0; - uint32_t tmp_size, count; - drm_via_private_t *dev_priv; - - DRM_DEBUG("\n"); - LOCK_TEST_WITH_RETURN(dev, file_priv); - - dev_priv = (drm_via_private_t *) dev->dev_private; - - if (dev_priv->ring.virtual_start == NULL) { - DRM_ERROR("called without initializing AGP ring buffer.\n"); - return -EFAULT; - } - - count = 1000000; - tmp_size = d_siz->size; - switch (d_siz->func) { - case VIA_CMDBUF_SPACE: - while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size) - && --count) { - if (!d_siz->wait) { - break; - } - } - if (!count) { - DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n"); - ret = -EAGAIN; - } - break; - case VIA_CMDBUF_LAG: - while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz->size) - && --count) { - if (!d_siz->wait) { - break; - } - } - if (!count) { - DRM_ERROR("VIA_CMDBUF_LAG timed out.\n"); - ret = -EAGAIN; - } - break; - default: - ret = -EFAULT; - } - d_siz->size = tmp_size; - - return ret; -} - -struct drm_ioctl_desc via_ioctls[] = { - DRM_IOCTL_DEF(DRM_VIA_ALLOCMEM, via_mem_alloc, DRM_AUTH), - DRM_IOCTL_DEF(DRM_VIA_FREEMEM, via_mem_free, DRM_AUTH), - DRM_IOCTL_DEF(DRM_VIA_AGP_INIT, via_agp_init, DRM_AUTH|DRM_MASTER), - DRM_IOCTL_DEF(DRM_VIA_FB_INIT, via_fb_init, DRM_AUTH|DRM_MASTER), - DRM_IOCTL_DEF(DRM_VIA_MAP_INIT, via_map_init, DRM_AUTH|DRM_MASTER), - DRM_IOCTL_DEF(DRM_VIA_DEC_FUTEX, via_decoder_futex, DRM_AUTH), - DRM_IOCTL_DEF(DRM_VIA_DMA_INIT, via_dma_init, DRM_AUTH), - DRM_IOCTL_DEF(DRM_VIA_CMDBUFFER, via_cmdbuffer, DRM_AUTH), - DRM_IOCTL_DEF(DRM_VIA_FLUSH, via_flush_ioctl, DRM_AUTH), - DRM_IOCTL_DEF(DRM_VIA_PCICMD, via_pci_cmdbuffer, DRM_AUTH), - DRM_IOCTL_DEF(DRM_VIA_CMDBUF_SIZE, via_cmdbuf_size, DRM_AUTH), - DRM_IOCTL_DEF(DRM_VIA_WAIT_IRQ, via_wait_irq, DRM_AUTH), - DRM_IOCTL_DEF(DRM_VIA_DMA_BLIT, via_dma_blit, DRM_AUTH), - DRM_IOCTL_DEF(DRM_VIA_BLIT_SYNC, via_dma_blit_sync, DRM_AUTH) -}; - -int via_max_ioctl = DRM_ARRAY_SIZE(via_ioctls); diff --git a/sys/dev/drm/via_dmablit.c b/sys/dev/drm/via_dmablit.c deleted file mode 100644 index e8096f2315e0..000000000000 --- a/sys/dev/drm/via_dmablit.c +++ /dev/null @@ -1,790 +0,0 @@ -/* via_dmablit.c -- PCI DMA BitBlt support for the VIA Unichrome/Pro - * - * Copyright (C) 2005 Thomas Hellstrom, All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Thomas Hellstrom. - * Partially based on code obtained from Digeo Inc. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -/* - * Unmaps the DMA mappings. - * FIXME: Is this a NoOp on x86? Also - * FIXME: What happens if this one is called and a pending blit has previously done - * the same DMA mappings? - */ - -#include "dev/drm/drmP.h" -#include "dev/drm/via_drm.h" -#include "dev/drm/via_drv.h" -#include "dev/drm/via_dmablit.h" - -#define VIA_PGDN(x) (((unsigned long)(x)) & ~PAGE_MASK) -#define VIA_PGOFF(x) (((unsigned long)(x)) & PAGE_MASK) -#define VIA_PFN(x) ((unsigned long)(x) >> PAGE_SHIFT) - -typedef struct _drm_via_descriptor { - uint32_t mem_addr; - uint32_t dev_addr; - uint32_t size; - uint32_t next; -} drm_via_descriptor_t; - -static void via_dmablit_timer(void *arg); - -/* - * Unmap a DMA mapping. - */ -static void -via_unmap_blit_from_device(drm_via_sg_info_t *vsg) -{ - int num_desc = vsg->num_desc; - unsigned cur_descriptor_page = num_desc / vsg->descriptors_per_page; - unsigned descriptor_this_page = num_desc % vsg->descriptors_per_page; - drm_via_descriptor_t *desc_ptr = vsg->desc_pages[cur_descriptor_page] + - descriptor_this_page; - dma_addr_t next = vsg->chain_start; - - while(num_desc--) { - if (descriptor_this_page-- == 0) { - cur_descriptor_page--; - descriptor_this_page = vsg->descriptors_per_page - 1; - desc_ptr = vsg->desc_pages[cur_descriptor_page] + - descriptor_this_page; - } - next = (dma_addr_t) desc_ptr->next; - desc_ptr--; - } -} - - -/* - * If mode = 0, count how many descriptors are needed. - * If mode = 1, Map the DMA pages for the device, put together and map also the descriptors. - * Descriptors are run in reverse order by the hardware because we are not allowed to update the - * 'next' field without syncing calls when the descriptor is already mapped. - */ -static void -via_map_blit_for_device(const drm_via_dmablit_t *xfer, - drm_via_sg_info_t *vsg, int mode) -{ - unsigned cur_descriptor_page = 0; - unsigned num_descriptors_this_page = 0; - unsigned char *mem_addr = xfer->mem_addr; - unsigned char *cur_mem; - unsigned char *first_addr = (unsigned char *)VIA_PGDN(mem_addr); - uint32_t fb_addr = xfer->fb_addr; - uint32_t cur_fb; - unsigned long line_len; - unsigned remaining_len; - int num_desc = 0; - int cur_line; - dma_addr_t next = 0 | VIA_DMA_DPR_EC; - drm_via_descriptor_t *desc_ptr = NULL; - - if (mode == 1) - desc_ptr = vsg->desc_pages[cur_descriptor_page]; - - for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) { - - line_len = xfer->line_length; - cur_fb = fb_addr; - cur_mem = mem_addr; - - while (line_len > 0) { - - remaining_len = min(PAGE_SIZE - VIA_PGOFF(cur_mem), - line_len); - line_len -= remaining_len; - - if (mode == 1) { - desc_ptr->mem_addr = - VM_PAGE_TO_PHYS( - vsg->pages[VIA_PFN(cur_mem) - - VIA_PFN(first_addr)]) + VIA_PGOFF(cur_mem); - desc_ptr->dev_addr = cur_fb; - - desc_ptr->size = remaining_len; - desc_ptr->next = (uint32_t) next; - - next = vtophys(desc_ptr); - - desc_ptr++; - if (++num_descriptors_this_page >= vsg->descriptors_per_page) { - num_descriptors_this_page = 0; - desc_ptr = vsg->desc_pages[++cur_descriptor_page]; - } - } - - num_desc++; - cur_mem += remaining_len; - cur_fb += remaining_len; - } - - mem_addr += xfer->mem_stride; - fb_addr += xfer->fb_stride; - } - - if (mode == 1) { - vsg->chain_start = next; - vsg->state = dr_via_device_mapped; - } - vsg->num_desc = num_desc; -} - - -/* - * Function that frees up all resources for a blit. It is usable even if the - * blit info has only been partially built as long as the status enum is consistent - * with the actual status of the used resources. - */ -static void -via_free_sg_info(drm_via_sg_info_t *vsg) -{ - vm_page_t page; - int i; - - switch(vsg->state) { - case dr_via_device_mapped: - via_unmap_blit_from_device(vsg); - case dr_via_desc_pages_alloc: - for (i=0; i<vsg->num_desc_pages; ++i) { - if (vsg->desc_pages[i] != NULL) - free(vsg->desc_pages[i], DRM_MEM_PAGES); - } - free(vsg->desc_pages, DRM_MEM_DRIVER); - case dr_via_pages_locked: - for (i=0; i < vsg->num_pages; ++i) { - page = vsg->pages[i]; - vm_page_lock(page); - vm_page_unwire(page, PQ_INACTIVE); - vm_page_unlock(page); - } - case dr_via_pages_alloc: - free(vsg->pages, DRM_MEM_DRIVER); - default: - vsg->state = dr_via_sg_init; - } - free(vsg->bounce_buffer, DRM_MEM_DRIVER); - vsg->bounce_buffer = NULL; - vsg->free_on_sequence = 0; -} - - -/* - * Fire a blit engine. - */ -static void -via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; - - VIA_WRITE(VIA_PCI_DMA_MAR0 + engine*0x10, 0); - VIA_WRITE(VIA_PCI_DMA_DAR0 + engine*0x10, 0); - VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD | - VIA_DMA_CSR_DE); - VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE); - VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0); - VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start); - DRM_WRITEMEMORYBARRIER(); - VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS); - (void)VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04); -} - - -/* - * Obtain a page pointer array and lock all pages into system memory. A segmentation violation will - * occur here if the calling user does not have access to the submitted address. - */ -static int -via_lock_all_dma_pages(drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer) -{ - unsigned long first_pfn = VIA_PFN(xfer->mem_addr); - vm_page_t m; - int i; - - vsg->num_pages = VIA_PFN(xfer->mem_addr + - (xfer->num_lines * xfer->mem_stride -1)) - first_pfn + 1; - - if (NULL == (vsg->pages = malloc(sizeof(vm_page_t) * vsg->num_pages, - DRM_MEM_DRIVER, M_NOWAIT))) - return -ENOMEM; - - vsg->state = dr_via_pages_alloc; - - if (vm_fault_quick_hold_pages(&curproc->p_vmspace->vm_map, - (vm_offset_t)xfer->mem_addr, vsg->num_pages * PAGE_SIZE, - VM_PROT_READ | VM_PROT_WRITE, vsg->pages, vsg->num_pages) < 0) - return -EACCES; - - for (i = 0; i < vsg->num_pages; i++) { - m = vsg->pages[i]; - vm_page_lock(m); - vm_page_wire(m); - vm_page_unhold(m); - vm_page_unlock(m); - } - vsg->state = dr_via_pages_locked; - - DRM_DEBUG("DMA pages locked\n"); - - return 0; -} - - -/* - * Allocate DMA capable memory for the blit descriptor chain, and an array that keeps track of the - * pages we allocate. We don't want to use kmalloc for the descriptor chain because it may be - * quite large for some blits, and pages don't need to be contingous. - */ -static int -via_alloc_desc_pages(drm_via_sg_info_t *vsg) -{ - int i; - - vsg->descriptors_per_page = PAGE_SIZE / sizeof(drm_via_descriptor_t); - vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) / - vsg->descriptors_per_page; - - if (NULL == (vsg->desc_pages = malloc(vsg->num_desc_pages * - sizeof(void *), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO))) - return -ENOMEM; - - vsg->state = dr_via_desc_pages_alloc; - for (i = 0; i < vsg->num_desc_pages; ++i) { - if (NULL == (vsg->desc_pages[i] = - (drm_via_descriptor_t *)malloc(PAGE_SIZE, DRM_MEM_PAGES, - M_NOWAIT | M_ZERO))) - return -ENOMEM; - } - DRM_DEBUG("Allocated %d pages for %d descriptors.\n", - vsg->num_desc_pages, vsg->num_desc); - - return 0; -} - - -static void -via_abort_dmablit(struct drm_device *dev, int engine) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; - - VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA); -} - - -static void -via_dmablit_engine_off(struct drm_device *dev, int engine) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; - - VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD); -} - - -/* - * The dmablit part of the IRQ handler. Trying to do only reasonably fast things here. - * The rest, like unmapping and freeing memory for done blits is done in a separate workqueue - * task. Basically the task of the interrupt handler is to submit a new blit to the engine, while - * the workqueue task takes care of processing associated with the old blit. - */ -void -via_dmablit_handler(struct drm_device *dev, int engine, int from_irq) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; - drm_via_blitq_t *blitq = dev_priv->blit_queues + engine; - int cur; - int done_transfer; - uint32_t status = 0; - - DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n", - engine, from_irq, (unsigned long) blitq); - - mtx_lock(&blitq->blit_lock); - - done_transfer = blitq->is_active && - (( status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD); - done_transfer = done_transfer || ( blitq->aborting && !(status & VIA_DMA_CSR_DE)); - - cur = blitq->cur; - if (done_transfer) { - - blitq->blits[cur]->aborted = blitq->aborting; - blitq->done_blit_handle++; - DRM_WAKEUP(&blitq->blit_queue[cur]); - - cur++; - if (cur >= VIA_NUM_BLIT_SLOTS) - cur = 0; - blitq->cur = cur; - - /* - * Clear transfer done flag. - */ - - VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD); - - blitq->is_active = 0; - blitq->aborting = 0; - - taskqueue_enqueue(taskqueue_swi, &blitq->wq); - - } else if (blitq->is_active && (ticks >= blitq->end)) { - - /* - * Abort transfer after one second. - */ - - via_abort_dmablit(dev, engine); - blitq->aborting = 1; - blitq->end = ticks + DRM_HZ; - } - - if (!blitq->is_active) { - if (blitq->num_outstanding) { - via_fire_dmablit(dev, blitq->blits[cur], engine); - blitq->is_active = 1; - blitq->cur = cur; - blitq->num_outstanding--; - blitq->end = ticks + DRM_HZ; - - if (!callout_pending(&blitq->poll_timer)) - callout_reset(&blitq->poll_timer, - 1, (timeout_t *)via_dmablit_timer, - (void *)blitq); - } else { - if (callout_pending(&blitq->poll_timer)) { - callout_stop(&blitq->poll_timer); - } - via_dmablit_engine_off(dev, engine); - } - } - - mtx_unlock(&blitq->blit_lock); -} - - -/* - * Check whether this blit is still active, performing necessary locking. - */ -static int -via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue) -{ - uint32_t slot; - int active; - - mtx_lock(&blitq->blit_lock); - - /* - * Allow for handle wraparounds. - */ - active = ((blitq->done_blit_handle - handle) > (1 << 23)) && - ((blitq->cur_blit_handle - handle) <= (1 << 23)); - - if (queue && active) { - slot = handle - blitq->done_blit_handle + blitq->cur -1; - if (slot >= VIA_NUM_BLIT_SLOTS) { - slot -= VIA_NUM_BLIT_SLOTS; - } - *queue = blitq->blit_queue + slot; - } - - mtx_unlock(&blitq->blit_lock); - - return active; -} - - -/* - * Sync. Wait for at least three seconds for the blit to be performed. - */ -static int -via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine) -{ - - drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; - drm_via_blitq_t *blitq = dev_priv->blit_queues + engine; - wait_queue_head_t *queue; - int ret = 0; - - if (via_dmablit_active(blitq, engine, handle, &queue)) { - DRM_WAIT_ON(ret, *queue, 3 * DRM_HZ, - !via_dmablit_active(blitq, engine, handle, NULL)); - } - DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n", - handle, engine, ret); - - return ret; -} - - -/* - * A timer that regularly polls the blit engine in cases where we don't have interrupts: - * a) Broken hardware (typically those that don't have any video capture facility). - * b) Blit abort. The hardware doesn't send an interrupt when a blit is aborted. - * The timer and hardware IRQ's can and do work in parallel. If the hardware has - * irqs, it will shorten the latency somewhat. - */ -static void -via_dmablit_timer(void *arg) -{ - drm_via_blitq_t *blitq = (drm_via_blitq_t *)arg; - struct drm_device *dev = blitq->dev; - int engine = (int) - (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues); - - DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine, - (unsigned long) jiffies); - - via_dmablit_handler(dev, engine, 0); - - if (!callout_pending(&blitq->poll_timer)) { - callout_schedule(&blitq->poll_timer, 1); - - /* - * Rerun handler to delete timer if engines are off, and - * to shorten abort latency. This is a little nasty. - */ - - via_dmablit_handler(dev, engine, 0); - - } -} - - -/* - * Workqueue task that frees data and mappings associated with a blit. - * Also wakes up waiting processes. Each of these tasks handles one - * blit engine only and may not be called on each interrupt. - */ -static void -via_dmablit_workqueue(void *arg, int pending) -{ - drm_via_blitq_t *blitq = (drm_via_blitq_t *)arg; - struct drm_device *dev = blitq->dev; - drm_via_sg_info_t *cur_sg; - int cur_released; - - - DRM_DEBUG("task called for blit engine %ld\n",(unsigned long) - (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues)); - - mtx_lock(&blitq->blit_lock); - - while(blitq->serviced != blitq->cur) { - - cur_released = blitq->serviced++; - - DRM_DEBUG("Releasing blit slot %d\n", cur_released); - - if (blitq->serviced >= VIA_NUM_BLIT_SLOTS) - blitq->serviced = 0; - - cur_sg = blitq->blits[cur_released]; - blitq->num_free++; - - mtx_unlock(&blitq->blit_lock); - - DRM_WAKEUP(&blitq->busy_queue); - - via_free_sg_info(cur_sg); - free(cur_sg, DRM_MEM_DRIVER); - - mtx_lock(&blitq->blit_lock); - } - - mtx_unlock(&blitq->blit_lock); -} - - -/* - * Init all blit engines. Currently we use two, but some hardware have 4. - */ -void -via_init_dmablit(struct drm_device *dev) -{ - int i,j; - drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; - drm_via_blitq_t *blitq; - - for (i=0; i< VIA_NUM_BLIT_ENGINES; ++i) { - blitq = dev_priv->blit_queues + i; - blitq->dev = dev; - blitq->cur_blit_handle = 0; - blitq->done_blit_handle = 0; - blitq->head = 0; - blitq->cur = 0; - blitq->serviced = 0; - blitq->num_free = VIA_NUM_BLIT_SLOTS - 1; - blitq->num_outstanding = 0; - blitq->is_active = 0; - blitq->aborting = 0; - mtx_init(&blitq->blit_lock, "via_blit_lk", NULL, MTX_DEF); - for (j=0; j<VIA_NUM_BLIT_SLOTS; ++j) { - DRM_INIT_WAITQUEUE(blitq->blit_queue + j); - } - DRM_INIT_WAITQUEUE(&blitq->busy_queue); - TASK_INIT(&blitq->wq, 0, via_dmablit_workqueue, blitq); - callout_init(&blitq->poll_timer, 0); - } -} - - -/* - * Build all info and do all mappings required for a blit. - */ -static int -via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, - drm_via_dmablit_t *xfer) -{ - int ret = 0; - - vsg->bounce_buffer = NULL; - - vsg->state = dr_via_sg_init; - - if (xfer->num_lines <= 0 || xfer->line_length <= 0) { - DRM_ERROR("Zero size bitblt.\n"); - return -EINVAL; - } - - /* - * Below check is a driver limitation, not a hardware one. We - * don't want to lock unused pages, and don't want to incoporate the - * extra logic of avoiding them. Make sure there are no. - * (Not a big limitation anyway.) - */ - if ((xfer->mem_stride - xfer->line_length) > 2 * PAGE_SIZE) { - DRM_ERROR("Too large system memory stride. Stride: %d, " - "Length: %d\n", xfer->mem_stride, xfer->line_length); - return -EINVAL; - } - - if ((xfer->mem_stride == xfer->line_length) && - (xfer->fb_stride == xfer->line_length)) { - xfer->mem_stride *= xfer->num_lines; - xfer->line_length = xfer->mem_stride; - xfer->fb_stride = xfer->mem_stride; - xfer->num_lines = 1; - } - - /* - * Don't lock an arbitrary large number of pages, since that causes a - * DOS security hole. - */ - if (xfer->num_lines > 2048 || - (xfer->num_lines*xfer->mem_stride > (2048*2048*4))) { - DRM_ERROR("Too large PCI DMA bitblt.\n"); - return -EINVAL; - } - - /* - * we allow a negative fb stride to allow flipping of images in - * transfer. - */ - if (xfer->mem_stride < xfer->line_length || - abs(xfer->fb_stride) < xfer->line_length) { - DRM_ERROR("Invalid frame-buffer / memory stride.\n"); - return -EINVAL; - } - - /* - * A hardware bug seems to be worked around if system memory addresses - * start on 16 byte boundaries. This seems a bit restrictive however. - * VIA is contacted about this. Meanwhile, impose the following - * restrictions: - */ -#ifdef VIA_BUGFREE - if ((((unsigned long)xfer->mem_addr & 3) != - ((unsigned long)xfer->fb_addr & 3)) || - ((xfer->num_lines > 1) && ((xfer->mem_stride & 3) != - (xfer->fb_stride & 3)))) { - DRM_ERROR("Invalid DRM bitblt alignment.\n"); - return -EINVAL; - } -#else - if ((((unsigned long)xfer->mem_addr & 15) || - ((unsigned long)xfer->fb_addr & 3)) || - ((xfer->num_lines > 1) && - ((xfer->mem_stride & 15) || (xfer->fb_stride & 3)))) { - DRM_ERROR("Invalid DRM bitblt alignment.\n"); - return -EINVAL; - } -#endif - - if (0 != (ret = via_lock_all_dma_pages(vsg, xfer))) { - DRM_ERROR("Could not lock DMA pages.\n"); - via_free_sg_info(vsg); - return ret; - } - - via_map_blit_for_device(xfer, vsg, 0); - if (0 != (ret = via_alloc_desc_pages(vsg))) { - DRM_ERROR("Could not allocate DMA descriptor pages.\n"); - via_free_sg_info(vsg); - return ret; - } - via_map_blit_for_device(xfer, vsg, 1); - - return 0; -} - - -/* - * Reserve one free slot in the blit queue. Will wait for one second for one - * to become available. Otherwise -EBUSY is returned. - */ -static int -via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine) -{ - struct drm_device *dev = blitq->dev; - int ret=0; - - DRM_DEBUG("Num free is %d\n", blitq->num_free); - mtx_lock(&blitq->blit_lock); - while(blitq->num_free == 0) { - mtx_unlock(&blitq->blit_lock); - - DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, - blitq->num_free > 0); - if (ret) { - return (-EINTR == ret) ? -EAGAIN : ret; - } - - mtx_lock(&blitq->blit_lock); - } - - blitq->num_free--; - mtx_unlock(&blitq->blit_lock); - - return 0; -} - - -/* - * Hand back a free slot if we changed our mind. - */ -static void -via_dmablit_release_slot(drm_via_blitq_t *blitq) -{ - - mtx_lock(&blitq->blit_lock); - blitq->num_free++; - mtx_unlock(&blitq->blit_lock); - DRM_WAKEUP( &blitq->busy_queue ); -} - - -/* - * Grab a free slot. Build blit info and queue a blit. - */ -static int -via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; - drm_via_sg_info_t *vsg; - drm_via_blitq_t *blitq; - int ret; - int engine; - - if (dev_priv == NULL) { - DRM_ERROR("Called without initialization.\n"); - return -EINVAL; - } - - engine = (xfer->to_fb) ? 0 : 1; - blitq = dev_priv->blit_queues + engine; - if (0 != (ret = via_dmablit_grab_slot(blitq, engine))) { - return ret; - } - if (NULL == (vsg = malloc(sizeof(*vsg), DRM_MEM_DRIVER, - M_NOWAIT | M_ZERO))) { - via_dmablit_release_slot(blitq); - return -ENOMEM; - } - if (0 != (ret = via_build_sg_info(dev, vsg, xfer))) { - via_dmablit_release_slot(blitq); - free(vsg, DRM_MEM_DRIVER); - return ret; - } - mtx_lock(&blitq->blit_lock); - - blitq->blits[blitq->head++] = vsg; - if (blitq->head >= VIA_NUM_BLIT_SLOTS) - blitq->head = 0; - blitq->num_outstanding++; - xfer->sync.sync_handle = ++blitq->cur_blit_handle; - - mtx_unlock(&blitq->blit_lock); - xfer->sync.engine = engine; - - via_dmablit_handler(dev, engine, 0); - - return 0; -} - - -/* - * Sync on a previously submitted blit. Note that the X server use signals - * extensively, and that there is a very big probability that this IOCTL will - * be interrupted by a signal. In that case it returns with -EAGAIN for the - * signal to be delivered. The caller should then reissue the IOCTL. This is - * similar to what is being done for drmGetLock(). - */ -int -via_dma_blit_sync( struct drm_device *dev, void *data, - struct drm_file *file_priv ) -{ - drm_via_blitsync_t *sync = data; - int err; - - if (sync->engine >= VIA_NUM_BLIT_ENGINES) - return -EINVAL; - - err = via_dmablit_sync(dev, sync->sync_handle, sync->engine); - - if (-EINTR == err) - err = -EAGAIN; - - return err; -} - - -/* - * Queue a blit and hand back a handle to be used for sync. This IOCTL may be - * interrupted by a signal while waiting for a free slot in the blit queue. - * In that case it returns with -EAGAIN and should be reissued. See the above - * IOCTL code. - */ -int -via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv ) -{ - drm_via_dmablit_t *xfer = data; - int err; - - err = via_dmablit(dev, xfer); - - return err; -} diff --git a/sys/dev/drm/via_dmablit.h b/sys/dev/drm/via_dmablit.h deleted file mode 100644 index c5463cbf0679..000000000000 --- a/sys/dev/drm/via_dmablit.h +++ /dev/null @@ -1,140 +0,0 @@ -/* via_dmablit.h -- PCI DMA BitBlt support for the VIA Unichrome/Pro - * - * Copyright 2005 Thomas Hellstrom. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Thomas Hellstrom. - * Register info from Digeo Inc. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef _VIA_DMABLIT_H -#define _VIA_DMABLIT_H - -#define VIA_NUM_BLIT_ENGINES 2 -#define VIA_NUM_BLIT_SLOTS 8 - -struct _drm_via_descriptor; - -typedef struct _drm_via_sg_info { - vm_page_t *pages; - unsigned long num_pages; - struct _drm_via_descriptor **desc_pages; - int num_desc_pages; - int num_desc; - unsigned char *bounce_buffer; - dma_addr_t chain_start; - uint32_t free_on_sequence; - unsigned int descriptors_per_page; - int aborted; - enum { - dr_via_device_mapped, - dr_via_desc_pages_alloc, - dr_via_pages_locked, - dr_via_pages_alloc, - dr_via_sg_init - } state; -} drm_via_sg_info_t; - -typedef struct _drm_via_blitq { - struct drm_device *dev; - uint32_t cur_blit_handle; - uint32_t done_blit_handle; - unsigned serviced; - unsigned head; - unsigned cur; - unsigned num_free; - unsigned num_outstanding; - unsigned long end; - int aborting; - int is_active; - drm_via_sg_info_t *blits[VIA_NUM_BLIT_SLOTS]; - struct mtx blit_lock; - wait_queue_head_t blit_queue[VIA_NUM_BLIT_SLOTS]; - wait_queue_head_t busy_queue; - struct task wq; - struct callout poll_timer; -} drm_via_blitq_t; - - -/* - * PCI DMA Registers - * Channels 2 & 3 don't seem to be implemented in hardware. - */ - -#define VIA_PCI_DMA_MAR0 0xE40 /* Memory Address Register of Channel 0 */ -#define VIA_PCI_DMA_DAR0 0xE44 /* Device Address Register of Channel 0 */ -#define VIA_PCI_DMA_BCR0 0xE48 /* Byte Count Register of Channel 0 */ -#define VIA_PCI_DMA_DPR0 0xE4C /* Descriptor Pointer Register of Channel 0 */ - -#define VIA_PCI_DMA_MAR1 0xE50 /* Memory Address Register of Channel 1 */ -#define VIA_PCI_DMA_DAR1 0xE54 /* Device Address Register of Channel 1 */ -#define VIA_PCI_DMA_BCR1 0xE58 /* Byte Count Register of Channel 1 */ -#define VIA_PCI_DMA_DPR1 0xE5C /* Descriptor Pointer Register of Channel 1 */ - -#define VIA_PCI_DMA_MAR2 0xE60 /* Memory Address Register of Channel 2 */ -#define VIA_PCI_DMA_DAR2 0xE64 /* Device Address Register of Channel 2 */ -#define VIA_PCI_DMA_BCR2 0xE68 /* Byte Count Register of Channel 2 */ -#define VIA_PCI_DMA_DPR2 0xE6C /* Descriptor Pointer Register of Channel 2 */ - -#define VIA_PCI_DMA_MAR3 0xE70 /* Memory Address Register of Channel 3 */ -#define VIA_PCI_DMA_DAR3 0xE74 /* Device Address Register of Channel 3 */ -#define VIA_PCI_DMA_BCR3 0xE78 /* Byte Count Register of Channel 3 */ -#define VIA_PCI_DMA_DPR3 0xE7C /* Descriptor Pointer Register of Channel 3 */ - -#define VIA_PCI_DMA_MR0 0xE80 /* Mode Register of Channel 0 */ -#define VIA_PCI_DMA_MR1 0xE84 /* Mode Register of Channel 1 */ -#define VIA_PCI_DMA_MR2 0xE88 /* Mode Register of Channel 2 */ -#define VIA_PCI_DMA_MR3 0xE8C /* Mode Register of Channel 3 */ - -#define VIA_PCI_DMA_CSR0 0xE90 /* Command/Status Register of Channel 0 */ -#define VIA_PCI_DMA_CSR1 0xE94 /* Command/Status Register of Channel 1 */ -#define VIA_PCI_DMA_CSR2 0xE98 /* Command/Status Register of Channel 2 */ -#define VIA_PCI_DMA_CSR3 0xE9C /* Command/Status Register of Channel 3 */ - -#define VIA_PCI_DMA_PTR 0xEA0 /* Priority Type Register */ - -/* Define for DMA engine */ -/* DPR */ -#define VIA_DMA_DPR_EC (1<<1) /* end of chain */ -#define VIA_DMA_DPR_DDIE (1<<2) /* descriptor done interrupt enable */ -#define VIA_DMA_DPR_DT (1<<3) /* direction of transfer (RO) */ - -/* MR */ -#define VIA_DMA_MR_CM (1<<0) /* chaining mode */ -#define VIA_DMA_MR_TDIE (1<<1) /* transfer done interrupt enable */ -#define VIA_DMA_MR_HENDMACMD (1<<7) /* ? */ - -/* CSR */ -#define VIA_DMA_CSR_DE (1<<0) /* DMA enable */ -#define VIA_DMA_CSR_TS (1<<1) /* transfer start */ -#define VIA_DMA_CSR_TA (1<<2) /* transfer abort */ -#define VIA_DMA_CSR_TD (1<<3) /* transfer done */ -#define VIA_DMA_CSR_DD (1<<4) /* descriptor done */ -#define VIA_DMA_DPR_EC (1<<1) /* end of chain */ - - - -#endif diff --git a/sys/dev/drm/via_drm.h b/sys/dev/drm/via_drm.h deleted file mode 100644 index 2f40cabd9918..000000000000 --- a/sys/dev/drm/via_drm.h +++ /dev/null @@ -1,279 +0,0 @@ -/*- - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef _VIA_DRM_H_ -#define _VIA_DRM_H_ - -/* WARNING: These defines must be the same as what the Xserver uses. - * if you change them, you must change the defines in the Xserver. - */ - -#ifndef _VIA_DEFINES_ -#define _VIA_DEFINES_ - -#if !defined(__KERNEL__) && !defined(_KERNEL) -#include "via_drmclient.h" -#endif - -#define VIA_NR_SAREA_CLIPRECTS 8 -#define VIA_NR_XVMC_PORTS 10 -#define VIA_NR_XVMC_LOCKS 5 -#define VIA_MAX_CACHELINE_SIZE 64 -#define XVMCLOCKPTR(saPriv,lockNo) \ - ((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \ - (VIA_MAX_CACHELINE_SIZE - 1)) & \ - ~(VIA_MAX_CACHELINE_SIZE - 1)) + \ - VIA_MAX_CACHELINE_SIZE*(lockNo))) - -/* Each region is a minimum of 64k, and there are at most 64 of them. - */ -#define VIA_NR_TEX_REGIONS 64 -#define VIA_LOG_MIN_TEX_REGION_SIZE 16 -#endif - -#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ -#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ -#define VIA_UPLOAD_CTX 0x4 -#define VIA_UPLOAD_BUFFERS 0x8 -#define VIA_UPLOAD_TEX0 0x10 -#define VIA_UPLOAD_TEX1 0x20 -#define VIA_UPLOAD_CLIPRECTS 0x40 -#define VIA_UPLOAD_ALL 0xff - -/* VIA specific ioctls */ -#define DRM_VIA_ALLOCMEM 0x00 -#define DRM_VIA_FREEMEM 0x01 -#define DRM_VIA_AGP_INIT 0x02 -#define DRM_VIA_FB_INIT 0x03 -#define DRM_VIA_MAP_INIT 0x04 -#define DRM_VIA_DEC_FUTEX 0x05 -#define NOT_USED -#define DRM_VIA_DMA_INIT 0x07 -#define DRM_VIA_CMDBUFFER 0x08 -#define DRM_VIA_FLUSH 0x09 -#define DRM_VIA_PCICMD 0x0a -#define DRM_VIA_CMDBUF_SIZE 0x0b -#define NOT_USED -#define DRM_VIA_WAIT_IRQ 0x0d -#define DRM_VIA_DMA_BLIT 0x0e -#define DRM_VIA_BLIT_SYNC 0x0f - -#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t) -#define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t) -#define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t) -#define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t) -#define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t) -#define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t) -#define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t) -#define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t) -#define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH) -#define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t) -#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \ - drm_via_cmdbuf_size_t) -#define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t) -#define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t) -#define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t) - -/* Indices into buf.Setup where various bits of state are mirrored per - * context and per buffer. These can be fired at the card as a unit, - * or in a piecewise fashion as required. - */ - -#define VIA_TEX_SETUP_SIZE 8 - -/* Flags for clear ioctl - */ -#define VIA_FRONT 0x1 -#define VIA_BACK 0x2 -#define VIA_DEPTH 0x4 -#define VIA_STENCIL 0x8 -#define VIA_MEM_VIDEO 0 /* matches drm constant */ -#define VIA_MEM_AGP 1 /* matches drm constant */ -#define VIA_MEM_SYSTEM 2 -#define VIA_MEM_MIXED 3 -#define VIA_MEM_UNKNOWN 4 - -typedef struct { - u32 offset; - u32 size; -} drm_via_agp_t; - -typedef struct { - u32 offset; - u32 size; -} drm_via_fb_t; - -typedef struct { - u32 context; - u32 type; - u32 size; - unsigned long index; - unsigned long offset; -} drm_via_mem_t; - -typedef struct _drm_via_init { - enum { - VIA_INIT_MAP = 0x01, - VIA_CLEANUP_MAP = 0x02 - } func; - - unsigned long sarea_priv_offset; - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long agpAddr; -} drm_via_init_t; - -typedef struct _drm_via_futex { - enum { - VIA_FUTEX_WAIT = 0x00, - VIA_FUTEX_WAKE = 0X01 - } func; - u32 ms; - u32 lock; - u32 val; -} drm_via_futex_t; - -typedef struct _drm_via_dma_init { - enum { - VIA_INIT_DMA = 0x01, - VIA_CLEANUP_DMA = 0x02, - VIA_DMA_INITIALIZED = 0x03 - } func; - - unsigned long offset; - unsigned long size; - unsigned long reg_pause_addr; -} drm_via_dma_init_t; - -typedef struct _drm_via_cmdbuffer { - char __user *buf; - unsigned long size; -} drm_via_cmdbuffer_t; - -/* Warning: If you change the SAREA structure you must change the Xserver - * structure as well */ - -typedef struct _drm_via_tex_region { - unsigned char next, prev; /* indices to form a circular LRU */ - unsigned char inUse; /* owned by a client, or free? */ - int age; /* tracked by clients to update local LRU's */ -} drm_via_tex_region_t; - -typedef struct _drm_via_sarea { - unsigned int dirty; - unsigned int nbox; - struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS]; - drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1]; - int texAge; /* last time texture was uploaded */ - int ctxOwner; /* last context to upload state */ - int vertexPrim; - - /* - * Below is for XvMC. - * We want the lock integers alone on, and aligned to, a cache line. - * Therefore this somewhat strange construct. - */ - - char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)]; - - unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS]; - unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS]; - unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */ - - /* Used by the 3d driver only at this point, for pageflipping: - */ - unsigned int pfCurrentOffset; -} drm_via_sarea_t; - -typedef struct _drm_via_cmdbuf_size { - enum { - VIA_CMDBUF_SPACE = 0x01, - VIA_CMDBUF_LAG = 0x02 - } func; - int wait; - u32 size; -} drm_via_cmdbuf_size_t; - -typedef enum { - VIA_IRQ_ABSOLUTE = 0x0, - VIA_IRQ_RELATIVE = 0x1, - VIA_IRQ_SIGNAL = 0x10000000, - VIA_IRQ_FORCE_SEQUENCE = 0x20000000 -} via_irq_seq_type_t; - -#define VIA_IRQ_FLAGS_MASK 0xF0000000 - -enum drm_via_irqs { - drm_via_irq_hqv0 = 0, - drm_via_irq_hqv1, - drm_via_irq_dma0_dd, - drm_via_irq_dma0_td, - drm_via_irq_dma1_dd, - drm_via_irq_dma1_td, - drm_via_irq_num -}; - -struct drm_via_wait_irq_request { - unsigned irq; - via_irq_seq_type_t type; - u32 sequence; - u32 signal; -}; - -typedef union drm_via_irqwait { - struct drm_via_wait_irq_request request; - struct drm_wait_vblank_reply reply; -} drm_via_irqwait_t; - -typedef struct drm_via_blitsync { - u32 sync_handle; - unsigned engine; -} drm_via_blitsync_t; - -/* - * Below,"flags" is currently unused but will be used for possible future - * extensions like kernel space bounce buffers for bad alignments and - * blit engine busy-wait polling for better latency in the absence of - * interrupts. - */ - -typedef struct drm_via_dmablit { - u32 num_lines; - u32 line_length; - - u32 fb_addr; - u32 fb_stride; - - unsigned char *mem_addr; - u32 mem_stride; - - u32 flags; - int to_fb; - - drm_via_blitsync_t sync; -} drm_via_dmablit_t; - -#endif /* _VIA_DRM_H_ */ diff --git a/sys/dev/drm/via_drv.c b/sys/dev/drm/via_drv.c deleted file mode 100644 index 520518d5d7a1..000000000000 --- a/sys/dev/drm/via_drv.c +++ /dev/null @@ -1,123 +0,0 @@ -/* via_drv.c -- VIA unichrome driver -*- linux-c -*- - * Created: Fri Aug 12 2005 by anholt@FreeBSD.org - */ -/*- - * Copyright 2005 Eric Anholt - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <anholt@FreeBSD.org> - * - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/via_drm.h" -#include "dev/drm/via_drv.h" -#include "dev/drm/drm_pciids.h" - -/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */ -static drm_pci_id_list_t via_pciidlist[] = { - viadrv_PCI_IDS -}; - -static void via_configure(struct drm_device *dev) -{ - dev->driver->driver_features = - DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ; - - dev->driver->buf_priv_size = sizeof(drm_via_private_t); - dev->driver->load = via_driver_load; - dev->driver->unload = via_driver_unload; - dev->driver->lastclose = via_lastclose; - dev->driver->get_vblank_counter = via_get_vblank_counter; - dev->driver->enable_vblank = via_enable_vblank; - dev->driver->disable_vblank = via_disable_vblank; - dev->driver->irq_preinstall = via_driver_irq_preinstall; - dev->driver->irq_postinstall = via_driver_irq_postinstall; - dev->driver->irq_uninstall = via_driver_irq_uninstall; - dev->driver->irq_handler = via_driver_irq_handler; - dev->driver->dma_quiescent = via_driver_dma_quiescent; - - dev->driver->ioctls = via_ioctls; - dev->driver->max_ioctl = via_max_ioctl; - - dev->driver->name = DRIVER_NAME; - dev->driver->desc = DRIVER_DESC; - dev->driver->date = DRIVER_DATE; - dev->driver->major = DRIVER_MAJOR; - dev->driver->minor = DRIVER_MINOR; - dev->driver->patchlevel = DRIVER_PATCHLEVEL; -} - -static int -via_probe(device_t kdev) -{ - return drm_probe(kdev, via_pciidlist); -} - -static int -via_attach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - - dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER, - M_WAITOK | M_ZERO); - - via_configure(dev); - - return drm_attach(kdev, via_pciidlist); -} - -static int -via_detach(device_t kdev) -{ - struct drm_device *dev = device_get_softc(kdev); - int ret; - - ret = drm_detach(kdev); - - free(dev->driver, DRM_MEM_DRIVER); - - return ret; -} - -static device_method_t via_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, via_probe), - DEVMETHOD(device_attach, via_attach), - DEVMETHOD(device_detach, via_detach), - - { 0, 0 } -}; - -static driver_t via_driver = { - "drm", - via_methods, - sizeof(struct drm_device) -}; - -extern devclass_t drm_devclass; -DRIVER_MODULE(via, vgapci, via_driver, drm_devclass, 0, 0); -MODULE_DEPEND(via, drm, 1, 1, 1); diff --git a/sys/dev/drm/via_drv.h b/sys/dev/drm/via_drv.h deleted file mode 100644 index 3b692f13a5e0..000000000000 --- a/sys/dev/drm/via_drv.h +++ /dev/null @@ -1,161 +0,0 @@ -/*- - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef _VIA_DRV_H_ -#define _VIA_DRV_H_ - -#include "dev/drm/drm_sman.h" -#define DRIVER_AUTHOR "Various" - -#define DRIVER_NAME "via" -#define DRIVER_DESC "VIA Unichrome / Pro" -#define DRIVER_DATE "20070202" - -#define DRIVER_MAJOR 2 -#define DRIVER_MINOR 11 -#define DRIVER_PATCHLEVEL 1 - -#include "dev/drm/via_verifier.h" - -#include "dev/drm/via_dmablit.h" - -#define VIA_PCI_BUF_SIZE 60000 -#define VIA_FIRE_BUF_SIZE 1024 -#define VIA_NUM_IRQS 4 - -typedef struct drm_via_ring_buffer { - drm_local_map_t map; - char *virtual_start; -} drm_via_ring_buffer_t; - -typedef uint32_t maskarray_t[5]; - -typedef struct drm_via_irq { - atomic_t irq_received; - uint32_t pending_mask; - uint32_t enable_mask; - wait_queue_head_t irq_queue; -} drm_via_irq_t; - -typedef struct drm_via_private { - drm_via_sarea_t *sarea_priv; - drm_local_map_t *sarea; - drm_local_map_t *fb; - drm_local_map_t *mmio; - unsigned long agpAddr; - wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS]; - char *dma_ptr; - unsigned int dma_low; - unsigned int dma_high; - unsigned int dma_offset; - uint32_t dma_wrap; - volatile uint32_t *last_pause_ptr; - volatile uint32_t *hw_addr_ptr; - drm_via_ring_buffer_t ring; - struct timeval last_vblank; - int last_vblank_valid; - unsigned usec_per_vblank; - atomic_t vbl_received; - drm_via_state_t hc_state; - char pci_buf[VIA_PCI_BUF_SIZE]; - const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE]; - uint32_t num_fire_offsets; - int chipset; - drm_via_irq_t via_irqs[VIA_NUM_IRQS]; - unsigned num_irqs; - maskarray_t *irq_masks; - uint32_t irq_enable_mask; - uint32_t irq_pending_mask; - int *irq_map; - unsigned int idle_fault; - struct drm_sman sman; - int vram_initialized; - int agp_initialized; - unsigned long vram_offset; - unsigned long agp_offset; - drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES]; - uint32_t dma_diff; -} drm_via_private_t; - -enum via_family { - VIA_OTHER = 0, /* Baseline */ - VIA_PRO_GROUP_A, /* Another video engine and DMA commands */ - VIA_DX9_0 /* Same video as pro_group_a, but 3D is unsupported */ -}; - -/* VIA MMIO register access */ -#define VIA_BASE ((dev_priv->mmio)) - -#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg) -#define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val) -#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg) -#define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val) - -extern struct drm_ioctl_desc via_ioctls[]; -extern int via_max_ioctl; - -extern int via_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int via_mem_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int via_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv ); -extern int via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv ); - -extern int via_driver_load(struct drm_device *dev, unsigned long chipset); -extern int via_driver_unload(struct drm_device *dev); - -extern int via_init_context(struct drm_device * dev, int context); -extern int via_final_context(struct drm_device * dev, int context); - -extern int via_do_cleanup_map(struct drm_device * dev); -extern u32 via_get_vblank_counter(struct drm_device *dev, int crtc); -extern int via_enable_vblank(struct drm_device *dev, int crtc); -extern void via_disable_vblank(struct drm_device *dev, int crtc); - -extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS); -extern void via_driver_irq_preinstall(struct drm_device * dev); -extern int via_driver_irq_postinstall(struct drm_device *dev); -extern void via_driver_irq_uninstall(struct drm_device * dev); - -extern int via_dma_cleanup(struct drm_device * dev); -extern void via_init_command_verifier(void); -extern int via_driver_dma_quiescent(struct drm_device * dev); -extern void via_init_futex(drm_via_private_t *dev_priv); -extern void via_cleanup_futex(drm_via_private_t *dev_priv); -extern void via_release_futex(drm_via_private_t *dev_priv, int context); - -extern void via_reclaim_buffers_locked(struct drm_device *dev, - struct drm_file *file_priv); -extern void via_lastclose(struct drm_device *dev); - -extern void via_dmablit_handler(struct drm_device *dev, int engine, int from_irq); -extern void via_init_dmablit(struct drm_device *dev); - -#endif diff --git a/sys/dev/drm/via_irq.c b/sys/dev/drm/via_irq.c deleted file mode 100644 index 0ebda4064143..000000000000 --- a/sys/dev/drm/via_irq.c +++ /dev/null @@ -1,392 +0,0 @@ -/* via_irq.c - * - * Copyright 2004 BEAM Ltd. - * Copyright 2002 Tungsten Graphics, Inc. - * Copyright 2005 Thomas Hellstrom. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Terry Barnaby <terry1@beam.ltd.uk> - * Keith Whitwell <keith@tungstengraphics.com> - * Thomas Hellstrom <unichrome@shipmail.org> - * - * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank - * interrupt, as well as an infrastructure to handle other interrupts of the chip. - * The refresh rate is also calculated for video playback sync purposes. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/via_drm.h" -#include "dev/drm/via_drv.h" - -#define VIA_REG_INTERRUPT 0x200 - -/* VIA_REG_INTERRUPT */ -#define VIA_IRQ_GLOBAL (1U << 31) -#define VIA_IRQ_VBLANK_ENABLE (1 << 19) -#define VIA_IRQ_VBLANK_PENDING (1 << 3) -#define VIA_IRQ_HQV0_ENABLE (1 << 11) -#define VIA_IRQ_HQV1_ENABLE (1 << 25) -#define VIA_IRQ_HQV0_PENDING (1 << 9) -#define VIA_IRQ_HQV1_PENDING (1 << 10) -#define VIA_IRQ_DMA0_DD_ENABLE (1 << 20) -#define VIA_IRQ_DMA0_TD_ENABLE (1 << 21) -#define VIA_IRQ_DMA1_DD_ENABLE (1 << 22) -#define VIA_IRQ_DMA1_TD_ENABLE (1 << 23) -#define VIA_IRQ_DMA0_DD_PENDING (1 << 4) -#define VIA_IRQ_DMA0_TD_PENDING (1 << 5) -#define VIA_IRQ_DMA1_DD_PENDING (1 << 6) -#define VIA_IRQ_DMA1_TD_PENDING (1 << 7) - - -/* - * Device-specific IRQs go here. This type might need to be extended with - * the register if there are multiple IRQ control registers. - * Currently we activate the HQV interrupts of Unichrome Pro group A. - */ - -static maskarray_t via_pro_group_a_irqs[] = { - {VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010, - 0x00000000 }, - {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010, - 0x00000000 }, - {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0, - VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, - {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1, - VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, -}; -static int via_num_pro_group_a = DRM_ARRAY_SIZE(via_pro_group_a_irqs); -static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3}; - -static maskarray_t via_unichrome_irqs[] = { - {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0, - VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, - {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1, - VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008} -}; -static int via_num_unichrome = DRM_ARRAY_SIZE(via_unichrome_irqs); -static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1}; - - -static unsigned time_diff(struct timeval *now, struct timeval *then) -{ - return (now->tv_usec >= then->tv_usec) ? - now->tv_usec - then->tv_usec : - 1000000 - (then->tv_usec - now->tv_usec); -} - -u32 via_get_vblank_counter(struct drm_device *dev, int crtc) -{ - drm_via_private_t *dev_priv = dev->dev_private; - if (crtc != 0) - return 0; - - return atomic_read(&dev_priv->vbl_received); -} - -irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS) -{ - struct drm_device *dev = (struct drm_device *) arg; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - u32 status; - int handled = 0; - struct timeval cur_vblank; - drm_via_irq_t *cur_irq = dev_priv->via_irqs; - int i; - - status = VIA_READ(VIA_REG_INTERRUPT); - if (status & VIA_IRQ_VBLANK_PENDING) { - atomic_inc(&dev_priv->vbl_received); - if (!(atomic_read(&dev_priv->vbl_received) & 0x0F)) { - microtime(&cur_vblank); - if (dev_priv->last_vblank_valid) { - dev_priv->usec_per_vblank = - time_diff(&cur_vblank, - &dev_priv->last_vblank) >> 4; - } - dev_priv->last_vblank = cur_vblank; - dev_priv->last_vblank_valid = 1; - } - if (!(atomic_read(&dev_priv->vbl_received) & 0xFF)) { - DRM_DEBUG("US per vblank is: %u\n", - dev_priv->usec_per_vblank); - } - drm_handle_vblank(dev, 0); - handled = 1; - } - - for (i = 0; i < dev_priv->num_irqs; ++i) { - if (status & cur_irq->pending_mask) { - atomic_inc(&cur_irq->irq_received); - DRM_WAKEUP(&cur_irq->irq_queue); - handled = 1; - if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) { - via_dmablit_handler(dev, 0, 1); - } else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i) { - via_dmablit_handler(dev, 1, 1); - } - } - cur_irq++; - } - - /* Acknowlege interrupts */ - VIA_WRITE(VIA_REG_INTERRUPT, status); - - - if (handled) - return IRQ_HANDLED; - else - return IRQ_NONE; -} - -static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv) -{ - u32 status; - - if (dev_priv) { - /* Acknowlege interrupts */ - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status | - dev_priv->irq_pending_mask); - } -} - -int via_enable_vblank(struct drm_device *dev, int crtc) -{ - drm_via_private_t *dev_priv = dev->dev_private; - u32 status; - - if (crtc != 0) { - DRM_ERROR("%s: bad crtc %d\n", __func__, crtc); - return -EINVAL; - } - - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status & VIA_IRQ_VBLANK_ENABLE); - - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); - - return 0; -} - -void via_disable_vblank(struct drm_device *dev, int crtc) -{ - drm_via_private_t *dev_priv = dev->dev_private; - - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30); - - if (crtc != 0) - DRM_ERROR("%s: bad crtc %d\n", __func__, crtc); -} - -static int -via_driver_irq_wait(struct drm_device * dev, unsigned int irq, int force_sequence, - unsigned int *sequence) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - unsigned int cur_irq_sequence; - drm_via_irq_t *cur_irq; - int ret = 0; - maskarray_t *masks; - int real_irq; - - DRM_DEBUG("\n"); - - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } - - if (irq >= drm_via_irq_num) { - DRM_ERROR("Trying to wait on unknown irq %d\n", irq); - return -EINVAL; - } - - real_irq = dev_priv->irq_map[irq]; - - if (real_irq < 0) { - DRM_ERROR("Video IRQ %d not available on this hardware.\n", - irq); - return -EINVAL; - } - - masks = dev_priv->irq_masks; - cur_irq = dev_priv->via_irqs + real_irq; - - if (masks[real_irq][2] && !force_sequence) { - DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, - ((VIA_READ(masks[irq][2]) & masks[irq][3]) == - masks[irq][4])); - cur_irq_sequence = atomic_read(&cur_irq->irq_received); - } else { - DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, - (((cur_irq_sequence = - atomic_read(&cur_irq->irq_received)) - - *sequence) <= (1 << 23))); - } - *sequence = cur_irq_sequence; - return ret; -} - - -/* - * drm_dma.h hooks - */ - -void via_driver_irq_preinstall(struct drm_device * dev) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - u32 status; - drm_via_irq_t *cur_irq; - int i; - - DRM_DEBUG("dev_priv: %p\n", dev_priv); - if (dev_priv) { - cur_irq = dev_priv->via_irqs; - - dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE; - dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING; - - if (dev_priv->chipset == VIA_PRO_GROUP_A || - dev_priv->chipset == VIA_DX9_0) { - dev_priv->irq_masks = via_pro_group_a_irqs; - dev_priv->num_irqs = via_num_pro_group_a; - dev_priv->irq_map = via_irqmap_pro_group_a; - } else { - dev_priv->irq_masks = via_unichrome_irqs; - dev_priv->num_irqs = via_num_unichrome; - dev_priv->irq_map = via_irqmap_unichrome; - } - - for (i = 0; i < dev_priv->num_irqs; ++i) { - atomic_set(&cur_irq->irq_received, 0); - cur_irq->enable_mask = dev_priv->irq_masks[i][0]; - cur_irq->pending_mask = dev_priv->irq_masks[i][1]; - DRM_INIT_WAITQUEUE(&cur_irq->irq_queue); - dev_priv->irq_enable_mask |= cur_irq->enable_mask; - dev_priv->irq_pending_mask |= cur_irq->pending_mask; - cur_irq++; - - DRM_DEBUG("Initializing IRQ %d\n", i); - } - - dev_priv->last_vblank_valid = 0; - - /* Clear VSync interrupt regs */ - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status & - ~(dev_priv->irq_enable_mask)); - - /* Clear bits if they're already high */ - viadrv_acknowledge_irqs(dev_priv); - } -} - -int via_driver_irq_postinstall(struct drm_device *dev) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - u32 status; - - DRM_DEBUG("via_driver_irq_postinstall\n"); - if (!dev_priv) - return -EINVAL; - - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL - | dev_priv->irq_enable_mask); - - /* Some magic, oh for some data sheets ! */ - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); - - return 0; -} - -void via_driver_irq_uninstall(struct drm_device * dev) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - u32 status; - - DRM_DEBUG("\n"); - if (dev_priv) { - - /* Some more magic, oh for some data sheets ! */ - - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30); - - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status & - ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask)); - } -} - -int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_via_irqwait_t *irqwait = data; - struct timeval now; - int ret = 0; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - drm_via_irq_t *cur_irq = dev_priv->via_irqs; - int force_sequence; - - if (irqwait->request.irq >= dev_priv->num_irqs) { - DRM_ERROR("Trying to wait on unknown irq %d\n", - irqwait->request.irq); - return -EINVAL; - } - - cur_irq += irqwait->request.irq; - - switch (irqwait->request.type & ~VIA_IRQ_FLAGS_MASK) { - case VIA_IRQ_RELATIVE: - irqwait->request.sequence += - atomic_read(&cur_irq->irq_received); - irqwait->request.type &= ~_DRM_VBLANK_RELATIVE; - case VIA_IRQ_ABSOLUTE: - break; - default: - return -EINVAL; - } - - if (irqwait->request.type & VIA_IRQ_SIGNAL) { - DRM_ERROR("Signals on Via IRQs not implemented yet.\n"); - return -EINVAL; - } - - force_sequence = (irqwait->request.type & VIA_IRQ_FORCE_SEQUENCE); - - ret = via_driver_irq_wait(dev, irqwait->request.irq, force_sequence, - &irqwait->request.sequence); - microtime(&now); - irqwait->reply.tval_sec = now.tv_sec; - irqwait->reply.tval_usec = now.tv_usec; - - return ret; -} diff --git a/sys/dev/drm/via_map.c b/sys/dev/drm/via_map.c deleted file mode 100644 index 687b8be80135..000000000000 --- a/sys/dev/drm/via_map.c +++ /dev/null @@ -1,137 +0,0 @@ -/*- - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/via_drm.h" -#include "dev/drm/via_drv.h" - -static int via_do_init_map(struct drm_device * dev, drm_via_init_t * init) -{ - drm_via_private_t *dev_priv = dev->dev_private; - - DRM_DEBUG("\n"); - - dev_priv->sarea = drm_getsarea(dev); - if (!dev_priv->sarea) { - DRM_ERROR("could not find sarea!\n"); - dev->dev_private = (void *)dev_priv; - via_do_cleanup_map(dev); - return -EINVAL; - } - - dev_priv->fb = drm_core_findmap(dev, init->fb_offset); - if (!dev_priv->fb) { - DRM_ERROR("could not find framebuffer!\n"); - dev->dev_private = (void *)dev_priv; - via_do_cleanup_map(dev); - return -EINVAL; - } - dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset); - if (!dev_priv->mmio) { - DRM_ERROR("could not find mmio region!\n"); - dev->dev_private = (void *)dev_priv; - via_do_cleanup_map(dev); - return -EINVAL; - } - - dev_priv->sarea_priv = - (drm_via_sarea_t *) ((u8 *) dev_priv->sarea->virtual + - init->sarea_priv_offset); - - dev_priv->agpAddr = init->agpAddr; - - via_init_futex(dev_priv); - - via_init_dmablit(dev); - - dev->dev_private = (void *)dev_priv; - return 0; -} - -int via_do_cleanup_map(struct drm_device * dev) -{ - via_dma_cleanup(dev); - - return 0; -} - -int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_via_init_t *init = data; - - DRM_DEBUG("\n"); - - switch (init->func) { - case VIA_INIT_MAP: - return via_do_init_map(dev, init); - case VIA_CLEANUP_MAP: - return via_do_cleanup_map(dev); - } - - return -EINVAL; -} - -int via_driver_load(struct drm_device *dev, unsigned long chipset) -{ - drm_via_private_t *dev_priv; - int ret = 0; - - dev_priv = drm_alloc(sizeof(drm_via_private_t), DRM_MEM_DRIVER); - if (dev_priv == NULL) - return -ENOMEM; - - dev->dev_private = (void *)dev_priv; - - dev_priv->chipset = chipset; - - ret = drm_sman_init(&dev_priv->sman, 2, 12, 8); - if (ret) { - drm_free(dev_priv, sizeof(drm_via_private_t), DRM_MEM_DRIVER); - return ret; - } - - ret = drm_vblank_init(dev, 1); - if (ret) { - drm_sman_takedown(&dev_priv->sman); - drm_free(dev_priv, sizeof(drm_via_private_t), DRM_MEM_DRIVER); - return ret; - } - - return 0; -} - -int via_driver_unload(struct drm_device *dev) -{ - drm_via_private_t *dev_priv = dev->dev_private; - - drm_sman_takedown(&dev_priv->sman); - - drm_free(dev_priv, sizeof(drm_via_private_t), DRM_MEM_DRIVER); - dev->dev_private = NULL; - - return 0; -} diff --git a/sys/dev/drm/via_mm.c b/sys/dev/drm/via_mm.c deleted file mode 100644 index 6dc185ba1259..000000000000 --- a/sys/dev/drm/via_mm.c +++ /dev/null @@ -1,180 +0,0 @@ -/*- - * Copyright 2006 Tungsten Graphics Inc., Bismarck, ND., USA. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/* - * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com> - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/via_drm.h" -#include "dev/drm/via_drv.h" -#include "dev/drm/drm_sman.h" - -#define VIA_MM_ALIGN_SHIFT 4 -#define VIA_MM_ALIGN_MASK ( (1 << VIA_MM_ALIGN_SHIFT) - 1) - -int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_via_agp_t *agp = data; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - int ret; - - ret = drm_sman_set_range(&dev_priv->sman, VIA_MEM_AGP, 0, - agp->size >> VIA_MM_ALIGN_SHIFT); - if (ret) { - DRM_ERROR("AGP memory manager initialisation error\n"); - return ret; - } - - dev_priv->agp_initialized = 1; - dev_priv->agp_offset = agp->offset; - - DRM_DEBUG("offset = %u, size = %u\n", agp->offset, agp->size); - return 0; -} - -int via_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_via_fb_t *fb = data; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - int ret; - - ret = drm_sman_set_range(&dev_priv->sman, VIA_MEM_VIDEO, 0, - fb->size >> VIA_MM_ALIGN_SHIFT); - if (ret) { - DRM_ERROR("VRAM memory manager initialisation error\n"); - return ret; - } - - dev_priv->vram_initialized = 1; - dev_priv->vram_offset = fb->offset; - - DRM_DEBUG("offset = %u, size = %u\n", fb->offset, fb->size); - - return 0; - -} - -int via_final_context(struct drm_device *dev, int context) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - - via_release_futex(dev_priv, context); - -#ifdef __linux__ - /* Linux specific until context tracking code gets ported to BSD */ - /* Last context, perform cleanup */ - if (dev->ctx_count == 1 && dev->dev_private) { - DRM_DEBUG("Last Context\n"); - drm_irq_uninstall(dev); - via_cleanup_futex(dev_priv); - via_do_cleanup_map(dev); - } -#endif - return 1; -} - -void via_lastclose(struct drm_device *dev) -{ - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - - if (!dev_priv) - return; - - drm_sman_cleanup(&dev_priv->sman); - dev_priv->vram_initialized = 0; - dev_priv->agp_initialized = 0; -} - -int via_mem_alloc(struct drm_device *dev, void *data, - struct drm_file *file_priv) -{ - drm_via_mem_t *mem = data; - int retval = 0; - struct drm_memblock_item *item; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - unsigned long tmpSize; - - if (mem->type > VIA_MEM_AGP) { - DRM_ERROR("Unknown memory type allocation\n"); - return -EINVAL; - } - if (0 == ((mem->type == VIA_MEM_VIDEO) ? dev_priv->vram_initialized : - dev_priv->agp_initialized)) { - DRM_ERROR - ("Attempt to allocate from uninitialized memory manager.\n"); - return -EINVAL; - } - - tmpSize = (mem->size + VIA_MM_ALIGN_MASK) >> VIA_MM_ALIGN_SHIFT; - item = drm_sman_alloc(&dev_priv->sman, mem->type, tmpSize, 0, - (unsigned long)file_priv); - if (item) { - mem->offset = ((mem->type == VIA_MEM_VIDEO) ? - dev_priv->vram_offset : dev_priv->agp_offset) + - (item->mm-> - offset(item->mm, item->mm_info) << VIA_MM_ALIGN_SHIFT); - mem->index = item->user_hash.key; - } else { - mem->offset = 0; - mem->size = 0; - mem->index = 0; - DRM_DEBUG("Video memory allocation failed\n"); - retval = -ENOMEM; - } - - return retval; -} - -int via_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_via_private_t *dev_priv = dev->dev_private; - drm_via_mem_t *mem = data; - int ret; - - ret = drm_sman_free_key(&dev_priv->sman, mem->index); - DRM_DEBUG("free = 0x%lx\n", mem->index); - - return ret; -} - - -void via_reclaim_buffers_locked(struct drm_device * dev, - struct drm_file *file_priv) -{ - drm_via_private_t *dev_priv = dev->dev_private; - - if (drm_sman_owner_clean(&dev_priv->sman, (unsigned long)file_priv)) - return; - - if (dev->driver->dma_quiescent) - dev->driver->dma_quiescent(dev); - - drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv); - - return; -} diff --git a/sys/dev/drm/via_verifier.c b/sys/dev/drm/via_verifier.c deleted file mode 100644 index 7169e64fe403..000000000000 --- a/sys/dev/drm/via_verifier.c +++ /dev/null @@ -1,1115 +0,0 @@ -/*- - * Copyright 2004 The Unichrome Project. All Rights Reserved. - * Copyright 2005 Thomas Hellstrom. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S), AND/OR THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Author: Thomas Hellstrom 2004, 2005. - * This code was written using docs obtained under NDA from VIA Inc. - * - * Don't run this code directly on an AGP buffer. Due to cache problems it will - * be very slow. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/via_3d_reg.h" -#include "dev/drm/drmP.h" -#include "dev/drm/drm.h" -#include "dev/drm/via_drm.h" -#include "dev/drm/via_verifier.h" -#include "dev/drm/via_drv.h" - -typedef enum { - state_command, - state_header2, - state_header1, - state_vheader5, - state_vheader6, - state_error -} verifier_state_t; - -typedef enum { - no_check = 0, - check_for_header2, - check_for_header1, - check_for_header2_err, - check_for_header1_err, - check_for_fire, - check_z_buffer_addr0, - check_z_buffer_addr1, - check_z_buffer_addr_mode, - check_destination_addr0, - check_destination_addr1, - check_destination_addr_mode, - check_for_dummy, - check_for_dd, - check_texture_addr0, - check_texture_addr1, - check_texture_addr2, - check_texture_addr3, - check_texture_addr4, - check_texture_addr5, - check_texture_addr6, - check_texture_addr7, - check_texture_addr8, - check_texture_addr_mode, - check_for_vertex_count, - check_number_texunits, - forbidden_command -} hazard_t; - -/* - * Associates each hazard above with a possible multi-command - * sequence. For example an address that is split over multiple - * commands and that needs to be checked at the first command - * that does not include any part of the address. - */ - -static drm_via_sequence_t seqs[] = { - no_sequence, - no_sequence, - no_sequence, - no_sequence, - no_sequence, - no_sequence, - z_address, - z_address, - z_address, - dest_address, - dest_address, - dest_address, - no_sequence, - no_sequence, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - tex_address, - no_sequence -}; - -typedef struct { - unsigned int code; - hazard_t hz; -} hz_init_t; - -static hz_init_t init_table1[] = { - {0xf2, check_for_header2_err}, - {0xf0, check_for_header1_err}, - {0xee, check_for_fire}, - {0xcc, check_for_dummy}, - {0xdd, check_for_dd}, - {0x00, no_check}, - {0x10, check_z_buffer_addr0}, - {0x11, check_z_buffer_addr1}, - {0x12, check_z_buffer_addr_mode}, - {0x13, no_check}, - {0x14, no_check}, - {0x15, no_check}, - {0x23, no_check}, - {0x24, no_check}, - {0x33, no_check}, - {0x34, no_check}, - {0x35, no_check}, - {0x36, no_check}, - {0x37, no_check}, - {0x38, no_check}, - {0x39, no_check}, - {0x3A, no_check}, - {0x3B, no_check}, - {0x3C, no_check}, - {0x3D, no_check}, - {0x3E, no_check}, - {0x40, check_destination_addr0}, - {0x41, check_destination_addr1}, - {0x42, check_destination_addr_mode}, - {0x43, no_check}, - {0x44, no_check}, - {0x50, no_check}, - {0x51, no_check}, - {0x52, no_check}, - {0x53, no_check}, - {0x54, no_check}, - {0x55, no_check}, - {0x56, no_check}, - {0x57, no_check}, - {0x58, no_check}, - {0x70, no_check}, - {0x71, no_check}, - {0x78, no_check}, - {0x79, no_check}, - {0x7A, no_check}, - {0x7B, no_check}, - {0x7C, no_check}, - {0x7D, check_for_vertex_count} -}; - -static hz_init_t init_table2[] = { - {0xf2, check_for_header2_err}, - {0xf0, check_for_header1_err}, - {0xee, check_for_fire}, - {0xcc, check_for_dummy}, - {0x00, check_texture_addr0}, - {0x01, check_texture_addr0}, - {0x02, check_texture_addr0}, - {0x03, check_texture_addr0}, - {0x04, check_texture_addr0}, - {0x05, check_texture_addr0}, - {0x06, check_texture_addr0}, - {0x07, check_texture_addr0}, - {0x08, check_texture_addr0}, - {0x09, check_texture_addr0}, - {0x20, check_texture_addr1}, - {0x21, check_texture_addr1}, - {0x22, check_texture_addr1}, - {0x23, check_texture_addr4}, - {0x2B, check_texture_addr3}, - {0x2C, check_texture_addr3}, - {0x2D, check_texture_addr3}, - {0x2E, check_texture_addr3}, - {0x2F, check_texture_addr3}, - {0x30, check_texture_addr3}, - {0x31, check_texture_addr3}, - {0x32, check_texture_addr3}, - {0x33, check_texture_addr3}, - {0x34, check_texture_addr3}, - {0x4B, check_texture_addr5}, - {0x4C, check_texture_addr6}, - {0x51, check_texture_addr7}, - {0x52, check_texture_addr8}, - {0x77, check_texture_addr2}, - {0x78, no_check}, - {0x79, no_check}, - {0x7A, no_check}, - {0x7B, check_texture_addr_mode}, - {0x7C, no_check}, - {0x7D, no_check}, - {0x7E, no_check}, - {0x7F, no_check}, - {0x80, no_check}, - {0x81, no_check}, - {0x82, no_check}, - {0x83, no_check}, - {0x85, no_check}, - {0x86, no_check}, - {0x87, no_check}, - {0x88, no_check}, - {0x89, no_check}, - {0x8A, no_check}, - {0x90, no_check}, - {0x91, no_check}, - {0x92, no_check}, - {0x93, no_check} -}; - -static hz_init_t init_table3[] = { - {0xf2, check_for_header2_err}, - {0xf0, check_for_header1_err}, - {0xcc, check_for_dummy}, - {0x00, check_number_texunits} -}; - -static hazard_t table1[256]; -static hazard_t table2[256]; -static hazard_t table3[256]; - -static __inline__ int -eat_words(const uint32_t ** buf, const uint32_t * buf_end, unsigned num_words) -{ - if ((buf_end - *buf) >= num_words) { - *buf += num_words; - return 0; - } - DRM_ERROR("Illegal termination of DMA command buffer\n"); - return 1; -} - -/* - * Partially stolen from drm_memory.h - */ - -static __inline__ drm_local_map_t *via_drm_lookup_agp_map(drm_via_state_t *seq, - unsigned long offset, - unsigned long size, - struct drm_device * dev) -{ - drm_local_map_t *map = seq->map_cache; - - if (map && map->offset <= offset - && (offset + size) <= (map->offset + map->size)) { - return map; - } - - TAILQ_FOREACH(map, &dev->maplist, link) { - if (map->offset <= offset - && (offset + size) <= (map->offset + map->size) - && !(map->flags & _DRM_RESTRICTED) - && (map->type == _DRM_AGP)) { - seq->map_cache = map; - return map; - } - } - return NULL; -} - -/* - * Require that all AGP texture levels reside in the same AGP map which should - * be mappable by the client. This is not a big restriction. - * FIXME: To actually enforce this security policy strictly, drm_rmmap - * would have to wait for dma quiescent before removing an AGP map. - * The via_drm_lookup_agp_map call in reality seems to take - * very little CPU time. - */ - -static __inline__ int finish_current_sequence(drm_via_state_t * cur_seq) -{ - switch (cur_seq->unfinished) { - case z_address: - DRM_DEBUG("Z Buffer start address is 0x%x\n", cur_seq->z_addr); - break; - case dest_address: - DRM_DEBUG("Destination start address is 0x%x\n", - cur_seq->d_addr); - break; - case tex_address: - if (cur_seq->agp_texture) { - unsigned start = - cur_seq->tex_level_lo[cur_seq->texture]; - unsigned end = cur_seq->tex_level_hi[cur_seq->texture]; - unsigned long lo = ~0, hi = 0, tmp; - uint32_t *addr, *pitch, *height, tex; - unsigned i; - int npot; - - if (end > 9) - end = 9; - if (start > 9) - start = 9; - - addr = - &(cur_seq->t_addr[tex = cur_seq->texture][start]); - pitch = &(cur_seq->pitch[tex][start]); - height = &(cur_seq->height[tex][start]); - npot = cur_seq->tex_npot[tex]; - for (i = start; i <= end; ++i) { - tmp = *addr++; - if (tmp < lo) - lo = tmp; - if (i == 0 && npot) - tmp += (*height++ * *pitch++); - else - tmp += (*height++ << *pitch++); - if (tmp > hi) - hi = tmp; - } - - if (!via_drm_lookup_agp_map - (cur_seq, lo, hi - lo, cur_seq->dev)) { - DRM_ERROR - ("AGP texture is not in allowed map\n"); - return 2; - } - } - break; - default: - break; - } - cur_seq->unfinished = no_sequence; - return 0; -} - -static __inline__ int -investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t * cur_seq) -{ - register uint32_t tmp, *tmp_addr; - - if (cur_seq->unfinished && (cur_seq->unfinished != seqs[hz])) { - int ret; - if ((ret = finish_current_sequence(cur_seq))) - return ret; - } - - switch (hz) { - case check_for_header2: - if (cmd == HALCYON_HEADER2) - return 1; - return 0; - case check_for_header1: - if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) - return 1; - return 0; - case check_for_header2_err: - if (cmd == HALCYON_HEADER2) - return 1; - DRM_ERROR("Illegal DMA HALCYON_HEADER2 command\n"); - break; - case check_for_header1_err: - if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) - return 1; - DRM_ERROR("Illegal DMA HALCYON_HEADER1 command\n"); - break; - case check_for_fire: - if ((cmd & HALCYON_FIREMASK) == HALCYON_FIRECMD) - return 1; - DRM_ERROR("Illegal DMA HALCYON_FIRECMD command\n"); - break; - case check_for_dummy: - if (HC_DUMMY == cmd) - return 0; - DRM_ERROR("Illegal DMA HC_DUMMY command\n"); - break; - case check_for_dd: - if (0xdddddddd == cmd) - return 0; - DRM_ERROR("Illegal DMA 0xdddddddd command\n"); - break; - case check_z_buffer_addr0: - cur_seq->unfinished = z_address; - cur_seq->z_addr = (cur_seq->z_addr & 0xFF000000) | - (cmd & 0x00FFFFFF); - return 0; - case check_z_buffer_addr1: - cur_seq->unfinished = z_address; - cur_seq->z_addr = (cur_seq->z_addr & 0x00FFFFFF) | - ((cmd & 0xFF) << 24); - return 0; - case check_z_buffer_addr_mode: - cur_seq->unfinished = z_address; - if ((cmd & 0x0000C000) == 0) - return 0; - DRM_ERROR("Attempt to place Z buffer in system memory\n"); - return 2; - case check_destination_addr0: - cur_seq->unfinished = dest_address; - cur_seq->d_addr = (cur_seq->d_addr & 0xFF000000) | - (cmd & 0x00FFFFFF); - return 0; - case check_destination_addr1: - cur_seq->unfinished = dest_address; - cur_seq->d_addr = (cur_seq->d_addr & 0x00FFFFFF) | - ((cmd & 0xFF) << 24); - return 0; - case check_destination_addr_mode: - cur_seq->unfinished = dest_address; - if ((cmd & 0x0000C000) == 0) - return 0; - DRM_ERROR - ("Attempt to place 3D drawing buffer in system memory\n"); - return 2; - case check_texture_addr0: - cur_seq->unfinished = tex_address; - tmp = (cmd >> 24); - tmp_addr = &cur_seq->t_addr[cur_seq->texture][tmp]; - *tmp_addr = (*tmp_addr & 0xFF000000) | (cmd & 0x00FFFFFF); - return 0; - case check_texture_addr1: - cur_seq->unfinished = tex_address; - tmp = ((cmd >> 24) - 0x20); - tmp += tmp << 1; - tmp_addr = &cur_seq->t_addr[cur_seq->texture][tmp]; - *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF) << 24); - tmp_addr++; - *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF00) << 16); - tmp_addr++; - *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF0000) << 8); - return 0; - case check_texture_addr2: - cur_seq->unfinished = tex_address; - cur_seq->tex_level_lo[tmp = cur_seq->texture] = cmd & 0x3F; - cur_seq->tex_level_hi[tmp] = (cmd & 0xFC0) >> 6; - return 0; - case check_texture_addr3: - cur_seq->unfinished = tex_address; - tmp = ((cmd >> 24) - HC_SubA_HTXnL0Pit); - if (tmp == 0 && - (cmd & HC_HTXnEnPit_MASK)) { - cur_seq->pitch[cur_seq->texture][tmp] = - (cmd & HC_HTXnLnPit_MASK); - cur_seq->tex_npot[cur_seq->texture] = 1; - } else { - cur_seq->pitch[cur_seq->texture][tmp] = - (cmd & HC_HTXnLnPitE_MASK) >> HC_HTXnLnPitE_SHIFT; - cur_seq->tex_npot[cur_seq->texture] = 0; - if (cmd & 0x000FFFFF) { - DRM_ERROR - ("Unimplemented texture level 0 pitch mode.\n"); - return 2; - } - } - return 0; - case check_texture_addr4: - cur_seq->unfinished = tex_address; - tmp_addr = &cur_seq->t_addr[cur_seq->texture][9]; - *tmp_addr = (*tmp_addr & 0x00FFFFFF) | ((cmd & 0xFF) << 24); - return 0; - case check_texture_addr5: - case check_texture_addr6: - cur_seq->unfinished = tex_address; - /* - * Texture width. We don't care since we have the pitch. - */ - return 0; - case check_texture_addr7: - cur_seq->unfinished = tex_address; - tmp_addr = &(cur_seq->height[cur_seq->texture][0]); - tmp_addr[5] = 1 << ((cmd & 0x00F00000) >> 20); - tmp_addr[4] = 1 << ((cmd & 0x000F0000) >> 16); - tmp_addr[3] = 1 << ((cmd & 0x0000F000) >> 12); - tmp_addr[2] = 1 << ((cmd & 0x00000F00) >> 8); - tmp_addr[1] = 1 << ((cmd & 0x000000F0) >> 4); - tmp_addr[0] = 1 << (cmd & 0x0000000F); - return 0; - case check_texture_addr8: - cur_seq->unfinished = tex_address; - tmp_addr = &(cur_seq->height[cur_seq->texture][0]); - tmp_addr[9] = 1 << ((cmd & 0x0000F000) >> 12); - tmp_addr[8] = 1 << ((cmd & 0x00000F00) >> 8); - tmp_addr[7] = 1 << ((cmd & 0x000000F0) >> 4); - tmp_addr[6] = 1 << (cmd & 0x0000000F); - return 0; - case check_texture_addr_mode: - cur_seq->unfinished = tex_address; - if (2 == (tmp = cmd & 0x00000003)) { - DRM_ERROR - ("Attempt to fetch texture from system memory.\n"); - return 2; - } - cur_seq->agp_texture = (tmp == 3); - cur_seq->tex_palette_size[cur_seq->texture] = - (cmd >> 16) & 0x000000007; - return 0; - case check_for_vertex_count: - cur_seq->vertex_count = cmd & 0x0000FFFF; - return 0; - case check_number_texunits: - cur_seq->multitex = (cmd >> 3) & 1; - return 0; - default: - DRM_ERROR("Illegal DMA data: 0x%x\n", cmd); - return 2; - } - return 2; -} - -static __inline__ int -via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end, - drm_via_state_t * cur_seq) -{ - drm_via_private_t *dev_priv = - (drm_via_private_t *) cur_seq->dev->dev_private; - uint32_t a_fire, bcmd, dw_count; - int ret = 0; - int have_fire; - const uint32_t *buf = *buffer; - - while (buf < buf_end) { - have_fire = 0; - if ((buf_end - buf) < 2) { - DRM_ERROR - ("Unexpected termination of primitive list.\n"); - ret = 1; - break; - } - if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdB) - break; - bcmd = *buf++; - if ((*buf & HC_ACMD_MASK) != HC_ACMD_HCmdA) { - DRM_ERROR("Expected Vertex List A command, got 0x%x\n", - *buf); - ret = 1; - break; - } - a_fire = - *buf++ | HC_HPLEND_MASK | HC_HPMValidN_MASK | - HC_HE3Fire_MASK; - - /* - * How many dwords per vertex ? - */ - - if (cur_seq->agp && ((bcmd & (0xF << 11)) == 0)) { - DRM_ERROR("Illegal B command vertex data for AGP.\n"); - ret = 1; - break; - } - - dw_count = 0; - if (bcmd & (1 << 7)) - dw_count += (cur_seq->multitex) ? 2 : 1; - if (bcmd & (1 << 8)) - dw_count += (cur_seq->multitex) ? 2 : 1; - if (bcmd & (1 << 9)) - dw_count++; - if (bcmd & (1 << 10)) - dw_count++; - if (bcmd & (1 << 11)) - dw_count++; - if (bcmd & (1 << 12)) - dw_count++; - if (bcmd & (1 << 13)) - dw_count++; - if (bcmd & (1 << 14)) - dw_count++; - - while (buf < buf_end) { - if (*buf == a_fire) { - if (dev_priv->num_fire_offsets >= - VIA_FIRE_BUF_SIZE) { - DRM_ERROR("Fire offset buffer full.\n"); - ret = 1; - break; - } - dev_priv->fire_offsets[dev_priv-> - num_fire_offsets++] = - buf; - have_fire = 1; - buf++; - if (buf < buf_end && *buf == a_fire) - buf++; - break; - } - if ((*buf == HALCYON_HEADER2) || - ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD)) { - DRM_ERROR("Missing Vertex Fire command, " - "Stray Vertex Fire command or verifier " - "lost sync.\n"); - ret = 1; - break; - } - if ((ret = eat_words(&buf, buf_end, dw_count))) - break; - } - if (buf >= buf_end && !have_fire) { - DRM_ERROR("Missing Vertex Fire command or verifier " - "lost sync.\n"); - ret = 1; - break; - } - if (cur_seq->agp && ((buf - cur_seq->buf_start) & 0x01)) { - DRM_ERROR("AGP Primitive list end misaligned.\n"); - ret = 1; - break; - } - } - *buffer = buf; - return ret; -} - -static __inline__ verifier_state_t -via_check_header2(uint32_t const **buffer, const uint32_t * buf_end, - drm_via_state_t * hc_state) -{ - uint32_t cmd; - int hz_mode; - hazard_t hz; - const uint32_t *buf = *buffer; - const hazard_t *hz_table; - - if ((buf_end - buf) < 2) { - DRM_ERROR - ("Illegal termination of DMA HALCYON_HEADER2 sequence.\n"); - return state_error; - } - buf++; - cmd = (*buf++ & 0xFFFF0000) >> 16; - - switch (cmd) { - case HC_ParaType_CmdVdata: - if (via_check_prim_list(&buf, buf_end, hc_state)) - return state_error; - *buffer = buf; - return state_command; - case HC_ParaType_NotTex: - hz_table = table1; - break; - case HC_ParaType_Tex: - hc_state->texture = 0; - hz_table = table2; - break; - case (HC_ParaType_Tex | (HC_SubType_Tex1 << 8)): - hc_state->texture = 1; - hz_table = table2; - break; - case (HC_ParaType_Tex | (HC_SubType_TexGeneral << 8)): - hz_table = table3; - break; - case HC_ParaType_Auto: - if (eat_words(&buf, buf_end, 2)) - return state_error; - *buffer = buf; - return state_command; - case (HC_ParaType_Palette | (HC_SubType_Stipple << 8)): - if (eat_words(&buf, buf_end, 32)) - return state_error; - *buffer = buf; - return state_command; - case (HC_ParaType_Palette | (HC_SubType_TexPalette0 << 8)): - case (HC_ParaType_Palette | (HC_SubType_TexPalette1 << 8)): - DRM_ERROR("Texture palettes are rejected because of " - "lack of info how to determine their size.\n"); - return state_error; - case (HC_ParaType_Palette | (HC_SubType_FogTable << 8)): - DRM_ERROR("Fog factor palettes are rejected because of " - "lack of info how to determine their size.\n"); - return state_error; - default: - - /* - * There are some unimplemented HC_ParaTypes here, that - * need to be implemented if the Mesa driver is extended. - */ - - DRM_ERROR("Invalid or unimplemented HALCYON_HEADER2 " - "DMA subcommand: 0x%x. Previous dword: 0x%x\n", - cmd, *(buf - 2)); - *buffer = buf; - return state_error; - } - - while (buf < buf_end) { - cmd = *buf++; - if ((hz = hz_table[cmd >> 24])) { - if ((hz_mode = investigate_hazard(cmd, hz, hc_state))) { - if (hz_mode == 1) { - buf--; - break; - } - return state_error; - } - } else if (hc_state->unfinished && - finish_current_sequence(hc_state)) { - return state_error; - } - } - if (hc_state->unfinished && finish_current_sequence(hc_state)) { - return state_error; - } - *buffer = buf; - return state_command; -} - -static __inline__ verifier_state_t -via_parse_header2(drm_via_private_t * dev_priv, uint32_t const **buffer, - const uint32_t * buf_end, int *fire_count) -{ - uint32_t cmd; - const uint32_t *buf = *buffer; - const uint32_t *next_fire; - int burst = 0; - - next_fire = dev_priv->fire_offsets[*fire_count]; - buf++; - cmd = (*buf & 0xFFFF0000) >> 16; - VIA_WRITE(HC_REG_TRANS_SET + HC_REG_BASE, *buf++); - switch (cmd) { - case HC_ParaType_CmdVdata: - while ((buf < buf_end) && - (*fire_count < dev_priv->num_fire_offsets) && - (*buf & HC_ACMD_MASK) == HC_ACMD_HCmdB) { - while (buf <= next_fire) { - VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + - (burst & 63), *buf++); - burst += 4; - } - if ((buf < buf_end) - && ((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD)) - buf++; - - if (++(*fire_count) < dev_priv->num_fire_offsets) - next_fire = dev_priv->fire_offsets[*fire_count]; - } - break; - default: - while (buf < buf_end) { - - if (*buf == HC_HEADER2 || - (*buf & HALCYON_HEADER1MASK) == HALCYON_HEADER1 || - (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5 || - (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6) - break; - - VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + - (burst & 63), *buf++); - burst += 4; - } - } - *buffer = buf; - return state_command; -} - -static __inline__ int verify_mmio_address(uint32_t address) -{ - if ((address > 0x3FF) && (address < 0xC00)) { - DRM_ERROR("Invalid VIDEO DMA command. " - "Attempt to access 3D- or command burst area.\n"); - return 1; - } else if ((address > 0xCFF) && (address < 0x1300)) { - DRM_ERROR("Invalid VIDEO DMA command. " - "Attempt to access PCI DMA area.\n"); - return 1; - } else if (address > 0x13FF) { - DRM_ERROR("Invalid VIDEO DMA command. " - "Attempt to access VGA registers.\n"); - return 1; - } - return 0; -} - -static __inline__ int -verify_video_tail(uint32_t const **buffer, const uint32_t * buf_end, - uint32_t dwords) -{ - const uint32_t *buf = *buffer; - - if (buf_end - buf < dwords) { - DRM_ERROR("Illegal termination of video command.\n"); - return 1; - } - while (dwords--) { - if (*buf++) { - DRM_ERROR("Illegal video command tail.\n"); - return 1; - } - } - *buffer = buf; - return 0; -} - -static __inline__ verifier_state_t -via_check_header1(uint32_t const **buffer, const uint32_t * buf_end) -{ - uint32_t cmd; - const uint32_t *buf = *buffer; - verifier_state_t ret = state_command; - - while (buf < buf_end) { - cmd = *buf; - if ((cmd > ((0x3FF >> 2) | HALCYON_HEADER1)) && - (cmd < ((0xC00 >> 2) | HALCYON_HEADER1))) { - if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) - break; - DRM_ERROR("Invalid HALCYON_HEADER1 command. " - "Attempt to access 3D- or command burst area.\n"); - ret = state_error; - break; - } else if (cmd > ((0xCFF >> 2) | HALCYON_HEADER1)) { - if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) - break; - DRM_ERROR("Invalid HALCYON_HEADER1 command. " - "Attempt to access VGA registers.\n"); - ret = state_error; - break; - } else { - buf += 2; - } - } - *buffer = buf; - return ret; -} - -static __inline__ verifier_state_t -via_parse_header1(drm_via_private_t * dev_priv, uint32_t const **buffer, - const uint32_t * buf_end) -{ - register uint32_t cmd; - const uint32_t *buf = *buffer; - - while (buf < buf_end) { - cmd = *buf; - if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) - break; - VIA_WRITE((cmd & ~HALCYON_HEADER1MASK) << 2, *++buf); - buf++; - } - *buffer = buf; - return state_command; -} - -static __inline__ verifier_state_t -via_check_vheader5(uint32_t const **buffer, const uint32_t * buf_end) -{ - uint32_t data; - const uint32_t *buf = *buffer; - - if (buf_end - buf < 4) { - DRM_ERROR("Illegal termination of video header5 command\n"); - return state_error; - } - - data = *buf++ & ~VIA_VIDEOMASK; - if (verify_mmio_address(data)) - return state_error; - - data = *buf++; - if (*buf++ != 0x00F50000) { - DRM_ERROR("Illegal header5 header data\n"); - return state_error; - } - if (*buf++ != 0x00000000) { - DRM_ERROR("Illegal header5 header data\n"); - return state_error; - } - if (eat_words(&buf, buf_end, data)) - return state_error; - if ((data & 3) && verify_video_tail(&buf, buf_end, 4 - (data & 3))) - return state_error; - *buffer = buf; - return state_command; - -} - -static __inline__ verifier_state_t -via_parse_vheader5(drm_via_private_t * dev_priv, uint32_t const **buffer, - const uint32_t * buf_end) -{ - uint32_t addr, count, i; - const uint32_t *buf = *buffer; - - addr = *buf++ & ~VIA_VIDEOMASK; - i = count = *buf; - buf += 3; - while (i--) { - VIA_WRITE(addr, *buf++); - } - if (count & 3) - buf += 4 - (count & 3); - *buffer = buf; - return state_command; -} - -static __inline__ verifier_state_t -via_check_vheader6(uint32_t const **buffer, const uint32_t * buf_end) -{ - uint32_t data; - const uint32_t *buf = *buffer; - uint32_t i; - - if (buf_end - buf < 4) { - DRM_ERROR("Illegal termination of video header6 command\n"); - return state_error; - } - buf++; - data = *buf++; - if (*buf++ != 0x00F60000) { - DRM_ERROR("Illegal header6 header data\n"); - return state_error; - } - if (*buf++ != 0x00000000) { - DRM_ERROR("Illegal header6 header data\n"); - return state_error; - } - if ((buf_end - buf) < (data << 1)) { - DRM_ERROR("Illegal termination of video header6 command\n"); - return state_error; - } - for (i = 0; i < data; ++i) { - if (verify_mmio_address(*buf++)) - return state_error; - buf++; - } - data <<= 1; - if ((data & 3) && verify_video_tail(&buf, buf_end, 4 - (data & 3))) - return state_error; - *buffer = buf; - return state_command; -} - -static __inline__ verifier_state_t -via_parse_vheader6(drm_via_private_t * dev_priv, uint32_t const **buffer, - const uint32_t * buf_end) -{ - - uint32_t addr, count, i; - const uint32_t *buf = *buffer; - - i = count = *++buf; - buf += 3; - while (i--) { - addr = *buf++; - VIA_WRITE(addr, *buf++); - } - count <<= 1; - if (count & 3) - buf += 4 - (count & 3); - *buffer = buf; - return state_command; -} - -int -via_verify_command_stream(const uint32_t * buf, unsigned int size, - struct drm_device * dev, int agp) -{ - - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - drm_via_state_t *hc_state = &dev_priv->hc_state; - drm_via_state_t saved_state = *hc_state; - uint32_t cmd; - const uint32_t *buf_end = buf + (size >> 2); - verifier_state_t state = state_command; - int cme_video; - int supported_3d; - - cme_video = (dev_priv->chipset == VIA_PRO_GROUP_A || - dev_priv->chipset == VIA_DX9_0); - - supported_3d = dev_priv->chipset != VIA_DX9_0; - - hc_state->dev = dev; - hc_state->unfinished = no_sequence; - hc_state->map_cache = NULL; - hc_state->agp = agp; - hc_state->buf_start = buf; - dev_priv->num_fire_offsets = 0; - - while (buf < buf_end) { - - switch (state) { - case state_header2: - state = via_check_header2(&buf, buf_end, hc_state); - break; - case state_header1: - state = via_check_header1(&buf, buf_end); - break; - case state_vheader5: - state = via_check_vheader5(&buf, buf_end); - break; - case state_vheader6: - state = via_check_vheader6(&buf, buf_end); - break; - case state_command: - if ((HALCYON_HEADER2 == (cmd = *buf)) && - supported_3d) - state = state_header2; - else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) - state = state_header1; - else if (cme_video - && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5) - state = state_vheader5; - else if (cme_video - && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6) - state = state_vheader6; - else if ((cmd == HALCYON_HEADER2) && !supported_3d) { - DRM_ERROR("Accelerated 3D is not supported on this chipset yet.\n"); - state = state_error; - } else { - DRM_ERROR - ("Invalid / Unimplemented DMA HEADER command. 0x%x\n", - cmd); - state = state_error; - } - break; - case state_error: - default: - *hc_state = saved_state; - return -EINVAL; - } - } - if (state == state_error) { - *hc_state = saved_state; - return -EINVAL; - } - return 0; -} - -int -via_parse_command_stream(struct drm_device * dev, const uint32_t * buf, - unsigned int size) -{ - - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - uint32_t cmd; - const uint32_t *buf_end = buf + (size >> 2); - verifier_state_t state = state_command; - int fire_count = 0; - - while (buf < buf_end) { - - switch (state) { - case state_header2: - state = - via_parse_header2(dev_priv, &buf, buf_end, - &fire_count); - break; - case state_header1: - state = via_parse_header1(dev_priv, &buf, buf_end); - break; - case state_vheader5: - state = via_parse_vheader5(dev_priv, &buf, buf_end); - break; - case state_vheader6: - state = via_parse_vheader6(dev_priv, &buf, buf_end); - break; - case state_command: - if (HALCYON_HEADER2 == (cmd = *buf)) - state = state_header2; - else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) - state = state_header1; - else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5) - state = state_vheader5; - else if ((cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6) - state = state_vheader6; - else { - DRM_ERROR - ("Invalid / Unimplemented DMA HEADER command. 0x%x\n", - cmd); - state = state_error; - } - break; - case state_error: - default: - return -EINVAL; - } - } - if (state == state_error) { - return -EINVAL; - } - return 0; -} - -static void -setup_hazard_table(hz_init_t init_table[], hazard_t table[], int size) -{ - int i; - - for (i = 0; i < 256; ++i) { - table[i] = forbidden_command; - } - - for (i = 0; i < size; ++i) { - table[init_table[i].code] = init_table[i].hz; - } -} - -void via_init_command_verifier(void) -{ - setup_hazard_table(init_table1, table1, - sizeof(init_table1) / sizeof(hz_init_t)); - setup_hazard_table(init_table2, table2, - sizeof(init_table2) / sizeof(hz_init_t)); - setup_hazard_table(init_table3, table3, - sizeof(init_table3) / sizeof(hz_init_t)); -} diff --git a/sys/dev/drm/via_verifier.h b/sys/dev/drm/via_verifier.h deleted file mode 100644 index 153b472c139b..000000000000 --- a/sys/dev/drm/via_verifier.h +++ /dev/null @@ -1,65 +0,0 @@ -/*- - * Copyright 2004 The Unichrome Project. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE UNICHROME PROJECT, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Author: Thomas Hellström 2004. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#ifndef _VIA_VERIFIER_H_ -#define _VIA_VERIFIER_H_ - -typedef enum { - no_sequence = 0, - z_address, - dest_address, - tex_address -} drm_via_sequence_t; - -typedef struct { - unsigned texture; - uint32_t z_addr; - uint32_t d_addr; - uint32_t t_addr[2][10]; - uint32_t pitch[2][10]; - uint32_t height[2][10]; - uint32_t tex_level_lo[2]; - uint32_t tex_level_hi[2]; - uint32_t tex_palette_size[2]; - uint32_t tex_npot[2]; - drm_via_sequence_t unfinished; - int agp_texture; - int multitex; - struct drm_device *dev; - drm_local_map_t *map_cache; - uint32_t vertex_count; - int agp; - const uint32_t *buf_start; -} drm_via_state_t; - -extern int via_verify_command_stream(const uint32_t * buf, unsigned int size, - struct drm_device * dev, int agp); -extern int via_parse_command_stream(struct drm_device *dev, const uint32_t *buf, - unsigned int size); - -#endif diff --git a/sys/dev/drm/via_video.c b/sys/dev/drm/via_video.c deleted file mode 100644 index 3bd960510575..000000000000 --- a/sys/dev/drm/via_video.c +++ /dev/null @@ -1,96 +0,0 @@ -/*- - * Copyright 2005 Thomas Hellstrom. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S), AND/OR THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Author: Thomas Hellstrom 2005. - * - * Video and XvMC related functions. - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include "dev/drm/drmP.h" -#include "dev/drm/via_drm.h" -#include "dev/drm/via_drv.h" - -void via_init_futex(drm_via_private_t * dev_priv) -{ - unsigned int i; - - DRM_DEBUG("\n"); - - for (i = 0; i < VIA_NR_XVMC_LOCKS; ++i) { - DRM_INIT_WAITQUEUE(&(dev_priv->decoder_queue[i])); - XVMCLOCKPTR(dev_priv->sarea_priv, i)->lock = 0; - } -} - -void via_cleanup_futex(drm_via_private_t * dev_priv) -{ -} - -void via_release_futex(drm_via_private_t * dev_priv, int context) -{ - unsigned int i; - volatile int *lock; - - if (!dev_priv->sarea_priv) - return; - - for (i = 0; i < VIA_NR_XVMC_LOCKS; ++i) { - lock = (volatile int *)XVMCLOCKPTR(dev_priv->sarea_priv, i); - if ((_DRM_LOCKING_CONTEXT(*lock) == context)) { - if (_DRM_LOCK_IS_HELD(*lock) - && (*lock & _DRM_LOCK_CONT)) { - DRM_WAKEUP(&(dev_priv->decoder_queue[i])); - } - *lock = 0; - } - } -} - -int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv) -{ - drm_via_futex_t *fx = data; - volatile int *lock; - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - drm_via_sarea_t *sAPriv = dev_priv->sarea_priv; - int ret = 0; - - DRM_DEBUG("\n"); - - if (fx->lock >= VIA_NR_XVMC_LOCKS) - return -EFAULT; - - lock = (volatile int *)XVMCLOCKPTR(sAPriv, fx->lock); - - switch (fx->func) { - case VIA_FUTEX_WAIT: - DRM_WAIT_ON(ret, dev_priv->decoder_queue[fx->lock], - (fx->ms / 10) * (DRM_HZ / 100), *lock != fx->val); - return ret; - case VIA_FUTEX_WAKE: - DRM_WAKEUP(&(dev_priv->decoder_queue[fx->lock])); - return 0; - } - return 0; -} diff --git a/sys/modules/Makefile b/sys/modules/Makefile index d34d260e9fa8..8d89b19df0f2 100644 --- a/sys/modules/Makefile +++ b/sys/modules/Makefile @@ -109,7 +109,6 @@ SUBDIR= \ dcons_crom \ de \ ${_dpms} \ - ${_drm} \ ${_drm2} \ dummynet \ ${_ed} \ @@ -582,9 +581,6 @@ _cpuctl= cpuctl _cpufreq= cpufreq _cs= cs _dpms= dpms -.if ${MK_MODULE_DRM} != "no" -_drm= drm -.endif .if ${MK_MODULE_DRM2} != "no" _drm2= drm2 .endif @@ -776,9 +772,6 @@ _cardbus= cardbus _cbb= cbb _cfi= cfi _cpufreq= cpufreq -.if ${MK_MODULE_DRM} != "no" -_drm= drm -.endif _exca= exca _ffec= ffec _nvd= nvd diff --git a/sys/modules/drm/Makefile b/sys/modules/drm/Makefile deleted file mode 100644 index 3ec82a6806ba..000000000000 --- a/sys/modules/drm/Makefile +++ /dev/null @@ -1,24 +0,0 @@ -# $FreeBSD$ - -SYSDIR?=${SRCTOP}/sys -.include "${SYSDIR}/conf/kern.opts.mk" - -# Modules that include binary-only blobs of microcode should be selectable by -# MK_SOURCELESS_UCODE option (see below). - -SUBDIR = \ - drm \ - mach64 \ - ${_mga} \ - ${_r128} \ - savage \ - sis \ - tdfx \ - via - -.if ${MK_SOURCELESS_UCODE} != "no" -_mga= mga -_r128= r128 -.endif - -.include <bsd.subdir.mk> diff --git a/sys/modules/drm/Makefile.inc b/sys/modules/drm/Makefile.inc deleted file mode 100644 index 265f86d1ed55..000000000000 --- a/sys/modules/drm/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -# $FreeBSD$ - -.include "../Makefile.inc" diff --git a/sys/modules/drm/drm/Makefile b/sys/modules/drm/drm/Makefile deleted file mode 100644 index 41e8a6fd8614..000000000000 --- a/sys/modules/drm/drm/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -# $FreeBSD$ - -.PATH: ${SRCTOP}/sys/dev/drm -KMOD = drm -SRCS = \ - ati_pcigart.c \ - drm_agpsupport.c \ - drm_auth.c \ - drm_bufs.c \ - drm_context.c \ - drm_dma.c \ - drm_drawable.c \ - drm_drv.c \ - drm_fops.c \ - drm_hashtab.c \ - drm_ioctl.c \ - drm_irq.c \ - drm_lock.c \ - drm_memory.c \ - drm_mm.c \ - drm_pci.c \ - drm_scatter.c \ - drm_sman.c \ - drm_sysctl.c \ - drm_vm.c - -SRCS +=device_if.h bus_if.h pci_if.h opt_drm.h - -.include <bsd.kmod.mk> diff --git a/sys/modules/drm/mach64/Makefile b/sys/modules/drm/mach64/Makefile deleted file mode 100644 index e2d229bbb9fe..000000000000 --- a/sys/modules/drm/mach64/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# $FreeBSD$ - -.PATH: ${SRCTOP}/sys/dev/drm -KMOD = mach64 -SRCS = mach64_dma.c mach64_drv.c mach64_irq.c mach64_state.c -SRCS +=device_if.h bus_if.h pci_if.h opt_drm.h - -.include <bsd.kmod.mk> diff --git a/sys/modules/drm/mga/Makefile b/sys/modules/drm/mga/Makefile deleted file mode 100644 index 20a8499ffc09..000000000000 --- a/sys/modules/drm/mga/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# $FreeBSD$ - -.PATH: ${SRCTOP}/sys/dev/drm -KMOD = mga -SRCS = mga_drv.c mga_state.c mga_warp.c mga_dma.c \ - mga_irq.c -SRCS +=device_if.h bus_if.h pci_if.h opt_drm.h - -.include <bsd.kmod.mk> diff --git a/sys/modules/drm/r128/Makefile b/sys/modules/drm/r128/Makefile deleted file mode 100644 index a51ed0dafb54..000000000000 --- a/sys/modules/drm/r128/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# $FreeBSD$ - -.PATH: ${SRCTOP}/sys/dev/drm -KMOD = r128 -SRCS = r128_cce.c r128_drv.c r128_irq.c r128_state.c -SRCS +=device_if.h bus_if.h pci_if.h opt_drm.h - -.include <bsd.kmod.mk> - -CWARNFLAGS.r128_cce.c= -Wno-unused ${NO_WCONSTANT_CONVERSION} -CWARNFLAGS.r128_state.c= -Wno-unused diff --git a/sys/modules/drm/savage/Makefile b/sys/modules/drm/savage/Makefile deleted file mode 100644 index f2142a8fbc64..000000000000 --- a/sys/modules/drm/savage/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# $FreeBSD$ - -.PATH: ${SRCTOP}/sys/dev/drm -KMOD= savage -CFLAGS += -I${SRCTOP}/sys/dev/drm -SRCS= savage_bci.c savage_drv.c savage_state.c -SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h - -.include <bsd.kmod.mk> diff --git a/sys/modules/drm/sis/Makefile b/sys/modules/drm/sis/Makefile deleted file mode 100644 index 98b58adb41b6..000000000000 --- a/sys/modules/drm/sis/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# $FreeBSD$ - -.PATH: ${SRCTOP}/sys/dev/drm -KMOD= sis -SRCS= sis_drv.c sis_ds.c sis_mm.c -SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h - -.include <bsd.kmod.mk> diff --git a/sys/modules/drm/tdfx/Makefile b/sys/modules/drm/tdfx/Makefile deleted file mode 100644 index 3cfc8b7e426c..000000000000 --- a/sys/modules/drm/tdfx/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# $FreeBSD$ - -.PATH: ${SRCTOP}/sys/dev/drm -KMOD = tdfx -SRCS = tdfx_drv.c -SRCS +=device_if.h bus_if.h pci_if.h opt_drm.h - -.include <bsd.kmod.mk> diff --git a/sys/modules/drm/via/Makefile b/sys/modules/drm/via/Makefile deleted file mode 100644 index b06bc6cd8406..000000000000 --- a/sys/modules/drm/via/Makefile +++ /dev/null @@ -1,26 +0,0 @@ -# $FreeBSD$ - -.PATH: ${SRCTOP}/sys/dev/drm -KMOD = via -SRCS = via_dma.c via_dmablit.c via_drv.c via_irq.c via_map.c via_mm.c \ - via_verifier.c via_video.c -SRCS += device_if.h bus_if.h pci_if.h opt_drm.h - -.if defined(DRM_DEBUG) -DRM_DEBUG_OPT= "\#define DRM_DEBUG 1" -.endif - -.if !defined(DRM_NOLINUX) && \ - (${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64") -DRM_LINUX_OPT= "\#define DRM_LINUX 1" -.endif - -opt_drm.h: - touch opt_drm.h - echo $(DRM_DEBUG_OPT) >> opt_drm.h - echo $(DRM_LINUX_OPT) >> opt_drm.h - -.include <bsd.kmod.mk> - -CWARNFLAGS.via_dma.c= -Wno-unused-value -CWARNFLAGS.via_dmablit.c= -Wno-unused-value |