diff options
Diffstat (limited to 'test/CodeGen/WebAssembly')
47 files changed, 630 insertions, 490 deletions
diff --git a/test/CodeGen/WebAssembly/call.ll b/test/CodeGen/WebAssembly/call.ll index 9158ccec0979..6d5542c89d3d 100644 --- a/test/CodeGen/WebAssembly/call.ll +++ b/test/CodeGen/WebAssembly/call.ll @@ -2,7 +2,7 @@ ; Test that basic call operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare i32 @i32_nullary() @@ -15,7 +15,7 @@ declare void @void_nullary() ; CHECK-LABEL: call_i32_nullary: ; CHECK-NEXT: .result i32{{$}} -; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_nullary{{$}} +; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_nullary@FUNCTION{{$}} ; CHECK-NEXT: return $pop[[NUM]]{{$}} define i32 @call_i32_nullary() { %r = call i32 @i32_nullary() @@ -24,7 +24,7 @@ define i32 @call_i32_nullary() { ; CHECK-LABEL: call_i64_nullary: ; CHECK-NEXT: .result i64{{$}} -; CHECK-NEXT: {{^}} i64.call $push[[NUM:[0-9]+]]=, i64_nullary{{$}} +; CHECK-NEXT: {{^}} i64.call $push[[NUM:[0-9]+]]=, i64_nullary@FUNCTION{{$}} ; CHECK-NEXT: return $pop[[NUM]]{{$}} define i64 @call_i64_nullary() { %r = call i64 @i64_nullary() @@ -33,7 +33,7 @@ define i64 @call_i64_nullary() { ; CHECK-LABEL: call_float_nullary: ; CHECK-NEXT: .result f32{{$}} -; CHECK-NEXT: {{^}} f32.call $push[[NUM:[0-9]+]]=, float_nullary{{$}} +; CHECK-NEXT: {{^}} f32.call $push[[NUM:[0-9]+]]=, float_nullary@FUNCTION{{$}} ; CHECK-NEXT: return $pop[[NUM]]{{$}} define float @call_float_nullary() { %r = call float @float_nullary() @@ -42,7 +42,7 @@ define float @call_float_nullary() { ; CHECK-LABEL: call_double_nullary: ; CHECK-NEXT: .result f64{{$}} -; CHECK-NEXT: {{^}} f64.call $push[[NUM:[0-9]+]]=, double_nullary{{$}} +; CHECK-NEXT: {{^}} f64.call $push[[NUM:[0-9]+]]=, double_nullary@FUNCTION{{$}} ; CHECK-NEXT: return $pop[[NUM]]{{$}} define double @call_double_nullary() { %r = call double @double_nullary() @@ -50,7 +50,7 @@ define double @call_double_nullary() { } ; CHECK-LABEL: call_void_nullary: -; CHECK-NEXT: {{^}} call void_nullary{{$}} +; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}} ; CHECK-NEXT: return{{$}} define void @call_void_nullary() { call void @void_nullary() @@ -60,7 +60,7 @@ define void @call_void_nullary() { ; CHECK-LABEL: call_i32_unary: ; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .result i32{{$}} -; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_unary, $0{{$}} +; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_unary@FUNCTION, $0{{$}} ; CHECK-NEXT: return $pop[[NUM]]{{$}} define i32 @call_i32_unary(i32 %a) { %r = call i32 @i32_unary(i32 %a) @@ -70,7 +70,7 @@ define i32 @call_i32_unary(i32 %a) { ; CHECK-LABEL: call_i32_binary: ; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .result i32{{$}} -; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_binary, $0, $1{{$}} +; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_binary@FUNCTION, $0, $1{{$}} ; CHECK-NEXT: return $pop[[NUM]]{{$}} define i32 @call_i32_binary(i32 %a, i32 %b) { %r = call i32 @i32_binary(i32 %a, i32 %b) @@ -97,7 +97,7 @@ define i32 @call_indirect_i32(i32 ()* %callee) { } ; CHECK-LABEL: tail_call_void_nullary: -; CHECK-NEXT: {{^}} call void_nullary{{$}} +; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}} ; CHECK-NEXT: return{{$}} define void @tail_call_void_nullary() { tail call void @void_nullary() @@ -105,7 +105,7 @@ define void @tail_call_void_nullary() { } ; CHECK-LABEL: fastcc_tail_call_void_nullary: -; CHECK-NEXT: {{^}} call void_nullary{{$}} +; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}} ; CHECK-NEXT: return{{$}} define void @fastcc_tail_call_void_nullary() { tail call fastcc void @void_nullary() @@ -113,7 +113,7 @@ define void @fastcc_tail_call_void_nullary() { } ; CHECK-LABEL: coldcc_tail_call_void_nullary: -; CHECK-NEXT: {{^}} call void_nullary +; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}} ; CHECK-NEXT: return{{$}} define void @coldcc_tail_call_void_nullary() { tail call coldcc void @void_nullary() diff --git a/test/CodeGen/WebAssembly/cfg-stackify.ll b/test/CodeGen/WebAssembly/cfg-stackify.ll index 71f3551347bf..f0e5f4471678 100644 --- a/test/CodeGen/WebAssembly/cfg-stackify.ll +++ b/test/CodeGen/WebAssembly/cfg-stackify.ll @@ -3,7 +3,7 @@ ; Test the CFG stackifier pass. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare void @something() @@ -18,7 +18,7 @@ declare void @something() ; CHECK-NEXT: br_if ; CHECK-NOT: br ; CHECK: call -; CHECK: br BB0_1{{$}} +; CHECK: br 0{{$}} ; CHECK: return{{$}} ; OPT-LABEL: test0: ; OPT: loop @@ -28,7 +28,7 @@ declare void @something() ; OPT-NEXT: br_if ; OPT-NOT: br ; OPT: call -; OPT: br BB0_1{{$}} +; OPT: br 0{{$}} ; OPT: return{{$}} define void @test0(i32 %n) { entry: @@ -59,7 +59,7 @@ back: ; CHECK-NEXT: br_if ; CHECK-NOT: br ; CHECK: call -; CHECK: br BB1_1{{$}} +; CHECK: br 0{{$}} ; CHECK: return{{$}} ; OPT-LABEL: test1: ; OPT: loop @@ -69,7 +69,7 @@ back: ; OPT-NEXT: br_if ; OPT-NOT: br ; OPT: call -; OPT: br BB1_1{{$}} +; OPT: br 0{{$}} ; OPT: return{{$}} define void @test1(i32 %n) { entry: @@ -93,18 +93,20 @@ back: ; Test that a simple loop is handled as expected. ; CHECK-LABEL: test2: -; CHECK: block BB2_2{{$}} -; CHECK: br_if {{[^,]*}}, BB2_2{{$}} -; CHECK: BB2_1: -; CHECK: br_if ${{[0-9]+}}, BB2_1{{$}} -; CHECK: BB2_2: +; CHECK-NOT: local +; CHECK: block{{$}} +; CHECK: br_if {{[^,]*}}, 0{{$}} +; CHECK: .LBB2_1: +; CHECK: br_if ${{[0-9]+}}, 0{{$}} +; CHECK: .LBB2_2: ; CHECK: return{{$}} ; OPT-LABEL: test2: -; OPT: block BB2_2{{$}} -; OPT: br_if {{[^,]*}}, BB2_2{{$}} -; OPT: BB2_1: -; OPT: br_if ${{[0-9]+}}, BB2_1{{$}} -; OPT: BB2_2: +; OPT-NOT: local +; OPT: block{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT: .LBB2_1: +; OPT: br_if ${{[0-9]+}}, 0{{$}} +; OPT: .LBB2_2: ; OPT: return{{$}} define void @test2(double* nocapture %p, i32 %n) { entry: @@ -132,24 +134,29 @@ for.end: } ; CHECK-LABEL: doublediamond: -; CHECK: block BB3_5{{$}} -; CHECK: block BB3_2{{$}} -; CHECK: br_if $0, BB3_2{{$}} -; CHECK: block BB3_4{{$}} -; CHECK: br_if $1, BB3_4{{$}} -; CHECK: br BB3_5{{$}} -; CHECK: BB3_4: -; CHECK: BB3_5: +; CHECK: block{{$}} +; CHECK-NEXT: block{{$}} +; CHECK: br_if ${{[^,]*}}, 0{{$}} +; CHECK: br 1{{$}} +; CHECK: .LBB3_2: +; CHECK-NEXT: end_block{{$}} +; CHECK: block{{$}} +; CHECK: br_if ${{[^,]*}}, 0{{$}} +; CHECK: br 1{{$}} +; CHECK: .LBB3_4: +; CHECK-NEXT: end_block{{$}} +; CHECK: .LBB3_5: +; CHECK-NEXT: end_block{{$}} ; CHECK: return ${{[0-9]+}}{{$}} ; OPT-LABEL: doublediamond: -; OPT: block BB3_5{{$}} -; OPT: block BB3_4{{$}} -; OPT: br_if {{[^,]*}}, BB3_4{{$}} -; OPT: block BB3_3{{$}} -; OPT: br_if {{[^,]*}}, BB3_3{{$}} -; OPT: br BB3_5{{$}} -; OPT: BB3_4: -; OPT: BB3_5: +; OPT: block{{$}} +; OPT-NEXT: block{{$}} +; OPT: br_if ${{[^,]*}}, 0{{$}} +; OPT: block{{$}} +; OPT: br_if ${{[^,]*}}, 0{{$}} +; OPT: br 1{{$}} +; OPT: .LBB3_4: +; OPT: .LBB3_5: ; OPT: return ${{[0-9]+}}{{$}} define i32 @doublediamond(i32 %a, i32 %b, i32* %p) { entry: @@ -175,14 +182,14 @@ exit: } ; CHECK-LABEL: triangle: -; CHECK: block BB4_2{{$}} -; CHECK: br_if $1, BB4_2{{$}} -; CHECK: BB4_2: +; CHECK: block{{$}} +; CHECK: br_if $1, 0{{$}} +; CHECK: .LBB4_2: ; CHECK: return ${{[0-9]+}}{{$}} ; OPT-LABEL: triangle: -; OPT: block BB4_2{{$}} -; OPT: br_if $1, BB4_2{{$}} -; OPT: BB4_2: +; OPT: block{{$}} +; OPT: br_if $1, 0{{$}} +; OPT: .LBB4_2: ; OPT: return ${{[0-9]+}}{{$}} define i32 @triangle(i32* %p, i32 %a) { entry: @@ -198,20 +205,20 @@ exit: } ; CHECK-LABEL: diamond: -; CHECK: block BB5_3{{$}} -; CHECK: block BB5_2{{$}} -; CHECK: br_if $1, BB5_2{{$}} -; CHECK: br BB5_3{{$}} -; CHECK: BB5_2: -; CHECK: BB5_3: +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: br_if $1, 0{{$}} +; CHECK: br 1{{$}} +; CHECK: .LBB5_2: +; CHECK: .LBB5_3: ; CHECK: return ${{[0-9]+}}{{$}} ; OPT-LABEL: diamond: -; OPT: block BB5_3{{$}} -; OPT: block BB5_2{{$}} -; OPT: br_if {{[^,]*}}, BB5_2{{$}} -; OPT: br BB5_3{{$}} -; OPT: BB5_2: -; OPT: BB5_3: +; OPT: block{{$}} +; OPT: block{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT: br 1{{$}} +; OPT: .LBB5_2: +; OPT: .LBB5_3: ; OPT: return ${{[0-9]+}}{{$}} define i32 @diamond(i32* %p, i32 %a) { entry: @@ -243,16 +250,16 @@ entry: ; CHECK-LABEL: minimal_loop: ; CHECK-NOT: br -; CHECK: BB7_1: +; CHECK: .LBB7_1: ; CHECK: i32.store $discard=, 0($0), $pop{{[0-9]+}}{{$}} -; CHECK: br BB7_1{{$}} -; CHECK: BB7_2: +; CHECK: br 0{{$}} +; CHECK: .LBB7_2: ; OPT-LABEL: minimal_loop: ; OPT-NOT: br -; OPT: BB7_1: +; OPT: .LBB7_1: ; OPT: i32.store $discard=, 0($0), $pop{{[0-9]+}}{{$}} -; OPT: br BB7_1{{$}} -; OPT: BB7_2: +; OPT: br 0{{$}} +; OPT: .LBB7_2: define i32 @minimal_loop(i32* %p) { entry: store volatile i32 0, i32* %p @@ -264,17 +271,17 @@ loop: ; CHECK-LABEL: simple_loop: ; CHECK-NOT: br -; CHECK: BB8_1: -; CHECK: loop BB8_2{{$}} -; CHECK: br_if $pop{{[0-9]+}}, BB8_1{{$}} -; CHECK: BB8_2: +; CHECK: .LBB8_1: +; CHECK: loop{{$}} +; CHECK: br_if $pop{{[0-9]+}}, 0{{$}} +; CHECK-NEXT: end_loop{{$}} ; CHECK: return ${{[0-9]+}}{{$}} ; OPT-LABEL: simple_loop: ; OPT-NOT: br -; OPT: BB8_1: -; OPT: loop BB8_2{{$}} -; OPT: br_if {{[^,]*}}, BB8_1{{$}} -; OPT: BB8_2: +; OPT: .LBB8_1: +; OPT: loop{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT-NEXT: end_loop{{$}} ; OPT: return ${{[0-9]+}}{{$}} define i32 @simple_loop(i32* %p, i32 %a) { entry: @@ -290,20 +297,20 @@ exit: } ; CHECK-LABEL: doubletriangle: -; CHECK: block BB9_4{{$}} -; CHECK: br_if $0, BB9_4{{$}} -; CHECK: block BB9_3{{$}} -; CHECK: br_if $1, BB9_3{{$}} -; CHECK: BB9_3: -; CHECK: BB9_4: +; CHECK: block{{$}} +; CHECK: br_if $0, 0{{$}} +; CHECK: block{{$}} +; CHECK: br_if $1, 0{{$}} +; CHECK: .LBB9_3: +; CHECK: .LBB9_4: ; CHECK: return ${{[0-9]+}}{{$}} ; OPT-LABEL: doubletriangle: -; OPT: block BB9_4{{$}} -; OPT: br_if $0, BB9_4{{$}} -; OPT: block BB9_3{{$}} -; OPT: br_if $1, BB9_3{{$}} -; OPT: BB9_3: -; OPT: BB9_4: +; OPT: block{{$}} +; OPT: br_if $0, 0{{$}} +; OPT: block{{$}} +; OPT: br_if $1, 0{{$}} +; OPT: .LBB9_3: +; OPT: .LBB9_4: ; OPT: return ${{[0-9]+}}{{$}} define i32 @doubletriangle(i32 %a, i32 %b, i32* %p) { entry: @@ -326,22 +333,22 @@ exit: } ; CHECK-LABEL: ifelse_earlyexits: -; CHECK: block BB10_4{{$}} -; CHECK: block BB10_2{{$}} -; CHECK: br_if $0, BB10_2{{$}} -; CHECK: br BB10_4{{$}} -; CHECK: BB10_2: -; CHECK: br_if $1, BB10_4{{$}} -; CHECK: BB10_4: +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: br_if $0, 0{{$}} +; CHECK: br 1{{$}} +; CHECK: .LBB10_2: +; CHECK: br_if $1, 0{{$}} +; CHECK: .LBB10_4: ; CHECK: return ${{[0-9]+}}{{$}} ; OPT-LABEL: ifelse_earlyexits: -; OPT: block BB10_4{{$}} -; OPT: block BB10_3{{$}} -; OPT: br_if {{[^,]*}}, BB10_3{{$}} -; OPT: br_if $1, BB10_4{{$}} -; OPT: br BB10_4{{$}} -; OPT: BB10_3: -; OPT: BB10_4: +; OPT: block{{$}} +; OPT: block{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT: br_if $1, 1{{$}} +; OPT: br 1{{$}} +; OPT: .LBB10_3: +; OPT: .LBB10_4: ; OPT: return ${{[0-9]+}}{{$}} define i32 @ifelse_earlyexits(i32 %a, i32 %b, i32* %p) { entry: @@ -364,35 +371,40 @@ exit: } ; CHECK-LABEL: doublediamond_in_a_loop: -; CHECK: BB11_1: -; CHECK: loop BB11_7{{$}} -; CHECK: block BB11_6{{$}} -; CHECK: block BB11_3{{$}} -; CHECK: br_if $0, BB11_3{{$}} -; CHECK: br BB11_6{{$}} -; CHECK: BB11_3: -; CHECK: block BB11_5{{$}} -; CHECK: br_if $1, BB11_5{{$}} -; CHECK: br BB11_6{{$}} -; CHECK: BB11_5: -; CHECK: BB11_6: -; CHECK: br BB11_1{{$}} -; CHECK: BB11_7: +; CHECK: .LBB11_1: +; CHECK: loop{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: br_if $0, 0{{$}} +; CHECK: br 1{{$}} +; CHECK: .LBB11_3: +; CHECK: block{{$}} +; CHECK: br_if $1, 0{{$}} +; CHECK: br 1{{$}} +; CHECK: .LBB11_5: +; CHECK: .LBB11_6: +; CHECK: br 0{{$}} +; CHECK: .LBB11_7: +; CHECK-NEXT: end_loop{{$}} ; OPT-LABEL: doublediamond_in_a_loop: -; OPT: BB11_1: -; OPT: loop BB11_7{{$}} -; OPT: block BB11_6{{$}} -; OPT: block BB11_5{{$}} -; OPT: br_if {{[^,]*}}, BB11_5{{$}} -; OPT: block BB11_4{{$}} -; OPT: br_if {{[^,]*}}, BB11_4{{$}} -; OPT: br BB11_6{{$}} -; OPT: BB11_4: -; OPT: br BB11_6{{$}} -; OPT: BB11_5: -; OPT: BB11_6: -; OPT: br BB11_1{{$}} -; OPT: BB11_7: +; OPT: .LBB11_1: +; OPT: loop{{$}} +; OPT: block{{$}} +; OPT: block{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT: block{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT: br 2{{$}} +; OPT: .LBB11_4: +; OPT-NEXT: end_block{{$}} +; OPT: br 1{{$}} +; OPT: .LBB11_5: +; OPT-NEXT: end_block{{$}} +; OPT: .LBB11_6: +; OPT-NEXT: end_block{{$}} +; OPT: br 0{{$}} +; OPT: .LBB11_7: +; OPT-NEXT: end_loop{{$}} define i32 @doublediamond_in_a_loop(i32 %a, i32 %b, i32* %p) { entry: br label %header @@ -423,12 +435,12 @@ exit: ; CHECK-LABEL: test3: ; CHECK: loop ; CHECK-NEXT: br_if -; CHECK-NEXT: BB{{[0-9]+}}_{{[0-9]+}}: +; CHECK-NEXT: .LBB{{[0-9]+}}_{{[0-9]+}}: ; CHECK-NEXT: loop ; OPT-LABEL: test3: ; OPT: loop ; OPT-NEXT: br_if -; OPT-NEXT: BB{{[0-9]+}}_{{[0-9]+}}: +; OPT-NEXT: .LBB{{[0-9]+}}_{{[0-9]+}}: ; OPT-NEXT: loop declare void @bar() define void @test3(i32 %w) { @@ -460,42 +472,48 @@ if.end: ; Test switch lowering and block placement. ; CHECK-LABEL: test4: -; CHECK-NEXT: .param i32{{$}} -; CHECK: block BB13_8{{$}} -; CHECK-NEXT: block BB13_7{{$}} -; CHECK-NEXT: block BB13_4{{$}} -; CHECK: br_if $pop{{[0-9]*}}, BB13_4{{$}} -; CHECK-NEXT: block BB13_3{{$}} -; CHECK: br_if $pop{{[0-9]*}}, BB13_3{{$}} -; CHECK: br_if $pop{{[0-9]*}}, BB13_7{{$}} -; CHECK-NEXT: BB13_3: +; CHECK-NEXT: .param i32{{$}} +; CHECK: block{{$}} +; CHECK-NEXT: block{{$}} +; CHECK-NEXT: block{{$}} +; CHECK: br_if $pop{{[0-9]*}}, 0{{$}} +; CHECK-NEXT: block{{$}} +; CHECK: br_if $pop{{[0-9]*}}, 0{{$}} +; CHECK: br_if $pop{{[0-9]*}}, 2{{$}} +; CHECK-NEXT: .LBB13_3: +; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: return{{$}} -; CHECK-NEXT: BB13_4: -; CHECK: br_if $pop{{[0-9]*}}, BB13_8{{$}} -; CHECK: br_if $pop{{[0-9]*}}, BB13_7{{$}} +; CHECK-NEXT: .LBB13_4: +; CHECK: br_if $pop{{[0-9]*}}, 1{{$}} +; CHECK: br_if $pop{{[0-9]*}}, 0{{$}} ; CHECK-NEXT: return{{$}} -; CHECK-NEXT: BB13_7: +; CHECK-NEXT: .LBB13_7: +; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: return{{$}} -; CHECK-NEXT: BB13_8: +; CHECK-NEXT: .LBB13_8: +; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: return{{$}} ; OPT-LABEL: test4: -; OPT-NEXT: .param i32{{$}} -; OPT: block BB13_8{{$}} -; OPT-NEXT: block BB13_7{{$}} -; OPT-NEXT: block BB13_4{{$}} -; OPT: br_if $pop{{[0-9]*}}, BB13_4{{$}} -; OPT-NEXT: block BB13_3{{$}} -; OPT: br_if $pop{{[0-9]*}}, BB13_3{{$}} -; OPT: br_if $pop{{[0-9]*}}, BB13_7{{$}} -; OPT-NEXT: BB13_3: +; OPT-NEXT: .param i32{{$}} +; OPT: block{{$}} +; OPT-NEXT: block{{$}} +; OPT-NEXT: block{{$}} +; OPT: br_if $pop{{[0-9]*}}, 0{{$}} +; OPT-NEXT: block{{$}} +; OPT: br_if $pop{{[0-9]*}}, 0{{$}} +; OPT: br_if $pop{{[0-9]*}}, 2{{$}} +; OPT-NEXT: .LBB13_3: +; OPT-NEXT: end_block{{$}} ; OPT-NEXT: return{{$}} -; OPT-NEXT: BB13_4: -; OPT: br_if $pop{{[0-9]*}}, BB13_8{{$}} -; OPT: br_if $pop{{[0-9]*}}, BB13_7{{$}} +; OPT-NEXT: .LBB13_4: +; OPT: br_if $pop{{[0-9]*}}, 1{{$}} +; OPT: br_if $pop{{[0-9]*}}, 0{{$}} ; OPT-NEXT: return{{$}} -; OPT-NEXT: BB13_7: +; OPT-NEXT: .LBB13_7: +; OPT-NEXT: end_block{{$}} ; OPT-NEXT: return{{$}} -; OPT-NEXT: BB13_8: +; OPT-NEXT: .LBB13_8: +; OPT-NEXT: end_block{{$}} ; OPT-NEXT: return{{$}} define void @test4(i32 %t) { entry: @@ -523,24 +541,24 @@ default: ; same basic block. ; CHECK-LABEL: test5: -; CHECK: BB14_1: -; CHECK-NEXT: block BB14_4{{$}} -; CHECK-NEXT: loop BB14_3{{$}} -; CHECK: br_if {{[^,]*}}, BB14_4{{$}} -; CHECK: br_if {{[^,]*}}, BB14_1{{$}} -; CHECK-NEXT: BB14_3: +; CHECK: .LBB14_1: +; CHECK-NEXT: block{{$}} +; CHECK-NEXT: loop{{$}} +; CHECK: br_if {{[^,]*}}, 2{{$}} +; CHECK: br_if {{[^,]*}}, 0{{$}} +; CHECK-NEXT: end_loop{{$}} ; CHECK: return{{$}} -; CHECK-NEXT: BB14_4: +; CHECK-NEXT: .LBB14_4: ; CHECK: return{{$}} ; OPT-LABEL: test5: -; OPT: BB14_1: -; OPT-NEXT: block BB14_4{{$}} -; OPT-NEXT: loop BB14_3{{$}} -; OPT: br_if {{[^,]*}}, BB14_4{{$}} -; OPT: br_if {{[^,]*}}, BB14_1{{$}} -; OPT-NEXT: BB14_3: +; OPT: .LBB14_1: +; OPT-NEXT: block{{$}} +; OPT-NEXT: loop{{$}} +; OPT: br_if {{[^,]*}}, 2{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT-NEXT: end_loop{{$}} ; OPT: return{{$}} -; OPT-NEXT: BB14_4: +; OPT-NEXT: .LBB14_4: ; OPT: return{{$}} define void @test5(i1 %p, i1 %q) { entry: @@ -568,41 +586,45 @@ return: ; which has another predecessor. ; CHECK-LABEL: test6: -; CHECK: BB15_1: -; CHECK-NEXT: block BB15_6{{$}} -; CHECK-NEXT: block BB15_5{{$}} -; CHECK-NEXT: loop BB15_4{{$}} +; CHECK: .LBB15_1: +; CHECK-NEXT: block{{$}} +; CHECK-NEXT: block{{$}} +; CHECK-NEXT: loop{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB15_6{{$}} +; CHECK: br_if {{[^,]*}}, 3{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB15_5{{$}} +; CHECK: br_if {{[^,]*}}, 2{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB15_1{{$}} -; CHECK-NEXT: BB15_4: +; CHECK: br_if {{[^,]*}}, 0{{$}} +; CHECK-NEXT: end_loop{{$}} ; CHECK-NOT: block ; CHECK: return{{$}} -; CHECK-NEXT: BB15_5: +; CHECK-NEXT: .LBB15_5: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block -; CHECK: BB15_6: +; CHECK: .LBB15_6: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block ; CHECK: return{{$}} ; OPT-LABEL: test6: -; OPT: BB15_1: -; OPT-NEXT: block BB15_6{{$}} -; OPT-NEXT: block BB15_5{{$}} -; OPT-NEXT: loop BB15_4{{$}} +; OPT: .LBB15_1: +; OPT-NEXT: block{{$}} +; OPT-NEXT: block{{$}} +; OPT-NEXT: loop{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB15_6{{$}} +; OPT: br_if {{[^,]*}}, 3{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB15_5{{$}} +; OPT: br_if {{[^,]*}}, 2{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB15_1{{$}} -; OPT-NEXT: BB15_4: +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT-NEXT: end_loop{{$}} ; OPT-NOT: block ; OPT: return{{$}} -; OPT-NEXT: BB15_5: +; OPT-NEXT: .LBB15_5: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block -; OPT: BB15_6: +; OPT: .LBB15_6: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block ; OPT: return{{$}} define void @test6(i1 %p, i1 %q) { @@ -638,36 +660,38 @@ second: ; that end in unreachable. ; CHECK-LABEL: test7: -; CHECK: BB16_1: -; CHECK-NEXT: loop BB16_5{{$}} +; CHECK: .LBB16_1: +; CHECK-NEXT: loop{{$}} ; CHECK-NOT: block -; CHECK: block BB16_4{{$}} -; CHECK: br_if {{[^,]*}}, BB16_4{{$}} +; CHECK: block{{$}} +; CHECK: br_if {{[^,]*}}, 0{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB16_1{{$}} +; CHECK: br_if {{[^,]*}}, 1{{$}} ; CHECK-NOT: block ; CHECK: unreachable -; CHECK_NEXT: BB16_4: +; CHECK-NEXT: .LBB16_4: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB16_1{{$}} -; CHECK-NEXT: BB16_5: +; CHECK: br_if {{[^,]*}}, 0{{$}} +; CHECK-NEXT: end_loop{{$}} ; CHECK-NOT: block ; CHECK: unreachable ; OPT-LABEL: test7: -; OPT: BB16_1: -; OPT-NEXT: loop BB16_5{{$}} +; OPT: .LBB16_1: +; OPT-NEXT: loop{{$}} ; OPT-NOT: block -; OPT: block BB16_4{{$}} +; OPT: block{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB16_4{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB16_1{{$}} +; OPT: br_if {{[^,]*}}, 1{{$}} ; OPT-NOT: block ; OPT: unreachable -; OPT_NEXT: BB16_4: +; OPT-NEXT: .LBB16_4: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB16_1{{$}} -; OPT-NEXT: BB16_5: +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT-NEXT: end_loop{{$}} ; OPT-NOT: block ; OPT: unreachable define void @test7(i1 %tobool2, i1 %tobool9) { @@ -699,31 +723,33 @@ u1: ; Test an interesting case using nested loops and switches. ; CHECK-LABEL: test8: -; CHECK: BB17_1: -; CHECK-NEXT: loop BB17_4{{$}} -; CHECK-NEXT: block BB17_3{{$}} +; CHECK: .LBB17_1: +; CHECK-NEXT: loop{{$}} +; CHECK-NEXT: block{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB17_3{{$}} +; CHECK: br_if {{[^,]*}}, 0{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB17_1{{$}} -; CHECK-NEXT: BB17_3: -; CHECK-NEXT: loop BB17_4{{$}} -; CHECK-NEXT: br_if {{[^,]*}}, BB17_3{{$}} -; CHECK-NEXT: br BB17_1{{$}} -; CHECK-NEXT: BB17_4: +; CHECK: br_if {{[^,]*}}, 1{{$}} +; CHECK-NEXT: .LBB17_3: +; CHECK-NEXT: end_block{{$}} +; CHECK-NEXT: loop{{$}} +; CHECK-NEXT: br_if {{[^,]*}}, 0{{$}} +; CHECK-NEXT: br 2{{$}} +; CHECK-NEXT: .LBB17_4: ; OPT-LABEL: test8: -; OPT: BB17_1: -; OPT-NEXT: loop BB17_4{{$}} -; OPT-NEXT: block BB17_3{{$}} +; OPT: .LBB17_1: +; OPT-NEXT: loop{{$}} +; OPT-NEXT: block{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB17_3{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB17_1{{$}} -; OPT-NEXT: BB17_3: -; OPT-NEXT: loop BB17_4{{$}} -; OPT-NEXT: br_if {{[^,]*}}, BB17_3{{$}} -; OPT-NEXT: br BB17_1{{$}} -; OPT-NEXT: BB17_4: +; OPT: br_if {{[^,]*}}, 1{{$}} +; OPT-NEXT: .LBB17_3: +; OPT-NEXT: end_block{{$}} +; OPT-NEXT: loop{{$}} +; OPT-NEXT: br_if {{[^,]*}}, 0{{$}} +; OPT-NEXT: br 2{{$}} +; OPT-NEXT: .LBB17_4: define i32 @test8() { bb: br label %bb1 @@ -745,45 +771,47 @@ bb3: ; Test an interesting case using nested loops that share a bottom block. ; CHECK-LABEL: test9: -; CHECK: BB18_1: -; CHECK-NEXT: loop BB18_5{{$}} +; CHECK: .LBB18_1: +; CHECK-NEXT: loop{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB18_5{{$}} -; CHECK-NEXT: BB18_2: -; CHECK-NEXT: loop BB18_5{{$}} +; CHECK: br_if {{[^,]*}}, 1{{$}} +; CHECK-NEXT: .LBB18_2: +; CHECK-NEXT: loop{{$}} ; CHECK-NOT: block -; CHECK: block BB18_4{{$}} +; CHECK: block{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB18_4{{$}} +; CHECK: br_if {{[^,]*}}, 0{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB18_2{{$}} -; CHECK-NEXT: br BB18_1{{$}} -; CHECK-NEXT: BB18_4: +; CHECK: br_if {{[^,]*}}, 1{{$}} +; CHECK-NEXT: br 3{{$}} +; CHECK-NEXT: .LBB18_4: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB18_2{{$}} -; CHECK-NEXT: br BB18_1{{$}} -; CHECK-NEXT: BB18_5: +; CHECK: br_if {{[^,]*}}, 0{{$}} +; CHECK-NEXT: br 2{{$}} +; CHECK-NEXT: .LBB18_5: ; CHECK-NOT: block ; CHECK: return{{$}} ; OPT-LABEL: test9: -; OPT: BB18_1: -; OPT-NEXT: loop BB18_5{{$}} +; OPT: .LBB18_1: +; OPT-NEXT: loop{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB18_5{{$}} -; OPT-NEXT: BB18_2: -; OPT-NEXT: loop BB18_5{{$}} +; OPT: br_if {{[^,]*}}, 1{{$}} +; OPT-NEXT: .LBB18_2: +; OPT-NEXT: loop{{$}} ; OPT-NOT: block -; OPT: block BB18_4{{$}} +; OPT: block{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB18_4{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB18_2{{$}} -; OPT-NEXT: br BB18_1{{$}} -; OPT-NEXT: BB18_4: +; OPT: br_if {{[^,]*}}, 1{{$}} +; OPT-NEXT: br 3{{$}} +; OPT-NEXT: .LBB18_4: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB18_2{{$}} -; OPT-NEXT: br BB18_1{{$}} -; OPT-NEXT: BB18_5: +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT-NEXT: br 2{{$}} +; OPT-NEXT: .LBB18_5: ; OPT-NOT: block ; OPT: return{{$}} declare i1 @a() @@ -821,47 +849,53 @@ end: ; and loop exits to a block with unreachable. ; CHECK-LABEL: test10: -; CHECK: BB19_1: -; CHECK-NEXT: loop BB19_7{{$}} +; CHECK: .LBB19_1: +; CHECK-NEXT: loop{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB19_1{{$}} -; CHECK-NEXT: BB19_2: -; CHECK-NEXT: block BB19_6{{$}} -; CHECK-NEXT: loop BB19_5{{$}} +; CHECK: br_if {{[^,]*}}, 0{{$}} +; CHECK-NEXT: .LBB19_2: +; CHECK-NEXT: block{{$}} +; CHECK-NEXT: loop{{$}} ; CHECK-NOT: block -; CHECK: BB19_3: -; CHECK-NEXT: loop BB19_5{{$}} +; CHECK: .LBB19_3: +; CHECK-NEXT: loop{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB19_1{{$}} +; CHECK: br_if {{[^,]*}}, 5{{$}} ; CHECK-NOT: block -; CHECK: tableswitch {{[^,]*}}, BB19_3, BB19_3, BB19_5, BB19_1, BB19_2, BB19_6{{$}} -; CHECK-NEXT: BB19_5: +; CHECK: tableswitch {{[^,]*}}, 0, 0, 1, 5, 2, 4{{$}} +; CHECK-NEXT: .LBB19_5: +; CHECK-NEXT: end_loop{{$}} +; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: return{{$}} -; CHECK-NEXT: BB19_6: +; CHECK-NEXT: .LBB19_6: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block -; CHECK: br BB19_1{{$}} -; CHECK-NEXT: BB19_7: +; CHECK: br 0{{$}} +; CHECK-NEXT: .LBB19_7: ; OPT-LABEL: test10: -; OPT: BB19_1: -; OPT-NEXT: loop BB19_7{{$}} +; OPT: .LBB19_1: +; OPT-NEXT: loop{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB19_1{{$}} -; OPT-NEXT: BB19_2: -; OPT-NEXT: block BB19_6{{$}} -; OPT-NEXT: loop BB19_5{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} +; OPT-NEXT: .LBB19_2: +; OPT-NEXT: block{{$}} +; OPT-NEXT: loop{{$}} ; OPT-NOT: block -; OPT: BB19_3: -; OPT-NEXT: loop BB19_5{{$}} +; OPT: .LBB19_3: +; OPT-NEXT: loop{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB19_1{{$}} +; OPT: br_if {{[^,]*}}, 5{{$}} ; OPT-NOT: block -; OPT: tableswitch {{[^,]*}}, BB19_3, BB19_3, BB19_5, BB19_1, BB19_2, BB19_6{{$}} -; OPT-NEXT: BB19_5: +; OPT: tableswitch {{[^,]*}}, 0, 0, 1, 5, 2, 4{{$}} +; OPT-NEXT: .LBB19_5: +; OPT-NEXT: end_loop{{$}} +; OPT-NEXT: end_loop{{$}} ; OPT-NEXT: return{{$}} -; OPT-NEXT: BB19_6: +; OPT-NEXT: .LBB19_6: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block -; OPT: br BB19_1{{$}} -; OPT-NEXT: BB19_7: +; OPT: br 0{{$}} +; OPT-NEXT: .LBB19_7: define void @test10() { bb0: br label %bb1 @@ -900,58 +934,67 @@ bb6: ; Test a CFG DAG with interesting merging. ; CHECK-LABEL: test11: -; CHECK: block BB20_8{{$}} -; CHECK-NEXT: block BB20_7{{$}} -; CHECK-NEXT: block BB20_6{{$}} -; CHECK-NEXT: block BB20_4{{$}} -; CHECK-NEXT: br_if {{[^,]*}}, BB20_4{{$}} +; CHECK: block{{$}} +; CHECK-NEXT: block{{$}} +; CHECK-NEXT: block{{$}} +; CHECK-NEXT: block{{$}} +; CHECK-NEXT: br_if {{[^,]*}}, 0{{$}} +; CHECK-NEXT: block{{$}} ; CHECK-NOT: block -; CHECK: block BB20_3{{$}} -; CHECK: br_if {{[^,]*}}, BB20_3{{$}} +; CHECK: br_if {{[^,]*}}, 0{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB20_6{{$}} -; CHECK-NEXT: BB20_3: +; CHECK: br_if {{[^,]*}}, 2{{$}} +; CHECK-NEXT: .LBB20_3: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block ; CHECK: return{{$}} -; CHECK-NEXT: BB20_4: +; CHECK-NEXT: .LBB20_4: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB20_8{{$}} +; CHECK: br_if {{[^,]*}}, 2{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB20_7{{$}} -; CHECK-NEXT: BB20_6: +; CHECK: br_if {{[^,]*}}, 1{{$}} +; CHECK-NEXT: .LBB20_6: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block ; CHECK: return{{$}} -; CHECK-NEXT: BB20_7: +; CHECK-NEXT: .LBB20_7: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block ; CHECK: return{{$}} -; CHECK-NEXT: BB20_8: +; CHECK-NEXT: .LBB20_8: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block ; CHECK: return{{$}} ; OPT-LABEL: test11: -; OPT: block BB20_8{{$}} -; OPT-NEXT: block BB20_4{{$}} -; OPT-NEXT: br_if $0, BB20_4{{$}} +; OPT: block{{$}} +; OPT-NEXT: block{{$}} +; OPT-NEXT: br_if $0, 0{{$}} +; OPT-NEXT: block{{$}} ; OPT-NOT: block -; OPT: block BB20_3{{$}} -; OPT: br_if $0, BB20_3{{$}} +; OPT: br_if $0, 0{{$}} ; OPT-NOT: block -; OPT: br_if $0, BB20_8{{$}} -; OPT-NEXT: BB20_3: +; OPT: br_if $0, 2{{$}} +; OPT-NEXT: .LBB20_3: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block ; OPT: return{{$}} -; OPT-NEXT: BB20_4: +; OPT-NEXT: .LBB20_4: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block -; OPT: block BB20_6{{$}} +; OPT: block{{$}} ; OPT-NOT: block -; OPT: br_if $pop9, BB20_6{{$}} +; OPT: br_if $pop9, 0{{$}} ; OPT-NOT: block ; OPT: return{{$}} -; OPT-NEXT: BB20_6: +; OPT-NEXT: .LBB20_6: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block -; OPT: br_if $0, BB20_8{{$}} +; OPT: br_if $0, 0{{$}} ; OPT-NOT: block ; OPT: return{{$}} -; OPT-NEXT: BB20_8: +; OPT-NEXT: .LBB20_8: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block ; OPT: return{{$}} define void @test11() { @@ -985,53 +1028,59 @@ bb8: } ; CHECK-LABEL: test12: -; CHECK: BB21_1: -; CHECK-NEXT: loop BB21_8{{$}} +; CHECK: .LBB21_1: +; CHECK-NEXT: loop{{$}} ; CHECK-NOT: block -; CHECK: block BB21_7{{$}} -; CHECK-NEXT: block BB21_6{{$}} -; CHECK-NEXT: block BB21_4{{$}} -; CHECK: br_if {{[^,]*}}, BB21_4{{$}} +; CHECK: block{{$}} +; CHECK-NEXT: block{{$}} +; CHECK-NEXT: block{{$}} +; CHECK: br_if {{[^,]*}}, 0{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB21_7{{$}} +; CHECK: br_if {{[^,]*}}, 2{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB21_7{{$}} -; CHECK-NEXT: br BB21_6{{$}} -; CHECK-NEXT: BB21_4: +; CHECK: br_if {{[^,]*}}, 2{{$}} +; CHECK-NEXT: br 1{{$}} +; CHECK-NEXT: .LBB21_4: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB21_7{{$}} +; CHECK: br_if {{[^,]*}}, 1{{$}} ; CHECK-NOT: block -; CHECK: br_if {{[^,]*}}, BB21_7{{$}} -; CHECK-NEXT: BB21_6: +; CHECK: br_if {{[^,]*}}, 1{{$}} +; CHECK-NEXT: .LBB21_6: +; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: return{{$}} -; CHECK-NEXT: BB21_7: +; CHECK-NEXT: .LBB21_7: +; CHECK-NEXT: end_block{{$}} ; CHECK-NOT: block -; CHECK: br BB21_1{{$}} -; CHECK-NEXT: BB21_8: +; CHECK: br 0{{$}} +; CHECK-NEXT: .LBB21_8: ; OPT-LABEL: test12: -; OPT: BB21_1: -; OPT-NEXT: loop BB21_8{{$}} +; OPT: .LBB21_1: +; OPT-NEXT: loop{{$}} ; OPT-NOT: block -; OPT: block BB21_7{{$}} -; OPT-NEXT: block BB21_6{{$}} -; OPT-NEXT: block BB21_4{{$}} -; OPT: br_if {{[^,]*}}, BB21_4{{$}} +; OPT: block{{$}} +; OPT-NEXT: block{{$}} +; OPT-NEXT: block{{$}} +; OPT: br_if {{[^,]*}}, 0{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB21_7{{$}} +; OPT: br_if {{[^,]*}}, 2{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB21_7{{$}} -; OPT-NEXT: br BB21_6{{$}} -; OPT-NEXT: BB21_4: +; OPT: br_if {{[^,]*}}, 2{{$}} +; OPT-NEXT: br 1{{$}} +; OPT-NEXT: .LBB21_4: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB21_7{{$}} +; OPT: br_if {{[^,]*}}, 1{{$}} ; OPT-NOT: block -; OPT: br_if {{[^,]*}}, BB21_7{{$}} -; OPT-NEXT: BB21_6: +; OPT: br_if {{[^,]*}}, 1{{$}} +; OPT-NEXT: .LBB21_6: +; OPT-NEXT: end_block{{$}} ; OPT-NEXT: return{{$}} -; OPT-NEXT: BB21_7: +; OPT-NEXT: .LBB21_7: +; OPT-NEXT: end_block{{$}} ; OPT-NOT: block -; OPT: br BB21_1{{$}} -; OPT-NEXT: BB21_8: +; OPT: br 0{{$}} +; OPT-NEXT: .LBB21_8: define void @test12(i8* %arg) { bb: br label %bb1 @@ -1060,30 +1109,34 @@ bb7: ; optnone to disable optimizations to test this case. ; CHECK-LABEL: test13: -; CHECK-NEXT: .local i32{{$}} -; CHECK: block BB22_2{{$}} -; CHECK: br_if $pop4, BB22_2{{$}} +; CHECK-NEXT: local i32{{$}} +; CHECK: block{{$}} +; CHECK: br_if $pop4, 0{{$}} ; CHECK-NEXT: return{{$}} -; CHECK-NEXT: BB22_2: -; CHECK: block BB22_4{{$}} -; CHECK-NEXT: br_if $0, BB22_4{{$}} -; CHECK: BB22_4: -; CHECK: block BB22_5{{$}} -; CHECK: br_if $pop6, BB22_5{{$}} -; CHECK-NEXT: BB22_5: +; CHECK-NEXT: .LBB22_2: +; CHECK-NEXT: end_block{{$}} +; CHECK: block{{$}} +; CHECK-NEXT: br_if $0, 0{{$}} +; CHECK: .LBB22_4: +; CHECK-NEXT: end_block{{$}} +; CHECK: block{{$}} +; CHECK: br_if $pop6, 0{{$}} +; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: unreachable{{$}} ; OPT-LABEL: test13: -; OPT-NEXT: .local i32{{$}} -; OPT: block BB22_2{{$}} -; OPT: br_if $pop4, BB22_2{{$}} +; OPT-NEXT: local i32{{$}} +; OPT: block{{$}} +; OPT: br_if $pop4, 0{{$}} ; OPT-NEXT: return{{$}} -; OPT-NEXT: BB22_2: -; OPT: block BB22_4{{$}} -; OPT-NEXT: br_if $0, BB22_4{{$}} -; OPT: BB22_4: -; OPT: block BB22_5{{$}} -; OPT: br_if $pop6, BB22_5{{$}} -; OPT-NEXT: BB22_5: +; OPT-NEXT: .LBB22_2: +; OPT-NEXT: end_block{{$}} +; OPT: block{{$}} +; OPT-NEXT: br_if $0, 0{{$}} +; OPT: .LBB22_4: +; OPT-NEXT: end_block{{$}} +; OPT: block{{$}} +; OPT: br_if $pop6, 0{{$}} +; OPT-NEXT: end_block{{$}} ; OPT-NEXT: unreachable{{$}} define void @test13() noinline optnone { bb: @@ -1100,3 +1153,65 @@ bb4: bb5: ret void } + +; Test a case with a single-block loop that has another loop +; as a successor. The end_loop for the first loop should go +; before the loop for the second. + +; CHECK-LABEL: test14: +; CHECK-NEXT: local i32{{$}} +; CHECK-NEXT: i32.const $0=, 0{{$}} +; CHECK-NEXT: .LBB23_1:{{$}} +; CHECK-NEXT: loop{{$}} +; CHECK-NEXT: br_if $0, 0{{$}} +; CHECK-NEXT: .LBB23_2:{{$}} +; CHECK-NEXT: end_loop{{$}} +; CHECK-NEXT: loop{{$}} +; CHECK-NEXT: br_if $0, 0{{$}} +; CHECK-NEXT: end_loop{{$}} +; CHECK-NEXT: return{{$}} +define void @test14() { +bb: + br label %bb1 + +bb1: + %tmp = bitcast i1 undef to i1 + br i1 %tmp, label %bb3, label %bb1 + +bb3: + br label %bb4 + +bb4: + br i1 undef, label %bb7, label %bb48 + +bb7: + br i1 undef, label %bb12, label %bb12 + +bb12: + br i1 undef, label %bb17, label %bb17 + +bb17: + br i1 undef, label %bb22, label %bb22 + +bb22: + br i1 undef, label %bb27, label %bb27 + +bb27: + br i1 undef, label %bb30, label %bb30 + +bb30: + br i1 undef, label %bb35, label %bb35 + +bb35: + br i1 undef, label %bb38, label %bb38 + +bb38: + br i1 undef, label %bb48, label %bb48 + +bb48: + %tmp49 = bitcast i1 undef to i1 + br i1 %tmp49, label %bb3, label %bb50 + +bb50: + ret void +} diff --git a/test/CodeGen/WebAssembly/comparisons_f32.ll b/test/CodeGen/WebAssembly/comparisons_f32.ll index 6df37ea1c6dd..2d324f7f2083 100644 --- a/test/CodeGen/WebAssembly/comparisons_f32.ll +++ b/test/CodeGen/WebAssembly/comparisons_f32.ll @@ -3,7 +3,7 @@ ; Test that basic 32-bit floating-point comparison operations assemble as ; expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: ord_f32: diff --git a/test/CodeGen/WebAssembly/comparisons_f64.ll b/test/CodeGen/WebAssembly/comparisons_f64.ll index f5acc64b667c..22fbc1ae4c1f 100644 --- a/test/CodeGen/WebAssembly/comparisons_f64.ll +++ b/test/CodeGen/WebAssembly/comparisons_f64.ll @@ -3,7 +3,7 @@ ; Test that basic 64-bit floating-point comparison operations assemble as ; expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: ord_f64: diff --git a/test/CodeGen/WebAssembly/comparisons_i32.ll b/test/CodeGen/WebAssembly/comparisons_i32.ll index b724cec1cc63..db81ef36e270 100644 --- a/test/CodeGen/WebAssembly/comparisons_i32.ll +++ b/test/CodeGen/WebAssembly/comparisons_i32.ll @@ -2,7 +2,7 @@ ; Test that basic 32-bit integer comparison operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: eq_i32: diff --git a/test/CodeGen/WebAssembly/comparisons_i64.ll b/test/CodeGen/WebAssembly/comparisons_i64.ll index 898591999bec..19e5cf8603bf 100644 --- a/test/CodeGen/WebAssembly/comparisons_i64.ll +++ b/test/CodeGen/WebAssembly/comparisons_i64.ll @@ -2,7 +2,7 @@ ; Test that basic 64-bit integer comparison operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: eq_i64: diff --git a/test/CodeGen/WebAssembly/conv.ll b/test/CodeGen/WebAssembly/conv.ll index e1acaca2c9ec..1a4bd72d72d6 100644 --- a/test/CodeGen/WebAssembly/conv.ll +++ b/test/CodeGen/WebAssembly/conv.ll @@ -2,7 +2,7 @@ ; Test that basic conversion operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: i32_wrap_i64: diff --git a/test/CodeGen/WebAssembly/copysign-casts.ll b/test/CodeGen/WebAssembly/copysign-casts.ll index 760e49133018..f8e50d043ca9 100644 --- a/test/CodeGen/WebAssembly/copysign-casts.ll +++ b/test/CodeGen/WebAssembly/copysign-casts.ll @@ -3,7 +3,7 @@ ; DAGCombiner oddly folds casts into the rhs of copysign. Test that they get ; unfolded. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare double @copysign(double, double) nounwind readnone diff --git a/test/CodeGen/WebAssembly/cpus.ll b/test/CodeGen/WebAssembly/cpus.ll index 2b77c5f475c8..51856fcd12c2 100644 --- a/test/CodeGen/WebAssembly/cpus.ll +++ b/test/CodeGen/WebAssembly/cpus.ll @@ -1,13 +1,13 @@ ; This tests that llc accepts all valid WebAssembly CPUs. -; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s -; RUN: llc < %s -mtriple=wasm64-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s -; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s -; RUN: llc < %s -mtriple=wasm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s -; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s -; RUN: llc < %s -mtriple=wasm64-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s -; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID -; RUN: llc < %s -mtriple=wasm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID +; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s +; RUN: llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s +; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s +; RUN: llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s +; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s +; RUN: llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s +; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID +; RUN: llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID ; CHECK-NOT: {{.*}} is not a recognized processor for this target ; INVALID: {{.*}} is not a recognized processor for this target diff --git a/test/CodeGen/WebAssembly/dead-vreg.ll b/test/CodeGen/WebAssembly/dead-vreg.ll index b03e1569fde6..29a41990961d 100644 --- a/test/CodeGen/WebAssembly/dead-vreg.ll +++ b/test/CodeGen/WebAssembly/dead-vreg.ll @@ -2,7 +2,7 @@ ; Check that unused vregs aren't assigned registers. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" define void @foo(i32* nocapture %a, i32 %w, i32 %h) { diff --git a/test/CodeGen/WebAssembly/f32.ll b/test/CodeGen/WebAssembly/f32.ll index 777010064cdb..c32a7c3dc7d9 100644 --- a/test/CodeGen/WebAssembly/f32.ll +++ b/test/CodeGen/WebAssembly/f32.ll @@ -2,7 +2,7 @@ ; Test that basic 32-bit floating-point operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare float @llvm.fabs.f32(float) @@ -146,7 +146,7 @@ define float @fmax32(float %x) { } ; CHECK-LABEL: fma32: -; CHECK: {{^}} f32.call $push0=, fmaf, $0, $1, $2{{$}} +; CHECK: {{^}} f32.call $push0=, fmaf@FUNCTION, $0, $1, $2{{$}} ; CHECK-NEXT: return $pop0{{$}} define float @fma32(float %a, float %b, float %c) { %d = call float @llvm.fma.f32(float %a, float %b, float %c) diff --git a/test/CodeGen/WebAssembly/f64.ll b/test/CodeGen/WebAssembly/f64.ll index 302ee79389b3..92284999cbf7 100644 --- a/test/CodeGen/WebAssembly/f64.ll +++ b/test/CodeGen/WebAssembly/f64.ll @@ -2,7 +2,7 @@ ; Test that basic 64-bit floating-point operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare double @llvm.fabs.f64(double) @@ -146,7 +146,7 @@ define double @fmax64(double %x) { } ; CHECK-LABEL: fma64: -; CHECK: {{^}} f64.call $push0=, fma, $0, $1, $2{{$}} +; CHECK: {{^}} f64.call $push0=, fma@FUNCTION, $0, $1, $2{{$}} ; CHECK-NEXT: return $pop0{{$}} define double @fma64(double %a, double %b, double %c) { %d = call double @llvm.fma.f64(double %a, double %b, double %c) diff --git a/test/CodeGen/WebAssembly/fast-isel.ll b/test/CodeGen/WebAssembly/fast-isel.ll index 07d78c1415e5..7f9f20fa7083 100644 --- a/test/CodeGen/WebAssembly/fast-isel.ll +++ b/test/CodeGen/WebAssembly/fast-isel.ll @@ -2,7 +2,7 @@ ; RUN: -fast-isel -fast-isel-abort=1 -verify-machineinstrs \ ; RUN: | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; This tests very minimal fast-isel functionality. diff --git a/test/CodeGen/WebAssembly/frem.ll b/test/CodeGen/WebAssembly/frem.ll index 688370313b48..b8c80fbe6997 100644 --- a/test/CodeGen/WebAssembly/frem.ll +++ b/test/CodeGen/WebAssembly/frem.ll @@ -2,13 +2,13 @@ ; Test that the frem instruction works. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: frem32: ; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .result f32{{$}} -; CHECK-NEXT: {{^}} f32.call $push0=, fmodf, $0, $1{{$}} +; CHECK-NEXT: {{^}} f32.call $push0=, fmodf@FUNCTION, $0, $1{{$}} ; CHECK-NEXT: return $pop0{{$}} define float @frem32(float %x, float %y) { %a = frem float %x, %y @@ -18,7 +18,7 @@ define float @frem32(float %x, float %y) { ; CHECK-LABEL: frem64: ; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .result f64{{$}} -; CHECK-NEXT: {{^}} f64.call $push0=, fmod, $0, $1{{$}} +; CHECK-NEXT: {{^}} f64.call $push0=, fmod@FUNCTION, $0, $1{{$}} ; CHECK-NEXT: return $pop0{{$}} define double @frem64(double %x, double %y) { %a = frem double %x, %y diff --git a/test/CodeGen/WebAssembly/func.ll b/test/CodeGen/WebAssembly/func.ll index 6f42dc744ac7..9857dadee414 100644 --- a/test/CodeGen/WebAssembly/func.ll +++ b/test/CodeGen/WebAssembly/func.ll @@ -2,11 +2,12 @@ ; Test that basic functions assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: f0: ; CHECK: return{{$}} +; CHECK: .endfunc{{$}} ; CHECK: .size f0, define void @f0() { ret void diff --git a/test/CodeGen/WebAssembly/global.ll b/test/CodeGen/WebAssembly/global.ll index 5f149ed067c8..85fe5c896565 100644 --- a/test/CodeGen/WebAssembly/global.ll +++ b/test/CodeGen/WebAssembly/global.ll @@ -2,7 +2,7 @@ ; Test that globals assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-NOT: llvm.used @@ -21,7 +21,7 @@ define i32 @foo() { ; CHECK-LABEL: call_memcpy: ; CHECK-NEXT: .param i32, i32, i32{{$}} ; CHECK-NEXT: .result i32{{$}} -; CHECK-NEXT: call memcpy, $0, $1, $2{{$}} +; CHECK-NEXT: call memcpy@FUNCTION, $0, $1, $2{{$}} ; CHECK-NEXT: return $0{{$}} declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { @@ -29,15 +29,15 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { ret i8* %p } -; CHECK: .type g,@object +; CHECK: .type .Lg,@object ; CHECK: .align 2{{$}} -; CHECK-NEXT: g: +; CHECK-NEXT: .Lg: ; CHECK-NEXT: .int32 1337{{$}} -; CHECK-NEXT: .size g, 4{{$}} +; CHECK-NEXT: .size .Lg, 4{{$}} @g = private global i32 1337 ; CHECK-LABEL: ud: -; CHECK-NEXT: .zero 4{{$}} +; CHECK-NEXT: .skip 4{{$}} ; CHECK-NEXT: .size ud, 4{{$}} @ud = internal global i32 undef @@ -73,7 +73,7 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { ; CHECK: .type ud64,@object ; CHECK: .align 3{{$}} ; CHECK-NEXT: ud64: -; CHECK-NEXT: .zero 8{{$}} +; CHECK-NEXT: .skip 8{{$}} ; CHECK-NEXT: .size ud64, 8{{$}} @ud64 = internal global i64 undef @@ -102,7 +102,7 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { ; CHECK: .type f32ud,@object ; CHECK: .align 2{{$}} ; CHECK-NEXT: f32ud: -; CHECK-NEXT: .zero 4{{$}} +; CHECK-NEXT: .skip 4{{$}} ; CHECK-NEXT: .size f32ud, 4{{$}} @f32ud = internal global float undef @@ -131,7 +131,7 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { ; CHECK: .type f64ud,@object ; CHECK: .align 3{{$}} ; CHECK-NEXT: f64ud: -; CHECK-NEXT: .zero 8{{$}} +; CHECK-NEXT: .skip 8{{$}} ; CHECK-NEXT: .size f64ud, 8{{$}} @f64ud = internal global double undef @@ -172,6 +172,6 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { ; CHECK: .globl rom{{$}} ; CHECK: .align 4{{$}} ; CHECK: rom: -; CHECK: .zero 512{{$}} +; CHECK: .skip 512{{$}} ; CHECK: .size rom, 512{{$}} @rom = constant [128 x i32] zeroinitializer, align 16 diff --git a/test/CodeGen/WebAssembly/globl.ll b/test/CodeGen/WebAssembly/globl.ll index a5dc028c1db4..91d3ade4666b 100644 --- a/test/CodeGen/WebAssembly/globl.ll +++ b/test/CodeGen/WebAssembly/globl.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK: .globl foo diff --git a/test/CodeGen/WebAssembly/i32.ll b/test/CodeGen/WebAssembly/i32.ll index ab29b0472bf2..10d97ad9e6d1 100644 --- a/test/CodeGen/WebAssembly/i32.ll +++ b/test/CodeGen/WebAssembly/i32.ll @@ -2,7 +2,7 @@ ; Test that basic 32-bit integer operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare i32 @llvm.ctlz.i32(i32, i1) diff --git a/test/CodeGen/WebAssembly/i64.ll b/test/CodeGen/WebAssembly/i64.ll index 769f74266754..6dd46a91fad0 100644 --- a/test/CodeGen/WebAssembly/i64.ll +++ b/test/CodeGen/WebAssembly/i64.ll @@ -2,7 +2,7 @@ ; Test that basic 64-bit integer operations assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare i64 @llvm.ctlz.i64(i64, i1) diff --git a/test/CodeGen/WebAssembly/ident.ll b/test/CodeGen/WebAssembly/ident.ll index 1e0dc2aa6725..49c188ec2578 100644 --- a/test/CodeGen/WebAssembly/ident.ll +++ b/test/CodeGen/WebAssembly/ident.ll @@ -2,7 +2,7 @@ ; Test llvm.ident. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK: .ident "hello world" diff --git a/test/CodeGen/WebAssembly/immediates.ll b/test/CodeGen/WebAssembly/immediates.ll index abab11f2254e..735b386b4fc0 100644 --- a/test/CodeGen/WebAssembly/immediates.ll +++ b/test/CodeGen/WebAssembly/immediates.ll @@ -2,7 +2,7 @@ ; Test that basic immediates assemble as expected. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: zero_i32: diff --git a/test/CodeGen/WebAssembly/inline-asm.ll b/test/CodeGen/WebAssembly/inline-asm.ll index fc066c4b812f..f35042e64f86 100644 --- a/test/CodeGen/WebAssembly/inline-asm.ll +++ b/test/CodeGen/WebAssembly/inline-asm.ll @@ -1,8 +1,9 @@ -; RUN: llc < %s -asm-verbose=false | FileCheck %s +; RUN: llc < %s -asm-verbose=false -no-integrated-as | FileCheck %s -; Test basic inline assembly. +; Test basic inline assembly. Pass -no-integrated-as since these aren't +; actually valid assembly syntax. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: foo: diff --git a/test/CodeGen/WebAssembly/legalize.ll b/test/CodeGen/WebAssembly/legalize.ll index e780b2ee36ca..5feb2e8c8c75 100644 --- a/test/CodeGen/WebAssembly/legalize.ll +++ b/test/CodeGen/WebAssembly/legalize.ll @@ -2,7 +2,7 @@ ; Test various types and operators that need to be legalized. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: shl_i3: diff --git a/test/CodeGen/WebAssembly/load-ext.ll b/test/CodeGen/WebAssembly/load-ext.ll index 0ffcd38a8666..d52df3361a38 100644 --- a/test/CodeGen/WebAssembly/load-ext.ll +++ b/test/CodeGen/WebAssembly/load-ext.ll @@ -2,7 +2,7 @@ ; Test that extending loads are assembled properly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: sext_i8_i32: diff --git a/test/CodeGen/WebAssembly/load-store-i1.ll b/test/CodeGen/WebAssembly/load-store-i1.ll index 37b514729479..47e2e8cb254f 100644 --- a/test/CodeGen/WebAssembly/load-store-i1.ll +++ b/test/CodeGen/WebAssembly/load-store-i1.ll @@ -2,7 +2,7 @@ ; Test that i1 extending loads and truncating stores are assembled properly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: load_u_i1_i32: diff --git a/test/CodeGen/WebAssembly/load.ll b/test/CodeGen/WebAssembly/load.ll index aa8ae689e0d1..243fa9d50ad6 100644 --- a/test/CodeGen/WebAssembly/load.ll +++ b/test/CodeGen/WebAssembly/load.ll @@ -2,7 +2,7 @@ ; Test that basic loads are assembled properly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: ldi32: diff --git a/test/CodeGen/WebAssembly/loop-idiom.ll b/test/CodeGen/WebAssembly/loop-idiom.ll index 2906df20a229..2a233c406900 100644 --- a/test/CodeGen/WebAssembly/loop-idiom.ll +++ b/test/CodeGen/WebAssembly/loop-idiom.ll @@ -1,6 +1,6 @@ ; RUN: opt -loop-idiom -S < %s -march=wasm32 | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" diff --git a/test/CodeGen/WebAssembly/memory-addr32.ll b/test/CodeGen/WebAssembly/memory-addr32.ll index e2dd556bddc0..e6c15633fd63 100644 --- a/test/CodeGen/WebAssembly/memory-addr32.ll +++ b/test/CodeGen/WebAssembly/memory-addr32.ll @@ -2,7 +2,7 @@ ; Test that basic memory operations assemble as expected with 32-bit addresses. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare i32 @llvm.wasm.memory.size.i32() nounwind readonly diff --git a/test/CodeGen/WebAssembly/memory-addr64.ll b/test/CodeGen/WebAssembly/memory-addr64.ll index 5de1f2b11cfd..d504c277f306 100644 --- a/test/CodeGen/WebAssembly/memory-addr64.ll +++ b/test/CodeGen/WebAssembly/memory-addr64.ll @@ -2,7 +2,7 @@ ; Test that basic memory operations assemble as expected with 64-bit addresses. -target datalayout = "e-p:64:64-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128" target triple = "wasm64-unknown-unknown" declare i64 @llvm.wasm.memory.size.i64() nounwind readonly diff --git a/test/CodeGen/WebAssembly/offset-folding.ll b/test/CodeGen/WebAssembly/offset-folding.ll index 2b4e8a90b0f0..159a25eba358 100644 --- a/test/CodeGen/WebAssembly/offset-folding.ll +++ b/test/CodeGen/WebAssembly/offset-folding.ll @@ -2,7 +2,7 @@ ; Test that constant offsets can be folded into global addresses. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; FIXME: make this 'external' and make sure it still works. WebAssembly diff --git a/test/CodeGen/WebAssembly/offset.ll b/test/CodeGen/WebAssembly/offset.ll index 901801d7dbbe..828f40206a96 100644 --- a/test/CodeGen/WebAssembly/offset.ll +++ b/test/CodeGen/WebAssembly/offset.ll @@ -2,7 +2,7 @@ ; Test constant load and store address offsets. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; With an nuw add, we can fold an offset. diff --git a/test/CodeGen/WebAssembly/phi.ll b/test/CodeGen/WebAssembly/phi.ll index bae8a7c9e3b8..00e5859b75cf 100644 --- a/test/CodeGen/WebAssembly/phi.ll +++ b/test/CodeGen/WebAssembly/phi.ll @@ -2,7 +2,7 @@ ; Test that phis are lowered. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; Basic phi triangle. @@ -25,7 +25,7 @@ done: ; Swap phis. ; CHECK-LABEL: test1: -; CHECK: BB1_1: +; CHECK: .LBB1_1: ; CHECK: copy_local $[[NUM0:[0-9]+]]=, $[[NUM1:[0-9]+]]{{$}} ; CHECK: copy_local $[[NUM1]]=, $[[NUM2:[0-9]+]]{{$}} ; CHECK: copy_local $[[NUM2]]=, $[[NUM0]]{{$}} diff --git a/test/CodeGen/WebAssembly/reg-stackify.ll b/test/CodeGen/WebAssembly/reg-stackify.ll index 1c1b1e193f7a..f8cae7f92404 100644 --- a/test/CodeGen/WebAssembly/reg-stackify.ll +++ b/test/CodeGen/WebAssembly/reg-stackify.ll @@ -2,7 +2,7 @@ ; Test the register stackifier pass. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; No because of pointer aliasing. @@ -55,7 +55,7 @@ define i32 @yes1(i32* %q) { ; CHECK-NEXT: .local i32, i32{{$}} ; CHECK-NEXT: i32.const $5=, 2{{$}} ; CHECK-NEXT: i32.const $4=, 1{{$}} -; CHECK-NEXT: block BB4_2{{$}} +; CHECK-NEXT: block{{$}} ; CHECK-NEXT: i32.lt_s $push0=, $0, $4{{$}} ; CHECK-NEXT: i32.lt_s $push1=, $1, $5{{$}} ; CHECK-NEXT: i32.xor $push4=, $pop0, $pop1{{$}} @@ -64,10 +64,11 @@ define i32 @yes1(i32* %q) { ; CHECK-NEXT: i32.xor $push5=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.xor $push6=, $pop4, $pop5{{$}} ; CHECK-NEXT: i32.ne $push7=, $pop6, $4{{$}} -; CHECK-NEXT: br_if $pop7, BB4_2{{$}} +; CHECK-NEXT: br_if $pop7, 0{{$}} ; CHECK-NEXT: i32.const $push8=, 0{{$}} ; CHECK-NEXT: return $pop8{{$}} -; CHECK-NEXT: BB4_2: +; CHECK-NEXT: .LBB4_2: +; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: return $4{{$}} define i32 @stack_uses(i32 %x, i32 %y, i32 %z, i32 %w) { entry: @@ -89,16 +90,17 @@ false: ; be trivially stackified. ; CHECK-LABEL: multiple_uses: -; CHECK-NEXT: .param i32, i32, i32{{$}} -; CHECK-NEXT: .local i32{{$}} +; CHECK-NEXT: .param i32, i32, i32{{$}} +; CHECK-NEXT: .local i32{{$}} ; CHECK-NEXT: i32.load $3=, 0($2){{$}} -; CHECK-NEXT: block BB5_3{{$}} +; CHECK-NEXT: block{{$}} ; CHECK-NEXT: i32.ge_u $push0=, $3, $1{{$}} -; CHECK-NEXT: br_if $pop0, BB5_3{{$}} +; CHECK-NEXT: br_if $pop0, 0{{$}} ; CHECK-NEXT: i32.lt_u $push1=, $3, $0{{$}} -; CHECK-NEXT: br_if $pop1, BB5_3{{$}} +; CHECK-NEXT: br_if $pop1, 0{{$}} ; CHECK-NEXT: i32.store $discard=, 0($2), $3{{$}} -; CHECK-NEXT: BB5_3: +; CHECK-NEXT: .LBB5_3: +; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: return{{$}} define void @multiple_uses(i32* %arg0, i32* %arg1, i32* %arg2) nounwind { bb: diff --git a/test/CodeGen/WebAssembly/return-int32.ll b/test/CodeGen/WebAssembly/return-int32.ll index 663cef4e459d..a93a0f6c438b 100644 --- a/test/CodeGen/WebAssembly/return-int32.ll +++ b/test/CodeGen/WebAssembly/return-int32.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: return_i32: diff --git a/test/CodeGen/WebAssembly/return-void.ll b/test/CodeGen/WebAssembly/return-void.ll index 4933bfcb87e6..65ff5f325719 100644 --- a/test/CodeGen/WebAssembly/return-void.ll +++ b/test/CodeGen/WebAssembly/return-void.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: return_void: diff --git a/test/CodeGen/WebAssembly/returned.ll b/test/CodeGen/WebAssembly/returned.ll index e208e198c73d..9c892bb3ecea 100644 --- a/test/CodeGen/WebAssembly/returned.ll +++ b/test/CodeGen/WebAssembly/returned.ll @@ -2,14 +2,14 @@ ; Test that the "returned" attribute is optimized effectively. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: _Z3foov: ; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: i32.const $push0=, 1{{$}} -; CHECK-NEXT: {{^}} i32.call $push1=, _Znwm, $pop0{{$}} -; CHECK-NEXT: {{^}} i32.call $push2=, _ZN5AppleC1Ev, $pop1{{$}} +; CHECK-NEXT: {{^}} i32.call $push1=, _Znwm@FUNCTION, $pop0{{$}} +; CHECK-NEXT: {{^}} i32.call $push2=, _ZN5AppleC1Ev@FUNCTION, $pop1{{$}} ; CHECK-NEXT: return $pop2{{$}} %class.Apple = type { i8 } declare noalias i8* @_Znwm(i32) @@ -25,7 +25,7 @@ entry: ; CHECK-LABEL: _Z3barPvS_l: ; CHECK-NEXT: .param i32, i32, i32{{$}} ; CHECK-NEXT: .result i32{{$}} -; CHECK-NEXT: {{^}} i32.call $push0=, memcpy, $0, $1, $2{{$}} +; CHECK-NEXT: {{^}} i32.call $push0=, memcpy@FUNCTION, $0, $1, $2{{$}} ; CHECK-NEXT: return $pop0{{$}} declare i8* @memcpy(i8* returned, i8*, i32) define i8* @_Z3barPvS_l(i8* %p, i8* %s, i32 %n) { @@ -38,7 +38,7 @@ entry: ; CHECK-LABEL: test_constant_arg: ; CHECK-NEXT: i32.const $push0=, global{{$}} -; CHECK-NEXT: {{^}} i32.call $discard=, returns_arg, $pop0{{$}} +; CHECK-NEXT: {{^}} i32.call $discard=, returns_arg@FUNCTION, $pop0{{$}} ; CHECK-NEXT: return{{$}} @global = external global i32 @addr = global i32* @global diff --git a/test/CodeGen/WebAssembly/select.ll b/test/CodeGen/WebAssembly/select.ll index 1b1d7aed7154..416f58cac0d3 100644 --- a/test/CodeGen/WebAssembly/select.ll +++ b/test/CodeGen/WebAssembly/select.ll @@ -3,7 +3,7 @@ ; Test that wasm select instruction is selected from LLVM select instruction. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: select_i32_bool: diff --git a/test/CodeGen/WebAssembly/signext-zeroext.ll b/test/CodeGen/WebAssembly/signext-zeroext.ll index 40d49af0ccc7..f6f56363c1af 100644 --- a/test/CodeGen/WebAssembly/signext-zeroext.ll +++ b/test/CodeGen/WebAssembly/signext-zeroext.ll @@ -2,7 +2,7 @@ ; Test zeroext and signext ABI keywords -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: z2s_func: @@ -32,7 +32,7 @@ define zeroext i8 @s2z_func(i8 signext %t) { ; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 255{{$}} ; CHECK-NEXT: i32.and $push[[NUM1:[0-9]+]]=, $0, $pop[[NUM0]]{{$}} -; CHECK-NEXT: call $push[[NUM2:[0-9]+]]=, z2s_func, $pop[[NUM1]]{{$}} +; CHECK-NEXT: call $push[[NUM2:[0-9]+]]=, z2s_func@FUNCTION, $pop[[NUM1]]{{$}} ; CHECK-NEXT: return $pop[[NUM2]]{{$}} define i32 @z2s_call(i32 %t) { %s = trunc i32 %t to i8 @@ -48,7 +48,7 @@ define i32 @z2s_call(i32 %t) { ; CHECK-NEXT: i32.const $[[NUM0:[0-9]+]]=, 24{{$}} ; CHECK-NEXT: i32.shl $push[[NUM1:[0-9]+]]=, $0, $[[NUM0]]{{$}} ; CHECK-NEXT: i32.shr_s $push[[NUM2:[0-9]+]]=, $pop[[NUM1]], $[[NUM0]]{{$}} -; CHECK-NEXT: call $push[[NUM3:[0-9]]]=, s2z_func, $pop[[NUM2]]{{$}} +; CHECK-NEXT: call $push[[NUM3:[0-9]]]=, s2z_func@FUNCTION, $pop[[NUM2]]{{$}} ; CHECK-NEXT: i32.shl $push[[NUM4:[0-9]+]]=, $pop[[NUM3]], $[[NUM0]]{{$}} ; CHECK-NEXT: i32.shr_s $push[[NUM5:[0-9]+]]=, $pop[[NUM4]], $[[NUM0]]{{$}} ; CHECK-NEXT: return $pop[[NUM5]]{{$}} diff --git a/test/CodeGen/WebAssembly/store-results.ll b/test/CodeGen/WebAssembly/store-results.ll index 73479e544db9..ae74133fe386 100644 --- a/test/CodeGen/WebAssembly/store-results.ll +++ b/test/CodeGen/WebAssembly/store-results.ll @@ -3,7 +3,7 @@ ; Test that the wasm-store-results pass makes users of stored values use the ; result of store expressions to reduce get_local/set_local traffic. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: single_block: diff --git a/test/CodeGen/WebAssembly/store-trunc.ll b/test/CodeGen/WebAssembly/store-trunc.ll index c12b716dfd59..d069af1da7bc 100644 --- a/test/CodeGen/WebAssembly/store-trunc.ll +++ b/test/CodeGen/WebAssembly/store-trunc.ll @@ -2,7 +2,7 @@ ; Test that truncating stores are assembled properly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: trunc_i8_i32: diff --git a/test/CodeGen/WebAssembly/store.ll b/test/CodeGen/WebAssembly/store.ll index 442caedef3a7..dc93ebbbadb4 100644 --- a/test/CodeGen/WebAssembly/store.ll +++ b/test/CodeGen/WebAssembly/store.ll @@ -2,7 +2,7 @@ ; Test that basic stores are assembled properly. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: sti32: diff --git a/test/CodeGen/WebAssembly/switch.ll b/test/CodeGen/WebAssembly/switch.ll index 7f6f6efff7d6..3df5e7f9cf6f 100644 --- a/test/CodeGen/WebAssembly/switch.ll +++ b/test/CodeGen/WebAssembly/switch.ll @@ -3,7 +3,7 @@ ; Test switch instructions. Block placement is disabled because it reorders ; the blocks in a way that isn't interesting here. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare void @foo0() @@ -14,27 +14,27 @@ declare void @foo4() declare void @foo5() ; CHECK-LABEL: bar32: -; CHECK: block BB0_8{{$}} -; CHECK: block BB0_7{{$}} -; CHECK: block BB0_6{{$}} -; CHECK: block BB0_5{{$}} -; CHECK: block BB0_4{{$}} -; CHECK: block BB0_3{{$}} -; CHECK: block BB0_2{{$}} -; CHECK: tableswitch {{[^,]*}}, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_5, BB0_6, BB0_7{{$}} -; CHECK: BB0_2: -; CHECK: call foo0 -; CHECK: BB0_3: -; CHECK: call foo1 -; CHECK: BB0_4: -; CHECK: call foo2 -; CHECK: BB0_5: -; CHECK: call foo3 -; CHECK: BB0_6: -; CHECK: call foo4 -; CHECK: BB0_7: -; CHECK: call foo5 -; CHECK: BB0_8: +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: tableswitch {{[^,]*}}, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5{{$}} +; CHECK: .LBB0_2: +; CHECK: call foo0@FUNCTION{{$}} +; CHECK: .LBB0_3: +; CHECK: call foo1@FUNCTION{{$}} +; CHECK: .LBB0_4: +; CHECK: call foo2@FUNCTION{{$}} +; CHECK: .LBB0_5: +; CHECK: call foo3@FUNCTION{{$}} +; CHECK: .LBB0_6: +; CHECK: call foo4@FUNCTION{{$}} +; CHECK: .LBB0_7: +; CHECK: call foo5@FUNCTION{{$}} +; CHECK: .LBB0_8: ; CHECK: return{{$}} define void @bar32(i32 %n) { entry: @@ -94,27 +94,27 @@ sw.epilog: ; preds = %entry, %sw.bb.5, %s } ; CHECK-LABEL: bar64: -; CHECK: block BB1_8{{$}} -; CHECK: block BB1_7{{$}} -; CHECK: block BB1_6{{$}} -; CHECK: block BB1_5{{$}} -; CHECK: block BB1_4{{$}} -; CHECK: block BB1_3{{$}} -; CHECK: block BB1_2{{$}} -; CHECK: tableswitch {{[^,]*}}, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_5, BB1_6, BB1_7{{$}} -; CHECK: BB1_2: -; CHECK: call foo0 -; CHECK: BB1_3: -; CHECK: call foo1 -; CHECK: BB1_4: -; CHECK: call foo2 -; CHECK: BB1_5: -; CHECK: call foo3 -; CHECK: BB1_6: -; CHECK: call foo4 -; CHECK: BB1_7: -; CHECK: call foo5 -; CHECK: BB1_8: +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: block{{$}} +; CHECK: tableswitch {{[^,]*}}, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5{{$}} +; CHECK: .LBB1_2: +; CHECK: call foo0@FUNCTION{{$}} +; CHECK: .LBB1_3: +; CHECK: call foo1@FUNCTION{{$}} +; CHECK: .LBB1_4: +; CHECK: call foo2@FUNCTION{{$}} +; CHECK: .LBB1_5: +; CHECK: call foo3@FUNCTION{{$}} +; CHECK: .LBB1_6: +; CHECK: call foo4@FUNCTION{{$}} +; CHECK: .LBB1_7: +; CHECK: call foo5@FUNCTION{{$}} +; CHECK: .LBB1_8: ; CHECK: return{{$}} define void @bar64(i64 %n) { entry: diff --git a/test/CodeGen/WebAssembly/unreachable.ll b/test/CodeGen/WebAssembly/unreachable.ll index 414767e5c35d..7b23bf3cecfb 100644 --- a/test/CodeGen/WebAssembly/unreachable.ll +++ b/test/CodeGen/WebAssembly/unreachable.ll @@ -4,7 +4,7 @@ ; Test that LLVM unreachable instruction and trap intrinsic are lowered to ; wasm unreachable -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" declare void @llvm.trap() @@ -12,7 +12,7 @@ declare void @llvm.debugtrap() declare void @abort() ; CHECK-LABEL: f1: -; CHECK: call abort +; CHECK: call abort@FUNCTION{{$}} ; CHECK: unreachable define i32 @f1() { call void @abort() diff --git a/test/CodeGen/WebAssembly/unused-argument.ll b/test/CodeGen/WebAssembly/unused-argument.ll index e7851b216cb4..00dea769ee86 100644 --- a/test/CodeGen/WebAssembly/unused-argument.ll +++ b/test/CodeGen/WebAssembly/unused-argument.ll @@ -2,7 +2,7 @@ ; Make sure that argument offsets are correct even if some arguments are unused. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: unused_first: @@ -22,7 +22,7 @@ define i32 @unused_second(i32 %x, i32 %y) { } ; CHECK-LABEL: call_something: -; CHECK-NEXT: {{^}} i32.call $discard=, return_something{{$}} +; CHECK-NEXT: {{^}} i32.call $discard=, return_something@FUNCTION{{$}} ; CHECK-NEXT: return{{$}} declare i32 @return_something() define void @call_something() { diff --git a/test/CodeGen/WebAssembly/userstack.ll b/test/CodeGen/WebAssembly/userstack.ll index 6e01e36cf9fa..cc50192b66db 100644 --- a/test/CodeGen/WebAssembly/userstack.ll +++ b/test/CodeGen/WebAssembly/userstack.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -asm-verbose=false -fast-isel | FileCheck %s -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: alloca32: @@ -72,6 +72,27 @@ define void @allocarray() { ret void } +define void @allocarray_inbounds() { + ; CHECK: i32.const [[L1:.+]]=, __stack_pointer + ; CHECK-NEXT: i32.load [[L1]]=, 0([[L1]]) + ; CHECK-NEXT: i32.const [[L2:.+]]=, 32 + ; CHECK-NEXT: i32.sub [[SP:.+]]=, [[L1]], [[L2]] + %r = alloca [5 x i32] + ; CHECK: i32.const $push[[L3:.+]]=, 1 + ; CHECK: i32.store {{.*}}=, 12([[SP]]), $pop[[L3]] + %p = getelementptr inbounds [5 x i32], [5 x i32]* %r, i32 0, i32 0 + store i32 1, i32* %p + ; This store should have both the GEP and the FI folded into it. + ; CHECK-NEXT: i32.store {{.*}}=, 16([[SP]]), $pop + %p2 = getelementptr inbounds [5 x i32], [5 x i32]* %r, i32 0, i32 1 + store i32 1, i32* %p2 + ; CHECK: i32.const [[L7:.+]]=, 32 + ; CHECK-NEXT: i32.add [[SP]]=, [[SP]], [[L7]] + ; CHECK-NEXT: i32.const [[L8:.+]]=, __stack_pointer + ; CHECK-NEXT: i32.store [[SP]]=, 0([[L7]]), [[SP]] + ret void +} + define void @dynamic_alloca(i32 %alloc) { ; TODO: Support frame pointers ;%r = alloca i32, i32 %alloc diff --git a/test/CodeGen/WebAssembly/varargs.ll b/test/CodeGen/WebAssembly/varargs.ll index c564d9420742..c12264625c37 100644 --- a/test/CodeGen/WebAssembly/varargs.ll +++ b/test/CodeGen/WebAssembly/varargs.ll @@ -2,7 +2,7 @@ ; Test varargs constructs. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; Test va_start. @@ -103,7 +103,7 @@ entry: declare void @callee(...) ; CHECK-LABEL: caller_none: -; CHECK-NEXT: call callee{{$}} +; CHECK-NEXT: call callee@FUNCTION{{$}} ; CHECK-NEXT: return{{$}} define void @caller_none() { call void (...) @callee() diff --git a/test/CodeGen/WebAssembly/vtable.ll b/test/CodeGen/WebAssembly/vtable.ll index 38298bc474b5..739ba2aaf5a5 100644 --- a/test/CodeGen/WebAssembly/vtable.ll +++ b/test/CodeGen/WebAssembly/vtable.ll @@ -11,7 +11,7 @@ ; struct D : public B; ; Each with a virtual dtor and method foo. -target datalayout = "e-p:32:32-i64:64-n32:64-S128" +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" %struct.A = type { i32 (...)** } |