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path: root/sys/amd64/include/apicvar.h
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* Move <machine/apicvar.h> to <x86/apicvar.h>.John Baldwin2014-01-231-224/+0
* Move constants for indices in the local APIC's local vector table fromJohn Baldwin2013-12-091-9/+0
* Implement vector callback for PVHVM and unify event channel implementationsJustin T. Gibbs2013-08-291-0/+1
* Refactor timer management code with priority to one-shot operation mode.Alexander Motin2010-09-131-2/+1
* Implement new event timers infrastructure. It provides unified APIs forAlexander Motin2010-06-201-7/+0
* Add support for corrected machine check interrupts. CMCI is a new localJohn Baldwin2010-05-241-4/+8
* - Implement MI helper functions, dividing one or two timer interrupts withAlexander Motin2010-05-241-2/+1
* Add a handler for the local APIC error interrupt. For now it just printsJohn Baldwin2010-03-291-2/+3
* Improving the clocks auto-tunning by firstly checking if the atrtc may beAttilio Rao2010-03-031-1/+1
* Handling all the three clocks (hardclock, softclock, profclock) with theAttilio Rao2010-01-151-1/+7
* Adjust the handling of the local APIC PMC interrupt vector:John Baldwin2009-08-141-0/+3
* * Completely Remove the option STOP_NMI from the kernel. This optionAttilio Rao2009-08-131-5/+1
* Add support for using i8254 and rtc timers as event sources for amd64 SMPAlexander Motin2009-05-021-1/+4
* Initial suspend/resume support for amd64.Jung-uk Kim2009-03-171-0/+1
* - Allocate apic vectors on a per-cpu basis. This allows us to allocateJeff Roberson2009-01-291-6/+9
* Add constants for fields in the local APIC error status register and aJohn Baldwin2008-12-111-0/+1
* Handle CPUs with APIC IDs higher than 32 (at least one IBM server usesJohn Baldwin2007-05-081-0/+1
* Minor fixes and tweaks to the x86 interrupt code:John Baldwin2007-05-081-0/+1
* Add a new apic0 psuedo-device to claim memory resources for the memoryJohn Baldwin2007-03-201-0/+2
* Use vm_paddr_t rather than uintptr_t when passing the physical address ofJohn Baldwin2007-03-051-2/+2
* Newer versions of gcc don't support treating structures passed by valueKip Macy2006-12-171-2/+2
* MD support for PCI Message Signalled Interrupts on amd64 and i386:John Baldwin2006-11-131-0/+1
* Change the x86 interrupt code to suspend/resume interrupt controllersJohn Baldwin2006-10-101-1/+1
* Add a new 'pmap_invalidate_cache()' to flush the CPU caches via theJohn Baldwin2006-05-011-2/+3
* Rework how we wire up interrupt sources to CPUs:John Baldwin2006-02-281-1/+0
* Tweak how the MD code calls the fooclock() methods some. Instead ofJohn Baldwin2005-12-221-1/+1
* MFi386:John Baldwin2005-12-081-1/+1
* Change the x86 code to allocate IDT vectors on-demand when an interruptJohn Baldwin2005-11-021-2/+3
* Add IPI support for preempting a thread on another CPU.Stephan Uphoff2005-06-091-1/+2
* MFi386: use the lapic timer for UP systems that are using the apic so thatPeter Wemm2005-04-151-1/+0
* MFi386: Bring over John's local apic timer codePeter Wemm2005-02-281-4/+4
* JumboMFi386: use bitmapped IPI handler. Update elcr and default mptablePeter Wemm2005-01-211-11/+48
* MFi386: various io apic cleanupsPeter Wemm2004-07-081-0/+7
* Kill the LAZYPMAP ifdefs. While they worked, they didn't do anythingPeter Wemm2004-05-161-1/+0
* MFi386: numerous interrupt and acpi updatesPeter Wemm2004-05-161-4/+8
* Initial landing of SMP support for FreeBSD/amd64.Peter Wemm2003-11-171-1/+3
* Whitespace nit (sorry, couldn't help it)Peter Wemm2003-11-141-1/+1
* Shuffle the APIC interrupt vectors around a bit:John Baldwin2003-11-141-11/+13
* Fix a typo.John Baldwin2003-11-131-1/+1
* - Move manipulation of td_intr_nesting_level out of assembly interruptJohn Baldwin2003-11-121-0/+1
* New APIC support code:John Baldwin2003-11-031-0/+165
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