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* vmm: add tunable to trap WBINVDCorvin Köhne2022-05-301-0/+18
* vmm: fix set but not used warningsRobert Wing2022-04-101-6/+6
* vmm: fix "set but not used" warningsRobert Wing2022-02-281-2/+2
* bhyve: add support for MTRRCorvin Köhne2022-01-142-6/+13
* Create sys/reg.h for the common code previously in machine/reg.hAndrew Turner2021-08-301-1/+1
* vmm: Make iommu ops tables constMark Johnston2021-08-091-12/+12
* amd64: Fix output operand specs for the stmxcsr and vmread intrinsicsMark Johnston2021-08-091-3/+2
* Convert vmm_ops calls to IFUNCPeter Grehan2020-11-282-44/+58
* vmm: Make pmap_invalidate_ept() wait synchronously for guest exitsMark Johnston2020-11-111-1/+4
* vmx: Implement pmap (de)activation in CMark Johnston2020-10-194-61/+33
* Clear the upper 32-bits of registers in x86_emulate_cpuid().John Baldwin2020-10-011-8/+4
* bhyve: do not permit write access to VMCB / VMCSEd Maste2020-09-151-0/+4
* amd64: clean up empty lines in .c and .h filesMateusz Guzik2020-09-013-5/+5
* Add bhyve support for LA57 guest mode.Konstantin Belousov2020-08-231-4/+8
* amd64 pmap: LA57 AKA 5-level pagingKonstantin Belousov2020-08-231-1/+1
* Export a routine to provide the TSC_AUX MSR value and use this in vmm.Peter Grehan2020-08-181-5/+5
* Support guest rdtscp and rdpid instructions on Intel VT-xPeter Grehan2020-08-184-1/+164
* Initial support for bhyve save and restore.John Baldwin2020-05-053-1/+300
* Untangle TPR shadowing and APIC virtualization.Michael Reifenberger2020-03-101-17/+74
* Mark more nodes as CTLFLAG_MPSAFE or CTLFLAG_NEEDGIANT (4 of many)Pawel Biernacki2020-02-152-3/+7
* Support software breakpoints in the debug server on Intel CPUs.John Baldwin2019-12-133-18/+48
* Correct the scope of several global variables.Mark Johnston2019-09-271-2/+2
* Use designated initializers for vmm_ops.Mark Johnston2019-08-071-16/+16
* vmx: use C99 bool, not boolean_tEd Maste2019-08-012-20/+11
* Implement VT-d capability detection on chipsets that have multipleScott Long2019-06-191-18/+104
* Add accessor function for vm->maxcpusRodney W. Grimes2019-04-251-2/+6
* Fix missed posted interrupts in VT-x in bhyve.John Baldwin2019-03-011-4/+55
* Trim whitespace at EoL, use tabs instead of spaces for indent.Konstantin Belousov2019-01-171-10/+10
* Align IA32_ARCH_CAP MSR definitions and use with SDM rev. 068.Konstantin Belousov2018-11-161-1/+2
* Provide basic descriptions for VMX exit reason (from "Intel 64 and IA-32Yuri Pankov2018-10-271-0/+8
* Fully restore the GDTR, IDTR, and LDTR after VT-x VM exits.John Baldwin2018-10-111-0/+22
* Handle a guest executing a vm instruction by trapping and raising anAndrew Turner2018-09-271-0/+16
* Update L1TF workaround to sustain L1D pollution from NMI.Konstantin Belousov2018-08-192-40/+40
* Provide part of the mitigation for L1TF-VMM.Konstantin Belousov2018-08-143-2/+57
* Add SPDX tags to vmm(4).Marcelo Araujo2018-06-131-0/+2
* Cleanups related to debug exceptions on x86.John Baldwin2018-05-221-2/+3
* Add SDT probes to vmexit on Intel.Tycho Nightingale2018-04-131-0/+109
* Add a way to temporarily suspend and resume virtual CPUs.John Baldwin2018-04-061-0/+6
* Fix a lock recursion introduced in r327065.Tycho Nightingale2018-03-071-4/+10
* Provide further mitigation against CVE-2017-5715 by flushing theTycho Nightingale2018-02-123-22/+84
* Save and restore guest debug registers.John Baldwin2018-01-172-8/+102
* PTI for amd64.Konstantin Belousov2018-01-171-1/+2
* Provide some mitigation against CVE-2017-5715 by clearing registersTycho Nightingale2018-01-151-0/+16
* Recognize a pending virtual interrupt while emulating the halt instruction.Tycho Nightingale2017-12-211-4/+24
* sys/amd64: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-2712-0/+24
* Save KGSBASE in pcb before overriding it with the guest value.Konstantin Belousov2017-08-241-1/+4
* vmm(4): Small spelling fixes.Pedro F. Giffuni2016-05-031-1/+1
* Restructure memory allocation in bhyve to support "devmem".Neel Natu2015-06-181-1/+1
* Support guest writes to the TSC by enabling the "use TSC offsetting"Tycho Nightingale2015-06-093-4/+26
* Fix non-deterministic delays when accessing a vcpu that was in "running" orNeel Natu2015-05-281-3/+9
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