| Commit message (Collapse) | Author | Age | Files | Lines |
| |
|
|
|
|
| |
Reviewed by: imp, jhb
Approved by: imp (mentor)
Differential Revision: https://reviews.freebsd.org/D50913
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
I found the '1AH_MxxH_ROOT' PCI device IDs in the Linux "AMD K8
Northbridge" driver [1][5]. Since Family 19h (Zen3, Zen4) uses the same
registers as Family 17h (Zen1, Zen2), I tried using those same registers
for Family 1Ah (Zen5) as well, and they worked.
I pulled the 1Ah model ranges from Linux as well [2][3][4][6].
Added some additional logging under 'bootverbose', and used a local
variable and macro for the stepping, rather than repeatedly using the
mask directly.
Consistently report the CPUID (family, model, stepping) using two,
zero-padded, un-prefixed, uppercase nybbles, with an 'h' suffix. This is
the format used in documentation and in Linux.
My own testing with various models of Zen4 EPYC 9xx4 ("Genoa") shows
that their CPUID models are in the range 0x10 .. 0x1f. Similar testing
with various models of Zen5 EPYC 9xx5 ("Turin") shows that their CPUID
models are in the range 0x00 ... 0x2f.
[1] 2023-08-10: https://github.com/torvalds/linux/commit/c640166
[2] 2024-01-23: https://github.com/torvalds/linux/commit/3e4147f
[3] 2024-01-25: https://github.com/torvalds/linux/commit/b9328fd
[4] 2024-04-24: https://github.com/torvalds/linux/commit/2718a7f
[5] 2024-07-28: https://github.com/torvalds/linux/commit/59c3400
[6] 2024-07-30: https://github.com/torvalds/linux/commit/bf5641e
Sponsored by: Vdura
MFC after: 3 days
Reviewed by: delphij
Differential Revision: https://reviews.freebsd.org/D50278
|
| |
|
|
|
|
|
| |
Zen 5 support, tested on Ryzen 7 9700X
PR: 284010
MFC after: 1 week
|
| |
|
|
|
|
|
| |
Tested on AMD 5700G
PR: 284009
MFC after: 1 week
|
| |
|
|
|
| |
PR: 281962
MFC after: 2 weeks
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
Adds support for AMD Ryzen 7 "Phoenix" processors (family 0x19,
model 0x70-0x7f) to the amdsmn(4) and amdtemp(4) drivers. This
enables temperature readings of these CPUs via sysctl.
The sensors function identically to those for the "Raphael" processors
(model 0x60-0x6f); only the PCI device ID differs.
PR: kern/280942
Relnotes: yes
MFC after: 3 days
|
| |
|
|
| |
Sponsored by: Netflix
|
| |
|
|
|
|
| |
No functional change intended.
MFC after: 1 week
|
| |
|
|
|
|
|
|
| |
Tested on AMD Threadripper 7960X.
PR: kern/278311
Tested by: jbo
MFC after: 1 week
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Apply the following automated changes to try to eliminate
no-longer-needed sys/cdefs.h includes as well as now-empty
blank lines in a row.
Remove /^#if.*\n#endif.*\n#include\s+<sys/cdefs.h>.*\n/
Remove /\n+#include\s+<sys/cdefs.h>.*\n+#if.*\n#endif.*\n+/
Remove /\n+#if.*\n#endif.*\n+/
Remove /^#if.*\n#endif.*\n/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/types.h>/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/param.h>/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/capsicum.h>/
Sponsored by: Netflix
|
| |
|
|
| |
Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
|
| |
|
|
| |
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
|
| |
|
|
|
|
|
|
|
| |
Zen 4 support, tested on Ryzen 9 7900
Reviewed by: imp (previous version), mhorne
Approved by: mhorne
Obtained from: http://jyurai.ddo.jp/~amorita/diary/?date=20221102#p01
Differential Revision: https://reviews.freebsd.org/D41049
|
| | |
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
Zen 3 "Vermeer" support, tested on Ryzen 9 5950X.
Model numbers from https://en.wikichip.org/wiki/amd/cpuid "Extended
Model" column.
Submitted by: Greg V <greg AT unrelenting.technology>
Differential Revision: https://reviews.freebsd.org/D27552
Notes:
svn path=/head/; revision=368586
|
| |
|
|
|
|
|
|
|
| |
PR: 249864
Reported by: Florian Millet <florian.millet AT laposte.net>
Tested by: Florian Millet
Notes:
svn path=/head/; revision=366136
|
| |
|
|
|
|
|
|
|
|
| |
Probe Family 17h CPUs for up to 4 (Zen, Zen+) or 8 (Zen2) CCD temperature
sensors. These were discovered by Ondrej Čerman
(https://github.com/ocerman) and collaborators experimentally, and are not
currently documented in any datasheet I have access to.
Notes:
svn path=/head/; revision=357190
|
| |
|
|
|
|
|
|
| |
PR: 239607
Reported by: "drclaw" <drclaw AT gmail.com>
Notes:
svn path=/head/; revision=350624
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Family 15h is a bit of an oddball. Early models used the same temperature
register and spec (mostly[1]) as earlier CPU families.
Model 60h-6Fh and 70-7Fh use something more like Family 17h's Service
Management Network, communicating with it in a similar fashion. To support
them, add support for their version of SMU indirection to amdsmn(4) and use
it in amdtemp(4) on these models.
While here, clarify some of the deviceid macros in amdtemp(4) that were
added with arbitrary, incorrect family numbers, and remove ones that were
not used. Additionally, clarify intent and condition of heterogenous
multi-socket system detection.
[1]: 15h adds the "adjust range by -49°C if a certain condition is met,"
which previous families did not have.
Reported by: D. C. <tjoard AT gmail.com>
PR: 234657
Tested by: D. C. <tjoard AT gmail.com>
Notes:
svn path=/head/; revision=342977
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
As reported, tested, and patch supplied by Johannes.
There may be future work to do to support multiple sensors, but for now, any
sensor at all is a strict improvement for Ryzen 2 systems.
PR: 228480
Submitted by: Johannes Lundberg <johalun0 AT gmail.com> (earlier version)
Reported by: deischen@, Johannes, and numerous others
MFC after: 3.72 days
Notes:
svn path=/head/; revision=340425
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Remove unused and easy to misuse PNP macro parameter
Inspired by r338025, just remove the element size parameter to the
MODULE_PNP_INFO macro entirely. The 'table' parameter is now required to
have correct pointer (or array) type. Since all invocations of the macro
already had this property and the emitted PNP data continues to include the
element size, there is no functional change.
Mostly done with the coccinelle 'spatch' tool:
$ cat modpnpsize0.cocci
@normaltables@
identifier b,c;
expression a,d,e;
declarer MODULE_PNP_INFO;
@@
MODULE_PNP_INFO(a,b,c,d,
-sizeof(d[0]),
e);
@singletons@
identifier b,c,d;
expression a;
declarer MODULE_PNP_INFO;
@@
MODULE_PNP_INFO(a,b,c,&d,
-sizeof(d),
1);
$ rg -l MODULE_PNP_INFO -- sys | \
xargs spatch --in-place --sp-file modpnpsize0.cocci
(Note that coccinelle invokes diff(1) via a PATH search and expects diff to
tolerate the -B flag, which BSD diff does not. So I had to link gdiff into
PATH as diff to use spatch.)
Tinderbox'd (-DMAKE_JUST_KERNELS).
Approved by: re (glen)
Notes:
svn path=/head/; revision=338948
|
| |
|
|
|
|
|
|
|
|
| |
I was not aware Warner was making or planning to make forward progress in
this area and have since been informed of that.
It's easy to apply/reapply when churn dies down.
Notes:
svn path=/head/; revision=338037
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Inspired by r338025, just remove the element size parameter to the
MODULE_PNP_INFO macro entirely. The 'table' parameter is now required to
have correct pointer (or array) type. Since all invocations of the macro
already had this property and the emitted PNP data continues to include the
element size, there is no functional change.
Mostly done with the coccinelle 'spatch' tool:
$ cat modpnpsize0.cocci
@normaltables@
identifier b,c;
expression a,d,e;
declarer MODULE_PNP_INFO;
@@
MODULE_PNP_INFO(a,b,c,d,
-sizeof(d[0]),
e);
@singletons@
identifier b,c,d;
expression a;
declarer MODULE_PNP_INFO;
@@
MODULE_PNP_INFO(a,b,c,&d,
-sizeof(d),
1);
$ rg -l MODULE_PNP_INFO -- sys | \
xargs spatch --in-place --sp-file modpnpsize0.cocci
(Note that coccinelle invokes diff(1) via a PATH search and expects diff to
tolerate the -B flag, which BSD diff does not. So I had to link gdiff into
PATH as diff to use spatch.)
Tinderbox'd (-DMAKE_JUST_KERNELS).
Notes:
svn path=/head/; revision=338035
|
| |
|
|
|
|
|
|
|
|
|
|
| |
An eventual devd(8) or other component should be able to scan buses and
automatically load drivers that match device ids described in this metadata.
Reviewed by: imp
Sponsored by: Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D12364
Notes:
svn path=/head/; revision=323586
|
| |
|
|
|
|
|
|
|
|
|
| |
Similar to r323195, but for amdsmn(4) driver (which borrowed some design).
Ignore hostbs that do not match our PCI device id criteria.
Sponsored by: Dell EMC Isilon
Notes:
svn path=/head/; revision=323196
|
|
|
AMD Family 17h CPUs have an internal network used to communicate between
the host CPU and the PSP and SMU coprocessors. It exposes a simple
32-bit register space.
Reviewed by: avg (no +1), mjoras, truckman
Sponsored by: Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D12217
Notes:
svn path=/head/; revision=323184
|