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* When user_frac in the polling subsystem is low it is going to busy theAttilio Rao2009-05-301-12/+19
* For RTL8139C+ controllers, have controller handle padding shortPyun YongHyeon2009-04-201-4/+6
* Partial revert r185756.Pyun YongHyeon2009-03-311-0/+2
* remove now-redunant cardbus attachment lines.Warner Losh2009-03-091-1/+0
* Add a new tunable hw.re.prefer_iomap which disables memory registerPyun YongHyeon2009-03-091-13/+25
* Allocating 2 MSI messages do not seem to work on certain controllersPyun YongHyeon2009-02-111-1/+2
* Reclaim transmitted frames in re_tick(). This is for PCIePyun YongHyeon2009-02-091-1/+8
* - Add support for 8110SCe part. Some magic registers were taken fromJung-uk Kim2009-01-201-19/+39
* Retire RL_FLAG_INVMAR bit to match its comment and reality.Jung-uk Kim2009-01-201-11/+9
* - Do not read and write RX configuration register multiple times.Jung-uk Kim2009-01-201-66/+31
* Sometimes RTL8168B seems to take long time to access GMII registersPyun YongHyeon2009-01-191-4/+4
* Since we don't request reset for rlphy(4), the link state 'UP'Pyun YongHyeon2008-12-221-0/+2
* It seems that RealTek PCIe controllers require an explicit Tx pollPyun YongHyeon2008-12-171-10/+15
* For RTL8168C SPIN2 controllers, make sure to take the controllerPyun YongHyeon2008-12-171-1/+28
* Make WOL work on RTL8168B. This controller seems to requirePyun YongHyeon2008-12-111-0/+5
* Don't access undocumented register 0x82 on controllers thatPyun YongHyeon2008-12-111-2/+14
* Newer RealTek controllers requires setting stop request bit toPyun YongHyeon2008-12-111-3/+9
* Always put controller into known state before device intialization.Pyun YongHyeon2008-12-111-7/+5
* Partly revert r185756. RTL8169SC doesn't like reduced delays inPyun YongHyeon2008-12-111-2/+2
* Reduce spin wait time consumed in GMII register access routines.Pyun YongHyeon2008-12-081-4/+2
* o Implemented miibus_statchg handler. It detects whether re(4)Pyun YongHyeon2008-12-081-28/+51
* Make sure to return the result of meida change request.Pyun YongHyeon2008-12-081-2/+3
* Add 8168D support.Pyun YongHyeon2008-12-021-1/+3
* Read ethernet address from ID registers for RTL8102E/RTL8102EL asPyun YongHyeon2008-09-061-1/+2
* Fix VLAN hardware tag insertion/stripping on big-endianPyun YongHyeon2008-08-131-2/+2
* Rearrange conditional compilation directives. This makes syntaxPyun YongHyeon2008-08-041-2/+3
* Remove return keyword at the end of functions that return void.Pyun YongHyeon2008-08-041-14/+0
* Remove register keyword.Pyun YongHyeon2008-08-041-4/+4
* Use ANSI C declarations for all functions.Pyun YongHyeon2008-08-041-104/+41
* Don't enable TSO by default. Users of RTL8169/8110 reportedPyun YongHyeon2008-08-041-0/+7
* The number of bits reserved for MSS in RealTek controllers isPyun YongHyeon2008-08-041-0/+18
* Add driver support for RTL8102E and RTL8102EL which is the secondPyun YongHyeon2008-07-091-1/+8
* Disable jumbo frame support for RTL810x fast ethernet controllers.Pyun YongHyeon2008-07-091-1/+2
* Add a new RTL8169 variant, 8169SB(L)/8110SB(L).Pyun YongHyeon2008-07-021-1/+3
* Add basic support for RTL8168C, RTL8168CP, RTL8111C and RTL8111CP.Pyun YongHyeon2008-07-021-42/+133
* Display detected chip revision in device attach. This will help toPyun YongHyeon2008-07-021-2/+5
* If MSI is not active make sure to disable MSI in EEPROM.Pyun YongHyeon2008-07-021-0/+11
* In device detach don't access ifnet structure unless device isPyun YongHyeon2008-07-021-4/+4
* Toggling IFF_ALLMULTI flag does not require full interfacePyun YongHyeon2008-07-021-1/+1
* Instead of allocating variables for each events/hardware flags, usePyun YongHyeon2008-07-021-47/+41
* Switch to memory space register mapping over IO space. If thatPyun YongHyeon2008-07-021-21/+21
* While accessing EEPROM command register use pre-defined constantPyun YongHyeon2008-07-021-3/+3
* After the change of r176757 re(4) no longer relys on readingPyun YongHyeon2008-07-021-32/+18
* Remove duplicated H/W revision check.Pyun YongHyeon2008-07-021-5/+0
* Don't touch MSI enable bit in RL_CFG2 register. For unknown reasonPyun YongHyeon2008-04-151-12/+6
* Padding more bytes than necessary one broke another variants ofPyun YongHyeon2008-03-311-1/+1
* In revision 1.70, 1.71 and 1.84 re(4) tried to workaround checksumPyun YongHyeon2008-03-281-12/+14
* MSI handling on some RealTek chips are broken so disable it byPyun YongHyeon2008-03-231-1/+1
* For MSI capable hardwares, enable MSI enable bit in RL_CFG2Pyun YongHyeon2008-03-231-0/+13
* Some RealTek chips are known to be buggy on DAC handling, soPyun YongHyeon2008-03-231-1/+6
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