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path: root/sys/riscv/include/riscvreg.h
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* sys: Remove $FreeBSD$: two-line .h patternWarner Losh2023-08-161-2/+0
* riscv: Add support for enabling SV48 modeMark Johnston2022-03-011-3/+3
* riscv: improve exception code namingMitchell Horne2020-10-241-17/+15
* Fix EXCP_MASK to include all relevant bits from scause.John Baldwin2020-02-051-2/+1
* Fix 64-bit value of SSTATUS_SD to use an unsigned long.John Baldwin2020-01-311-3/+6
* Fix definition of SSTATUS_SDMitchell Horne2020-01-291-2/+5
* Optimize RISC-V copyin(9)/copyout(9) routines.Mark Johnston2019-01-211-1/+2
* RISC-V: Add macros for reading performance counter CSRs.Mark Johnston2018-11-131-0/+19
* Add support for 'C'-compressed ISA extension to DTrace FBT provider.Ruslan Bukin2018-09-031-4/+25
* Remove unused code.Ruslan Bukin2018-08-141-7/+0
* o Add driver for PLIC (Platform-Level Interrupt Controller) device.Ruslan Bukin2018-06-121-0/+2
* Support for v1.10 (latest) of RISC-V privilege specification.Ruslan Bukin2017-08-101-2/+14
* Add full softfloat and hardfloat support for RISC-V.Ruslan Bukin2016-11-161-2/+6
* o Remove operation in machine mode.Ruslan Bukin2016-08-101-16/+0
* Update RISC-V port to Privileged Architecture Version 1.9.Ruslan Bukin2016-08-021-51/+90
* Remove duplicate define.Ruslan Bukin2016-06-081-1/+0
* Add initial DTrace support for RISC-V.Ruslan Bukin2016-05-241-0/+5
* Add the non-standard "IO interrupt" vector used by lowRISC.Ruslan Bukin2016-04-261-1/+3
* Add support for ddb(4).Ruslan Bukin2016-03-101-3/+4
* Add support for symmetric multiprocessing (SMP).Ruslan Bukin2016-02-241-8/+17
* Correct RISC-V exception types.Ruslan Bukin2016-01-181-4/+6
* Import RISC-V machine headers. This is a minimal set required to compileRuslan Bukin2015-12-171-0/+153
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