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* intel_idpgtbl: use FORALL macro for page walkDoug Moore2025-04-181-3/+7
* amd_idpgtbl: use iterator instead of vm_page_nextDoug Moore2025-04-181-1/+4
* x86/amdiommu: add amdiommu_is_running()Konstantin Belousov2025-04-012-0/+10
* x86/dmar: add dmar_is_running()Konstantin Belousov2025-04-012-0/+11
* amdiommu: fix typo in the bit descriptionKonstantin Belousov2025-03-031-1/+1
* amdiommu: add register definitions from IOMMU spec 48882 rev. 3.10Konstantin Belousov2025-03-021-0/+18
* amd iommu: remove unused functionKonstantin Belousov2024-12-151-6/+0
* amdiommu: correctly initialize iommu.unitKonstantin Belousov2024-12-071-2/+1
* dmar: set acpi ivar domain on identify()Konstantin Belousov2024-11-261-29/+31
* amdiommu: use static array for device table base register offsetsJason A. Harmening2024-11-261-4/+15
* amdiommu: Fix device table segment base register offsetsJason A. Harmening2024-11-261-1/+1
* amdiommu: short-circuit all amdiommu_find_unit() functionsKonstantin Belousov2024-11-091-1/+10
* amdiommu: hide HPET report under verboseKonstantin Belousov2024-11-091-2/+3
* iommu: Clean up a lingering function prototypeMark Johnston2024-11-041-1/+0
* amdiommu: print more domain information from ddb showKonstantin Belousov2024-11-031-4/+2
* iommu: eliminate iommu_free_ctx()Konstantin Belousov2024-11-038-49/+0
* x86/iommu/amd_reg.h: fix typo in commentKonstantin Belousov2024-11-031-1/+1
* AMD IOMMU driverKonstantin Belousov2024-11-027-0/+3557
* x86/iommu/amd_reg.h: AMD IOMMU registers definitionsKonstantin Belousov2024-11-021-0/+746
* DMAR: handle affinity for in-memory data structuresKonstantin Belousov2024-10-234-7/+63
* devices: report iommu data for the device in the dev. sysctl treeKonstantin Belousov2024-10-173-3/+30
* iommu: extract driver-independent ddb context and mapping reportingKonstantin Belousov2024-10-133-23/+42
* iommu: move context link and ref count into device-independent partsKonstantin Belousov2024-10-135-71/+75
* iommu_qi_seq_processed: use atomic to read hw-written seq numberKonstantin Belousov2024-10-031-2/+2
* dmar: on unmap, postpone freeing page table pages after the invalidation is doneKonstantin Belousov2024-09-271-13/+18
* iommu: extend iommu_map_entry to store the list of associated freed page tabl...Konstantin Belousov2024-09-273-7/+15
* iommu: change iommu_domain_map_ops to take iommu_map_entryKonstantin Belousov2024-09-272-7/+12
* iommu: add per-unit sysctls reporting the state of DMA and interrupt remappingKonstantin Belousov2024-09-272-1/+6
* intel_idpgtbl.c: rename domain_* functions to dmar_*Konstantin Belousov2024-09-273-39/+39
* x86: always provide dummy x86_iommu virtual methodsKonstantin Belousov2024-09-051-2/+50
* dmar: avoid excessive indirection in KASSERT() in domain_map_buf()Konstantin Belousov2024-09-041-1/+1
* busdma_iommu: indirect dmar-specific method calls in iommu_get_dev_ctx()Konstantin Belousov2024-09-043-0/+15
* DMAR: provide hw.iommu.ir alias for the hw.dmar.ir tunableKonstantin Belousov2024-09-041-0/+1
* DMAR: move hw.iommu.dmar.{tbl_pagecnt,batch_coalesce} sysctls up one levelKonstantin Belousov2024-09-045-9/+11
* x86 iommu: move page level related functions to common utilsKonstantin Belousov2024-09-045-75/+78
* x86 dmar: generalize dmar_domain_free_entry() into iommu_domain_free_entry()Konstantin Belousov2024-09-044-17/+19
* x86 iommu: move device_tag_init() to utilsKonstantin Belousov2024-09-043-20/+20
* x86 iommu: move DMAR-independent parts of the interrupt setup code into commonKonstantin Belousov2024-09-046-140/+193
* x86 iommu x86_unit_common: expand hw completion write-out area to 8 bytesKonstantin Belousov2024-09-042-4/+10
* DMAR: rename domain_{alloc,free}_pgtbl to domain_domain_$1_pgtblKonstantin Belousov2024-09-043-6/+6
* dmar_qi_emit(): use atomic_store_64() when availableKonstantin Belousov2024-09-041-0/+10
* dmar_qi_XXX_invalidate_glob(): reduce code duplicationKonstantin Belousov2024-09-041-24/+14
* x86 iommu: move DMAR-independent parts of the qi code into commonKonstantin Belousov2024-09-046-298/+413
* x86: allow to have more than one kind of IOMMUKonstantin Belousov2024-09-046-23/+173
* DMAR: use DMAR2IOMMU() for DMAR_LOCK() and related macrosKonstantin Belousov2024-09-041-3/+3
* Intel DMAR: improve X2X macros to fix failures in certain syntax contextsKonstantin Belousov2024-09-041-3/+3
* DMAR: clear dmar_devs[unit] if attach failedKonstantin Belousov2024-08-211-0/+11
* Revert "x86: Enable Intel DMAR by default"Ed Maste2024-08-201-2/+1
* x86: Enable Intel DMAR by defaultEd Maste2024-08-131-1/+2
* DMAR pagetables pages: handle ref_count special referencesKonstantin Belousov2024-07-151-10/+12
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