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path: root/sys/x86/pci/qpi.c
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* newbus: replace leftover device unit wildcardsAhmad Khalifa2025-06-211-1/+1
* Replace calls to bus_generic_attach with bus_attach_childrenJohn Baldwin2024-12-061-2/+4
* newbus: replace -1 in BUS_ADD_CHILD(...-1) with DEVICE_UNIT_ANYWarner Losh2024-07-251-1/+1
* newbus: globally replace device_add_child(..., -1) with DEVICE_UNIT_ANYWarner Losh2024-07-251-1/+1
* Retire unused non-PCI_RES_BUS codeJessica Clarke2024-07-181-9/+0
* Retire non-NEW_PCIB code and remove config optionJessica Clarke2024-07-181-2/+2
* x86: Use pci_domain_[de]activate_bus for PCI_RES_BUS resourcesJohn Baldwin2024-01-231-1/+3
* pci_cfgreg: Add a PCI domain argument to the low-level register APIJohn Baldwin2023-11-291-1/+1
* sys: Automated cleanup of cdefs and other formattingWarner Losh2023-11-271-1/+0
* sys: Remove $FreeBSD$: one-line .c patternWarner Losh2023-08-161-2/+0
* spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSDWarner Losh2023-05-121-1/+1
* x86: Remove unused devclass arguments to DRIVER_MODULE.John Baldwin2022-05-061-6/+2
* x86: clean up empty lines in .c and .h filesMateusz Guzik2020-09-011-1/+0
* sys/x86: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-271-0/+2
* Enhance qpi.c to make it usable on all Core-microarchitecture Xeons.Konstantin Belousov2017-09-081-15/+27
* Consistently use tabs for indent.Konstantin Belousov2017-09-081-7/+7
* Fix typos. Stop claiming that two children are created.Konstantin Belousov2017-09-061-3/+3
* Convert rman to use rman_res_t instead of u_longJustin Hibbits2016-01-271-1/+1
* Add domain support to PCI bus allocationZbigniew Bodek2015-09-161-1/+1
* Reassign copyright statements on several files from AdvancedJohn Baldwin2015-04-231-1/+1
* Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridgeJohn Baldwin2014-02-121-0/+20
* - Reuse legacy_pcib_(read|write)_config() methods in the QPI pcib driver.John Baldwin2014-01-211-42/+7
* - There's no need to overwrite the default device method with the defaultMarius Strobl2011-11-221-2/+1
* Reimplement how PCI-PCI bridges manage their I/O windows. Previously theJohn Baldwin2011-05-031-0/+1
* Each processor socket in a QPI system has a special PCI bus for theJohn Baldwin2010-09-071-13/+45
* Correctly ensure that the CPU family is 0x6, not non-zero.John Baldwin2010-08-251-1/+2
* Intel QPI chipsets actually provide two extra "non-core" PCI buses thatJohn Baldwin2010-08-251-0/+286
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