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* AMD CPUs: update bits and data from CPUID 0x8000_0008Konstantin Belousov2024-05-141-0/+12
* intr/x86: replace use of vector in interface with intsrcElliott Mitchell2024-05-092-19/+21
* busdma: better handling of small segment bouncingMitchell Horne2024-05-071-29/+17
* busdma: deduplicate _bus_dmamap_addseg() functionMitchell Horne2024-05-071-48/+4
* guestrpc module to handle VMware backdoor port GuestRPC functionalityStephen J. Kiernan2024-05-013-2/+340
* new-bus: Remove the 'type' argument from BUS_MAP/UNMAP_RESOURCEJohn Baldwin2024-03-131-4/+5
* new-bus: Remove the 'type' argument from BUS_ADJUST_RESOURCEJohn Baldwin2024-03-131-4/+3
* x86/ucode: add support for early loading of CPU ucode on AMD.Chuck Silvers2024-02-222-0/+294
* x86/xen: implement early init hookRoger Pau Monné2024-02-221-1/+9
* x86/cpu: introduce an optional hook for early hypervisor initializationRoger Pau Monné2024-02-221-1/+7
* x86/cpu: improve hypervisor detectionRoger Pau Monné2024-02-221-2/+15
* busdma: fix page miscount for small segment sizesMitchell Horne2024-02-161-0/+1
* x86/xen: fix migration when ACPI suspend is not availableRoger Pau Monné2024-02-161-0/+18
* x86/ucode: add const where appropriateChuck Silvers2024-02-131-19/+21
* x86 mem: Pass standard bool value to pmap_demote_DMAPJohn Baldwin2024-02-021-1/+1
* x86: Use pci_domain_[de]activate_bus for PCI_RES_BUS resourcesJohn Baldwin2024-01-231-1/+3
* sysctl: Don't pass CTLFLAG_MPSAFE to SYSCTL_STRINGMark Johnston2024-01-041-2/+2
* identcpu: Let the hw.model be readable in capability modeMark Johnston2024-01-041-1/+1
* x86: Make cpu_model[] publicMark Johnston2024-01-041-1/+1
* i386: Always bounce DMA requests above 4G for !PAE kernelsJohn Baldwin2024-01-021-6/+23
* busdma: tidy bus_dma_run_filter() functionsMitchell Horne2023-12-062-28/+7
* busdma: remove parent tag trackingMitchell Horne2023-12-062-41/+10
* busdma: kill filter functionality internallyMitchell Horne2023-12-062-31/+23
* busdma: Prevent the use of filters with bus_dma_tag_create()Mitchell Horne2023-12-061-0/+4
* x86: Support multiple PCI MCFG regionsJohn Baldwin2023-11-291-2/+2
* pci_cfgreg: Add a PCI domain argument to the low-level register APIJohn Baldwin2023-11-291-4/+4
* sys: Automated cleanup of cdefs and other formattingWarner Losh2023-11-275-5/+0
* sys: Remove ancient SCCS tags.Warner Losh2023-11-273-6/+0
* x86 nexus: Use bus_generic_rman_*_resourceJohn Baldwin2023-11-241-101/+9
* nexus: Use resource_validate_map_requestJohn Baldwin2023-11-231-13/+5
* arm64/amd64/riscv nexus: Use bus_generic_rl_*John Baldwin2023-11-221-45/+3
* busdma: On systmes that use subr_busdma_bounce, measure deferred timeWarner Losh2023-11-131-0/+1
* x86: Prefer consistent naming for loader tunablesZhenlei Huang2023-10-211-2/+2
* x86: Cosmetic cleanups to struct msi_intsrcJohn Baldwin2023-10-201-7/+7
* x86 msi: Enable/disable IDT vectors for MSI groups all at onceJohn Baldwin2023-10-201-14/+20
* x86: make EARLY_AP_STARTUP mandatoryEd Maste2023-10-094-85/+1
* x86: Add sysctl flag CTLFLAG_TUN to loader tunablesZhenlei Huang2023-10-091-2/+2
* x86: AMD Zen2: Zenbleed chicken bit mitigationOlivier Certner2023-10-021-0/+123
* x86: Properly align interrupt vectors for MSIJohn Hay2023-09-281-1/+1
* x86: Introduce APIC ID limit by default on AMD hardwareEd Maste2023-08-291-0/+23
* x86: handle domains with no CPUs usable for intr deliveryEd Maste2023-08-211-1/+19
* msi: handle error from BUS_REMAP_INTR in msi_assign_cpuEd Maste2023-08-181-15/+32
* intr: merge interrupt table uses of MAXCOMLEN into INTRNAME_LENElliott Mitchell2023-08-171-6/+7
* intr: move MAX_STRAY_LOG to interrupt.hElliott Mitchell2023-08-171-4/+2
* sys: Remove $FreeBSD$: one-line .c patternWarner Losh2023-08-1623-46/+0
* sys: Remove $FreeBSD$: two-line .h patternWarner Losh2023-08-161-2/+0
* x86: include CPU ID in "Invalid CPU ID" panicEd Maste2023-08-151-1/+1
* tc_fill_vdso_timehands32(): fixKonstantin Belousov2023-08-122-2/+3
* msi: report error for attempt to use APIC ID > 255Ed Maste2023-08-091-0/+5
* x86: remove intr_bindElliott Mitchell2023-08-031-12/+0
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