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authorDimitry Andric <dim@FreeBSD.org>2023-02-11 12:38:04 +0000
committerDimitry Andric <dim@FreeBSD.org>2023-02-11 12:38:11 +0000
commite3b557809604d036af6e00c60f012c2025b59a5e (patch)
tree8a11ba2269a3b669601e2fd41145b174008f4da8 /llvm/lib/CodeGen/MachineCycleAnalysis.cpp
parent08e8dd7b9db7bb4a9de26d44c1cbfd24e869c014 (diff)
Diffstat (limited to 'llvm/lib/CodeGen/MachineCycleAnalysis.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineCycleAnalysis.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineCycleAnalysis.cpp b/llvm/lib/CodeGen/MachineCycleAnalysis.cpp
index 6871ac35b300..57f7a098ac17 100644
--- a/llvm/lib/CodeGen/MachineCycleAnalysis.cpp
+++ b/llvm/lib/CodeGen/MachineCycleAnalysis.cpp
@@ -9,8 +9,10 @@
#include "llvm/CodeGen/MachineCycleAnalysis.h"
#include "llvm/ADT/GenericCycleImpl.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/MachineSSAContext.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/InitializePasses.h"
using namespace llvm;
@@ -52,6 +54,7 @@ void MachineCycleInfoWrapperPass::releaseMemory() {
F = nullptr;
}
+namespace {
class MachineCycleInfoPrinterPass : public MachineFunctionPass {
public:
static char ID;
@@ -61,6 +64,7 @@ public:
bool runOnMachineFunction(MachineFunction &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
+} // namespace
char MachineCycleInfoPrinterPass::ID = 0;
@@ -105,7 +109,7 @@ bool llvm::isCycleInvariant(const MachineCycle *Cycle, MachineInstr &I) {
// An instruction that uses or defines a physical register can't e.g. be
// hoisted, so mark this as not invariant.
- if (Register::isPhysicalRegister(Reg)) {
+ if (Reg.isPhysical()) {
if (MO.isUse()) {
// If the physreg has no defs anywhere, it's just an ambient register
// and we can freely move its uses. Alternatively, if it's allocatable,