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path: root/sys/arm64/include/cpu.h
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* am64: Allow cpu.h to be included from assemblyAndrew Turner2024-05-101-0/+4
* arm64: Add a CPU reset hook instead of expecting PSCIStephen J. Kiernan2024-04-051-0/+3
* arm64: add CPU part identifiers for Apple M1 and M2Lexi Winter2024-04-051-0/+14
* sys: Remove ancient SCCS tags.Warner Losh2023-11-271-2/+0
* sys: Remove $FreeBSD$: one-line .h patternWarner Losh2023-08-161-1/+0
* arm64 lib32: prepare arm64 headers to redirect to armMike Karels2023-07-251-0/+6
* arm64: Add a masked get_kernel_reg()Mark Johnston2023-06-281-0/+1
* arm64: Malloc the cpu_desc arrayAndrew Turner2023-06-081-0/+2
* arm64: Remove duplicated function prototypes for PACMark Johnston2023-03-271-11/+0
* Add CPU Ident for Qualcomm Kryo 400 (used in MS Dev Kit)Allan Jude2023-01-181-0/+5
* Add the arch field to the arm64 MIDR macrosAndrew Turner2022-11-151-0/+3
* Add more Arm CPUs to the arm64 cpu identAndrew Turner2022-10-111-0/+3
* Add more Arm CPU IDsAndrew Turner2022-05-241-0/+11
* Add the Ampere and Fujitsu arm64 implementer IDsD Scott Phillips2022-03-251-0/+2
* arm64: Add explicit barrier after address translation instructionD Scott Phillips2022-03-251-1/+2
* Add NT_ARM_ADDR_MASKAndrew Turner2022-02-221-0/+3
* Add arm64 pointer authentication supportAndrew Turner2022-01-121-0/+22
* Simplify swi for bus_dma.John Baldwin2021-12-281-1/+0
* arm64, riscv: Fix TRAF_PC() to return the PC, not the return address.John Baldwin2021-10-011-1/+1
* Add the Apple arm64 implementer IDAndrew Turner2021-08-121-0/+1
* Teach the arm64 kernel to identify the Arm AEMAndrew Turner2021-07-271-0/+1
* arm64: clean up empty lines in .c and .h filesMateusz Guzik2020-09-011-1/+0
* Read the CPU 0 arm64 ID registers early in initarmAndrew Turner2020-07-011-1/+2
* Move ID reading signatures to a better headerAndrew Turner2020-07-011-0/+4
* Move the arm64 cache identification to identcpu.cAndrew Turner2020-03-031-0/+1
* Add more Arm arm64 CPU identification valuesAndrew Turner2020-01-061-1/+6
* Identify eMAG CPU used in Ampere Computing systems.Michael Tuexen2019-08-261-0/+3
* arm64: Implement HWCAPEmmanuel Vadot2019-07-201-1/+0
* Add a KPI for the delay while spinning on a spin lock.John Baldwin2018-11-051-0/+1
* ARM64: Add ThunderX2 CPU revision macro. Add ThunderX2 name in identcpu.cWojciech Macek2018-07-091-0/+2
* Rename the ThunderX CPU identification macros to include the X. This is theAndrew Turner2018-06-131-7/+7
* Add more Cavium CPU part numbers.Andrew Turner2018-06-131-1/+7
* Add a framework to install CPU errata on arm64. Each erratum can encodeAndrew Turner2018-01-091-0/+1
* Add more ARM Ltd parts to the list of knows CPUs.Andrew Turner2017-09-071-0/+4
* Add ARM Cortex A72 to CPU listMarcin Wojtas2017-09-031-0/+1
* Use the yield instruction in the arm64 cpu_spinwait. This instruction isAndrew Turner2016-04-251-1/+1
* Use the saved program state register to detect when an exception frame isAndrew Turner2016-03-221-2/+2
* Decode and print the ID_AA64* registers on boot. These registers holdAndrew Turner2015-12-301-0/+1
* Block secondary ITS instances from attaching on ARM64Zbigniew Bodek2015-09-161-0/+2
* Add SMP support to GICv3 and ITS driversZbigniew Bodek2015-08-191-1/+6
* Apply erratum for mrs ICC_IAR1_EL1 speculative execution on ThunderXZbigniew Bodek2015-07-311-0/+26
* Implement get_cyclecount() on ARM64Zbigniew Bodek2015-07-211-2/+5
* Improve ARM64 CPU_MATCHZbigniew Bodek2015-07-211-4/+11
* Rework CPU identification on ARM64Zbigniew Bodek2015-07-091-0/+37
* Renumber clauses to avoid missing 3Ed Maste2015-03-231-1/+1
* Add the start of the arm64 machine headers. This is the subset needed toAndrew Turner2015-03-231-0/+104
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